stm32l4x: add OTP support for STM32 G0/G4/L4/L4+/L5/WB/WL devices

[fw/openocd] / src / flash / nor / cfi.h

diff --git a/src/flash/nor/cfi.h b/src/flash/nor/cfi.h
index 9451faae640a97052a22b45190b1111a5d928c94..eceb9a4b3c2895c523432bef4a71d8fee6a54955 100644 (file)
--- a/src/flash/nor/cfi.h
+++ b/src/flash/nor/cfi.h
@@ -23,13 +23,13 @@
 #define CFI_STATUS_POLL_MASK_DQ6_DQ7     0xC0 /* DQ6..DQ7 */
 
 struct cfi_flash_bank {
-       int x16_as_x8;
-       int jedec_probe;
-       int not_cfi;
-       int probed;
+       bool x16_as_x8;
+       bool jedec_probe;
+       bool not_cfi;
+       bool probed;
 
        enum target_endianness endianness;
-       int data_swap;
+       bool data_swap;
 
        uint16_t manufacturer;
        uint16_t device_id;
@@ -154,6 +154,25 @@ struct cfi_fixup {
        const void *param;
 };
 
+int cfi_erase(struct flash_bank *bank, unsigned int first, unsigned int last);
+int cfi_protect(struct flash_bank *bank, int set, unsigned int first,
+               unsigned int last);
+int cfi_probe(struct flash_bank *bank);
+int cfi_auto_probe(struct flash_bank *bank);
+int cfi_protect_check(struct flash_bank *bank);
+int cfi_get_info(struct flash_bank *bank, char *buf, int buf_size);
+int cfi_flash_bank_cmd(struct flash_bank *bank, unsigned int argc, const char **argv);
+
+uint32_t cfi_flash_address(struct flash_bank *bank, int sector, uint32_t offset);
+int cfi_spansion_unlock_seq(struct flash_bank *bank);
+int cfi_send_command(struct flash_bank *bank, uint8_t cmd, uint32_t address);
+int cfi_write_word(struct flash_bank *bank, uint8_t *word, uint32_t address);
+int cfi_spansion_wait_status_busy(struct flash_bank *bank, int timeout);
+int cfi_reset(struct flash_bank *bank);
+
+int cfi_target_read_memory(struct flash_bank *bank, target_addr_t addr,
+                          uint32_t count, uint8_t *buffer);
+
 #define CFI_MFR_AMD            0x0001
 #define CFI_MFR_FUJITSU        0x0004
 #define CFI_MFR_ATMEL  0x001F
@@ -166,4 +185,7 @@ struct cfi_fixup {
 #define CFI_MFR_ANY            0xffff
 #define CFI_ID_ANY             0xffff
 
+#define CFI_MAX_BUS_WIDTH       4
+#define CFI_MAX_CHIP_WIDTH      4
+
 #endif /* OPENOCD_FLASH_NOR_CFI_H */