Remove FSF address from GPL notices

[fw/openocd] / src / flash / nor / cfi.c

diff --git a/src/flash/nor/cfi.c b/src/flash/nor/cfi.c
index 97d3f190c42d26ce39d346a5ccd9a38a6bb0f37d..248f76005e59ae2de2b8fc62bf58b478f02b4bee 100644 (file)
--- a/src/flash/nor/cfi.c
+++ b/src/flash/nor/cfi.c
@@ -17,9 +17,7 @@
  *   GNU General Public License for more details.                          *
  *                                                                         *
  *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
+ *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
 
 #ifdef HAVE_CONFIG_H
@@ -136,6 +134,7 @@ static inline uint32_t flash_address(struct flash_bank *bank, int sector, uint32
 static void cfi_command(struct flash_bank *bank, uint8_t cmd, uint8_t *cmd_buf)
 {
        int i;
+       struct cfi_flash_bank *cfi_info = bank->driver_priv;
 
        /* clear whole buffer, to ensure bits that exceed the bus_width
         * are set to zero
@@ -143,7 +142,7 @@ static void cfi_command(struct flash_bank *bank, uint8_t cmd, uint8_t *cmd_buf)
        for (i = 0; i < CFI_MAX_BUS_WIDTH; i++)
                cmd_buf[i] = 0;
 
-       if (bank->target->endianness == TARGET_LITTLE_ENDIAN) {
+       if (cfi_info->endianness == TARGET_LITTLE_ENDIAN) {
                for (i = bank->bus_width; i > 0; i--)
                        *cmd_buf++ = (i & (bank->chip_width - 1)) ? 0x0 : cmd;
        } else {
@@ -167,6 +166,7 @@ static int cfi_send_command(struct flash_bank *bank, uint8_t cmd, uint32_t addre
 static int cfi_query_u8(struct flash_bank *bank, int sector, uint32_t offset, uint8_t *val)
 {
        struct target *target = bank->target;
+       struct cfi_flash_bank *cfi_info = bank->driver_priv;
        uint8_t data[CFI_MAX_BUS_WIDTH];
 
        int retval;
@@ -175,7 +175,7 @@ static int cfi_query_u8(struct flash_bank *bank, int sector, uint32_t offset, ui
        if (retval != ERROR_OK)
                return retval;
 
-       if (bank->target->endianness == TARGET_LITTLE_ENDIAN)
+       if (cfi_info->endianness == TARGET_LITTLE_ENDIAN)
                *val = data[0];
        else
                *val = data[bank->bus_width - 1];
@@ -190,6 +190,7 @@ static int cfi_query_u8(struct flash_bank *bank, int sector, uint32_t offset, ui
 static int cfi_get_u8(struct flash_bank *bank, int sector, uint32_t offset, uint8_t *val)
 {
        struct target *target = bank->target;
+       struct cfi_flash_bank *cfi_info = bank->driver_priv;
        uint8_t data[CFI_MAX_BUS_WIDTH];
        int i;
 
@@ -199,7 +200,7 @@ static int cfi_get_u8(struct flash_bank *bank, int sector, uint32_t offset, uint
        if (retval != ERROR_OK)
                return retval;
 
-       if (bank->target->endianness == TARGET_LITTLE_ENDIAN) {
+       if (cfi_info->endianness == TARGET_LITTLE_ENDIAN) {
                for (i = 0; i < bank->bus_width / bank->chip_width; i++)
                        data[0] |= data[i];
 
@@ -236,7 +237,7 @@ static int cfi_query_u16(struct flash_bank *bank, int sector, uint32_t offset, u
                        return retval;
        }
 
-       if (bank->target->endianness == TARGET_LITTLE_ENDIAN)
+       if (cfi_info->endianness == TARGET_LITTLE_ENDIAN)
                *val = data[0] | data[bank->bus_width] << 8;
        else
                *val = data[bank->bus_width - 1] | data[(2 * bank->bus_width) - 1] << 8;
@@ -266,7 +267,7 @@ static int cfi_query_u32(struct flash_bank *bank, int sector, uint32_t offset, u
                        return retval;
        }
 
-       if (bank->target->endianness == TARGET_LITTLE_ENDIAN)
+       if (cfi_info->endianness == TARGET_LITTLE_ENDIAN)
                *val = data[0] | data[bank->bus_width] << 8 |
                        data[bank->bus_width * 2] << 16 | data[bank->bus_width * 3] << 24;
        else
@@ -803,6 +804,7 @@ static int cfi_intel_info(struct flash_bank *bank, char *buf, int buf_size)
 FLASH_BANK_COMMAND_HANDLER(cfi_flash_bank_command)
 {
        struct cfi_flash_bank *cfi_info;
+       int bus_swap = 0;
 
        if (CMD_ARGC < 6)
                return ERROR_COMMAND_SYNTAX_ERROR;
@@ -836,10 +838,19 @@ FLASH_BANK_COMMAND_HANDLER(cfi_flash_bank_command)
        for (unsigned i = 6; i < CMD_ARGC; i++) {
                if (strcmp(CMD_ARGV[i], "x16_as_x8") == 0)
                        cfi_info->x16_as_x8 = 1;
+               else if (strcmp(CMD_ARGV[i], "bus_swap") == 0)
+                       bus_swap = 1;
                else if (strcmp(CMD_ARGV[i], "jedec_probe") == 0)
                        cfi_info->jedec_probe = 1;
        }
 
+       if (bus_swap)
+               cfi_info->endianness =
+                       bank->target->endianness == TARGET_LITTLE_ENDIAN ?
+                       TARGET_BIG_ENDIAN : TARGET_LITTLE_ENDIAN;
+       else
+               cfi_info->endianness = bank->target->endianness;
+
        /* bank wasn't probed yet */
        cfi_info->qry[0] = 0xff;
 
@@ -1213,7 +1224,7 @@ static int cfi_intel_write_block(struct flash_bank *bank, const uint8_t *buffer,
                arm_algo.core_state = ARM_STATE_ARM;
        } else {
                LOG_ERROR("Unknown architecture");
-               return ERROR_FAIL;
+               return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
        }
 
        cfi_intel_clear_status_register(bank);
@@ -1262,7 +1273,6 @@ static int cfi_intel_write_block(struct flash_bank *bank, const uint8_t *buffer,
                LOG_WARNING("No working area available, can't do block memory writes");
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
        }
-       ;
 
        /* write algorithm code to working area */
        retval = target_write_buffer(target, write_algorithm->address,
@@ -1284,7 +1294,6 @@ static int cfi_intel_write_block(struct flash_bank *bank, const uint8_t *buffer,
                        goto cleanup;
                }
        }
-       ;
 
        /* setup algo registers */
        init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
@@ -1527,18 +1536,17 @@ static int cfi_spansion_write_block_mips(struct flash_bank *bank, const uint8_t
                        return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
                }
        }
-       ;
 
-       init_reg_param(&reg_params[0], "a0", 32, PARAM_OUT);
-       init_reg_param(&reg_params[1], "a1", 32, PARAM_OUT);
-       init_reg_param(&reg_params[2], "a2", 32, PARAM_OUT);
-       init_reg_param(&reg_params[3], "a3", 32, PARAM_OUT);
-       init_reg_param(&reg_params[4], "t0", 32, PARAM_OUT);
-       init_reg_param(&reg_params[5], "t1", 32, PARAM_IN);
-       init_reg_param(&reg_params[6], "t4", 32, PARAM_OUT);
-       init_reg_param(&reg_params[7], "t5", 32, PARAM_OUT);
-       init_reg_param(&reg_params[8], "t6", 32, PARAM_OUT);
-       init_reg_param(&reg_params[9], "t7", 32, PARAM_OUT);
+       init_reg_param(&reg_params[0], "r4", 32, PARAM_OUT);
+       init_reg_param(&reg_params[1], "r5", 32, PARAM_OUT);
+       init_reg_param(&reg_params[2], "r6", 32, PARAM_OUT);
+       init_reg_param(&reg_params[3], "r7", 32, PARAM_OUT);
+       init_reg_param(&reg_params[4], "r8", 32, PARAM_OUT);
+       init_reg_param(&reg_params[5], "r9", 32, PARAM_IN);
+       init_reg_param(&reg_params[6], "r12", 32, PARAM_OUT);
+       init_reg_param(&reg_params[7], "r13", 32, PARAM_OUT);
+       init_reg_param(&reg_params[8], "r14", 32, PARAM_OUT);
+       init_reg_param(&reg_params[9], "r15", 32, PARAM_OUT);
 
        while (count > 0) {
                uint32_t thisrun_count = (count > buffer_size) ? buffer_size : count;
@@ -1811,7 +1819,7 @@ static int cfi_spansion_write_block(struct flash_bank *bank, const uint8_t *buff
                arm_algo = &armv4_5_algo;
        } else {
                LOG_ERROR("Unknown architecture");
-               return ERROR_FAIL;
+               return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
        }
 
        int target_code_size = 0;
@@ -1907,7 +1915,6 @@ static int cfi_spansion_write_block(struct flash_bank *bank, const uint8_t *buff
                        return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
                }
        }
-       ;
 
        init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
        init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);
@@ -1989,7 +1996,9 @@ static int cfi_intel_write_word(struct flash_bank *bank, uint8_t *word, uint32_t
 
        uint8_t status;
        retval = cfi_intel_wait_status_busy(bank, cfi_info->word_write_timeout, &status);
-       if (retval != 0x80) {
+       if (retval != ERROR_OK)
+               return retval;
+       if (status != 0x80) {
                retval = cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0));
                if (retval != ERROR_OK)
                        return retval;