* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
+ * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#include "imp.h"
+#include <target/cortex_m.h>
+
/* At this time, the SAM4L Flash is available in these capacities:
* ATSAM4Lx4xx: 256KB (512 pages)
* ATSAM4Lx2xx: 128KB (256 pages)
* ATSAM4Lx8xx: 512KB (1024 pages)
*/
-/* There are 16 lockable regions regardless of overall capacity. The number
+/* There are 16 lockable regions regardless of overall capacity. The number
* of pages per sector is therefore dependant on capacity. */
#define SAM4L_NUM_SECTORS 16
#define SAM4L_FMCD_CMDKEY 0xA5UL /* 'key' to issue commands, see 14.10.2 */
+
+/* SMAP registers and bits */
+#define SMAP_BASE 0x400A3000
+
+#define SMAP_SCR (SMAP_BASE + 8)
+#define SMAP_SCR_HCR (1 << 1)
+
+
struct sam4l_chip_info {
uint32_t id;
uint32_t exid;
bool probed;
struct target *target;
- struct sam4l_info *next;
};
-static struct sam4l_info *sam4l_chips;
static int sam4l_flash_wait_until_ready(struct target *target)
{
FLASH_BANK_COMMAND_HANDLER(sam4l_flash_bank_command)
{
- struct sam4l_info *chip = sam4l_chips;
-
- while (chip) {
- if (chip->target == bank->target)
- break;
- chip = chip->next;
- }
-
- if (!chip) {
- /* Create a new chip */
- chip = calloc(1, sizeof(*chip));
- if (!chip)
- return ERROR_FAIL;
-
- chip->target = bank->target;
- chip->probed = false;
-
- bank->driver_priv = chip;
-
- /* Insert it into the chips list (at head) */
- chip->next = sam4l_chips;
- sam4l_chips = chip;
- }
-
if (bank->base != SAM4L_FLASH) {
- LOG_ERROR("Address 0x%08" PRIx32 " invalid bank address (try 0x%08" PRIx32
+ LOG_ERROR("Address " TARGET_ADDR_FMT
+ " invalid bank address (try 0x%08" PRIx32
"[at91sam4l series] )",
bank->base, SAM4L_FLASH);
return ERROR_FAIL;
}
+ struct sam4l_info *chip;
+ chip = calloc(1, sizeof(*chip));
+ if (!chip) {
+ LOG_ERROR("No memory for flash bank chip info");
+ return ERROR_FAIL;
+ }
+
+ chip->target = bank->target;
+ chip->probed = false;
+
+ bank->driver_priv = chip;
+
return ERROR_OK;
}
static int sam4l_protect(struct flash_bank *bank, int set, int first, int last)
{
- struct sam4l_info *chip = sam4l_chips;
+ struct sam4l_info *chip = (struct sam4l_info *)bank->driver_priv;
if (bank->target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
/* There's at least one aligned page to write out. */
if (count >= chip->page_size) {
+ assert(chip->page_size > 0);
int np = count / chip->page_size + ((count % chip->page_size) ? 1 : 0);
for (int i = 0; i < np; i++) {
return ERROR_OK;
}
-COMMAND_HANDLER(sam4l_handle_info_command)
+
+COMMAND_HANDLER(sam4l_handle_reset_deassert)
{
- return ERROR_OK;
+ struct target *target = get_current_target(CMD_CTX);
+ int retval = ERROR_OK;
+ enum reset_types jtag_reset_config = jtag_get_reset_config();
+
+ /* If the target has been unresponsive before, try to re-establish
+ * communication now - CPU is held in reset by DSU, DAP is working */
+ if (!target_was_examined(target))
+ target_examine_one(target);
+ target_poll(target);
+
+ /* In case of sysresetreq, debug retains state set in cortex_m_assert_reset()
+ * so we just release reset held by SMAP
+ *
+ * n_RESET (srst) clears the DP, so reenable debug and set vector catch here
+ *
+ * After vectreset SMAP release is not needed however makes no harm
+ */
+ if (target->reset_halt && (jtag_reset_config & RESET_HAS_SRST)) {
+ retval = target_write_u32(target, DCB_DHCSR, DBGKEY | C_HALT | C_DEBUGEN);
+ if (retval == ERROR_OK)
+ retval = target_write_u32(target, DCB_DEMCR,
+ TRCENA | VC_HARDERR | VC_BUSERR | VC_CORERESET);
+ /* do not return on error here, releasing SMAP reset is more important */
+ }
+
+ int retval2 = target_write_u32(target, SMAP_SCR, SMAP_SCR_HCR);
+ if (retval2 != ERROR_OK)
+ return retval2;
+
+ return retval;
}
static const struct command_registration at91sam4l_exec_command_handlers[] = {
{
- .name = "info",
- .handler = sam4l_handle_info_command,
+ .name = "smap_reset_deassert",
+ .handler = sam4l_handle_reset_deassert,
.mode = COMMAND_EXEC,
- .help = "Print information about the current at91sam4l chip"
- "and its flash configuration.",
+ .help = "deassert internal reset held by SMAP",
+ .usage = "",
},
COMMAND_REGISTRATION_DONE
};
+
static const struct command_registration at91sam4l_command_handlers[] = {
{
.name = "at91sam4l",
COMMAND_REGISTRATION_DONE
};
-struct flash_driver at91sam4l_flash = {
+const struct flash_driver at91sam4l_flash = {
.name = "at91sam4l",
.commands = at91sam4l_command_handlers,
.flash_bank_command = sam4l_flash_bank_command,
.auto_probe = sam4l_probe,
.erase_check = default_flash_blank_check,
.protect_check = sam4l_protect_check,
+ .free_driver_priv = default_flash_free_driver_priv,
};
projects / fw / openocd / blobdiff