openocd: src: replace the GPL and BSD-Source-Code license tags
[fw/openocd] / src / flash / nor / at91sam3.c
index 9d119bbf588b65052c1da3ff23ae66ee8b82152f..431e2a3a063ac3b71acb9056570c80469f805b27 100644 (file)
@@ -1,61 +1,17 @@
-/***************************************************************************
- *   Copyright (C) 2009 by Duane Ellis                                     *
- *   openocd@duaneellis.com                                                *
- *                                                                         *
- *   Copyright (C) 2010 by Olaf Lüke (at91sam3s* support)                  *
- *   olaf@uni-paderborn.de                                                 *
- *                                                                                                                                                *
- *   Copyright (C) 2011 by Olivier Schonken (at91sam3x* support)           *                                          *
- *                     and Jim Norris                                      *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE.  See the         *
- *   GNU General public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
-****************************************************************************/
-
-/* Some of the the lower level code was based on code supplied by
- * ATMEL under this copyright. */
-
-/* BEGIN ATMEL COPYRIGHT */
-/* ----------------------------------------------------------------------------
- *         ATMEL Microcontroller Software Support
- * ----------------------------------------------------------------------------
- * Copyright (c) 2009, Atmel Corporation
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * - Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the disclaimer below.
+/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-Source-Code) */
+
+/*
+ * Copyright (C) 2009 by Duane Ellis <openocd@duaneellis.com>
  *
- * Atmel's name may not be used to endorse or promote products derived from
- * this software without specific prior written permission.
+ * at91sam3s* support
+ * Copyright (C) 2010 by Olaf Lüke <olaf@uni-paderborn.de>
+ * Copyright (C) 2011 by Olivier Schonken and Jim Norris
  *
- * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
- * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
- * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
- * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- * ----------------------------------------------------------------------------
+ * Some of the lower level code was based on code supplied by
+ * ATMEL under BSD-Source-Code License and this copyright.
+ * ATMEL Microcontroller Software Support
+ * Copyright (c) 2009, Atmel Corporation. All rights reserved.
  */
-/* END ATMEL COPYRIGHT */
 
 #ifdef HAVE_CONFIG_H
 #include "config.h"
 #define         AT91C_EFC_FCMD_STUI                 (0xE)      /* (EFC) Start Read Unique ID */
 #define         AT91C_EFC_FCMD_SPUI                 (0xF)      /* (EFC) Stop Read Unique ID */
 
-#define  offset_EFC_FMR   0
-#define  offset_EFC_FCR   4
-#define  offset_EFC_FSR   8
-#define  offset_EFC_FRR   12
+#define  OFFSET_EFC_FMR   0
+#define  OFFSET_EFC_FCR   4
+#define  OFFSET_EFC_FSR   8
+#define  OFFSET_EFC_FRR   12
 
-extern struct flash_driver at91sam3_flash;
+extern const struct flash_driver at91sam3_flash;
 
 static float _tomhz(uint32_t freq_hz)
 {
@@ -189,17 +145,17 @@ struct sam3_cfg {
  */
 
 struct sam3_bank_private {
-       int probed;
+       bool probed;
        /* DANGER: THERE ARE DRAGONS HERE.. */
        /* NOTE: If you add more 'ghost' pointers */
        /* be aware that you must *manually* update */
-       /* these pointers in the function sam3_GetDetails() */
+       /* these pointers in the function sam3_get_details() */
        /* See the comment "Here there be dragons" */
 
        /* so we can find the chip we belong to */
-       struct sam3_chip *pChip;
+       struct sam3_chip *chip;
        /* so we can find the original bank pointer */
-       struct flash_bank *pBank;
+       struct flash_bank *bank;
        unsigned bank_number;
        uint32_t controller_address;
        uint32_t base_address;
@@ -216,7 +172,7 @@ struct sam3_chip_details {
        /* note: If you add pointers here */
        /* be careful about them as they */
        /* may need to be updated inside */
-       /* the function: "sam3_GetDetails() */
+       /* the function: "sam3_get_details() */
        /* which copy/overwrites the */
        /* 'runtime' copy of this structure */
        uint32_t chipid_cidr;
@@ -235,7 +191,7 @@ struct sam3_chip_details {
 
 struct sam3_chip {
        struct sam3_chip *next;
-       int probed;
+       bool probed;
 
        /* this is "initialized" from the global const structure */
        struct sam3_chip_details details;
@@ -246,19 +202,19 @@ struct sam3_chip {
 
 struct sam3_reg_list {
        uint32_t address;  size_t struct_offset; const char *name;
-       void (*explain_func)(struct sam3_chip *pInfo);
+       void (*explain_func)(struct sam3_chip *chip);
 };
 
 static struct sam3_chip *all_sam3_chips;
 
-static struct sam3_chip *get_current_sam3(struct command_context *cmd_ctx)
+static struct sam3_chip *get_current_sam3(struct command_invocation *cmd)
 {
        struct target *t;
        static struct sam3_chip *p;
 
-       t = get_current_target(cmd_ctx);
+       t = get_current_target(cmd->ctx);
        if (!t) {
-               command_print(cmd_ctx, "No current target?");
+               command_print_sameline(cmd, "No current target?\n");
                return NULL;
        }
 
@@ -266,7 +222,7 @@ static struct sam3_chip *get_current_sam3(struct command_context *cmd_ctx)
        if (!p) {
                /* this should not happen */
                /* the command is not registered until the chip is created? */
-               command_print(cmd_ctx, "No SAM3 chips exist?");
+               command_print_sameline(cmd, "No SAM3 chips exist?\n");
                return NULL;
        }
 
@@ -275,11 +231,11 @@ static struct sam3_chip *get_current_sam3(struct command_context *cmd_ctx)
                        return p;
                p = p->next;
        }
-       command_print(cmd_ctx, "Cannot find SAM3 chip?");
+       command_print_sameline(cmd, "Cannot find SAM3 chip?\n");
        return NULL;
 }
 
-/* these are used to *initialize* the "pChip->details" structure. */
+/* these are used to *initialize* the "chip->details" structure. */
 static const struct sam3_chip_details all_sam3_details[] = {
        /* Start at91sam3u* series */
        {
@@ -308,9 +264,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[0] = { */
                {
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK0_BASE_U,
                                .controller_address = 0x400e0800,
@@ -324,9 +280,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
 
 /*             .bank[1] = { */
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 1,
                                .base_address = FLASH_BANK1_BASE_U,
                                .controller_address = 0x400e0a00,
@@ -359,9 +315,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[0] = { */
                {
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK0_BASE_U,
                                .controller_address = 0x400e0800,
@@ -375,7 +331,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*               .bank[1] = { */
                        {
                                .present = 0,
-                               .probed = 0,
+                               .probed = false,
                                .bank_number = 1,
                        },
                },
@@ -401,9 +357,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[0] = { */
                {
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK0_BASE_U,
                                .controller_address = 0x400e0800,
@@ -418,7 +374,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[1] = { */
                        {
                                .present = 0,
-                               .probed = 0,
+                               .probed = false,
                                .bank_number = 1,
                        },
                },
@@ -450,9 +406,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                {
                        {
 /*             .bank[0] = { */
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK0_BASE_U,
                                .controller_address = 0x400e0800,
@@ -465,9 +421,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                        },
 /*             .bank[1] = { */
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 1,
                                .base_address = FLASH_BANK1_BASE_U,
                                .controller_address = 0x400e0a00,
@@ -500,9 +456,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                {
 /*             .bank[0] = { */
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK0_BASE_U,
                                .controller_address = 0x400e0800,
@@ -516,7 +472,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[1] = { */
                        {
                                .present = 0,
-                               .probed = 0,
+                               .probed = false,
                                .bank_number = 1,
                        },
                },
@@ -542,9 +498,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                {
 /*             .bank[0] = { */
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK0_BASE_U,
                                .controller_address = 0x400e0800,
@@ -558,7 +514,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[1] = { */
                        {
                                .present = 0,
-                               .probed = 0,
+                               .probed = false,
                                .bank_number = 1,
 
                        },
@@ -580,9 +536,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                {
 /*             .bank[0] = { */
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK_BASE_S,
                                .controller_address = 0x400e0a00,
@@ -596,7 +552,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[1] = { */
                        {
                                .present = 0,
-                               .probed = 0,
+                               .probed = false,
                                .bank_number = 1,
 
                        },
@@ -613,9 +569,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                {
 /*             .bank[0] = { */
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK_BASE_S,
                                .controller_address = 0x400e0a00,
@@ -629,7 +585,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[1] = { */
                        {
                                .present = 0,
-                               .probed = 0,
+                               .probed = false,
                                .bank_number = 1,
 
                        },
@@ -645,9 +601,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                {
 /*             .bank[0] = { */
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK_BASE_S,
                                .controller_address = 0x400e0a00,
@@ -661,7 +617,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[1] = { */
                        {
                                .present = 0,
-                               .probed = 0,
+                               .probed = false,
                                .bank_number = 1,
 
                        },
@@ -677,9 +633,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                {
 /*             .bank[0] = { */
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK_BASE_S,
                                .controller_address = 0x400e0a00,
@@ -693,7 +649,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[1] = { */
                        {
                                .present = 0,
-                               .probed = 0,
+                               .probed = false,
                                .bank_number = 1,
 
                        },
@@ -709,9 +665,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                {
 /*             .bank[0] = { */
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK_BASE_S,
                                .controller_address = 0x400e0a00,
@@ -725,7 +681,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[1] = { */
                        {
                                .present = 0,
-                               .probed = 0,
+                               .probed = false,
                                .bank_number = 1,
 
                        },
@@ -741,9 +697,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                {
 /*                     .bank[0] = { */
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK0_BASE_SD,
                                .controller_address = 0x400e0a00,
@@ -756,9 +712,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                          },
 /*                     .bank[1] = { */
                          {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 1,
                                .base_address = FLASH_BANK1_BASE_512K_SD,
                                .controller_address = 0x400e0a00,
@@ -781,9 +737,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                {
 /*                     .bank[0] = { */
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK0_BASE_SD,
                                .controller_address = 0x400e0a00,
@@ -796,9 +752,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                          },
 /*                     .bank[1] = { */
                          {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 1,
                                .base_address = FLASH_BANK1_BASE_512K_SD,
                                .controller_address = 0x400e0a00,
@@ -821,9 +777,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                {
 /*                     .bank[0] = { */
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK0_BASE_SD,
                                .controller_address = 0x400e0a00,
@@ -836,9 +792,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                          },
 /*                     .bank[1] = { */
                          {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 1,
                                .base_address = FLASH_BANK1_BASE_512K_SD,
                                .controller_address = 0x400e0a00,
@@ -861,9 +817,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                {
 /*             .bank[0] = { */
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK_BASE_S,
                                .controller_address = 0x400e0a00,
@@ -877,7 +833,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[1] = { */
                        {
                                .present = 0,
-                               .probed = 0,
+                               .probed = false,
                                .bank_number = 1,
 
                        },
@@ -893,9 +849,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                {
 /*             .bank[0] = { */
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK_BASE_S,
                                .controller_address = 0x400e0a00,
@@ -909,7 +865,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[1] = { */
                        {
                                .present = 0,
-                               .probed = 0,
+                               .probed = false,
                                .bank_number = 1,
 
                        },
@@ -925,9 +881,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                {
 /*             .bank[0] = { */
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK_BASE_S,
                                .controller_address = 0x400e0a00,
@@ -941,7 +897,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[1] = { */
                        {
                                .present = 0,
-                               .probed = 0,
+                               .probed = false,
                                .bank_number = 1,
 
                        },
@@ -957,9 +913,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                {
 /*             .bank[0] = { */
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK_BASE_S,
                                .controller_address = 0x400e0a00,
@@ -973,7 +929,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[1] = { */
                        {
                                .present = 0,
-                               .probed = 0,
+                               .probed = false,
                                .bank_number = 1,
 
                        },
@@ -989,9 +945,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                {
 /*             .bank[0] = { */
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK_BASE_S,
                                .controller_address = 0x400e0a00,
@@ -1005,7 +961,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[1] = { */
                        {
                                .present = 0,
-                               .probed = 0,
+                               .probed = false,
                                .bank_number = 1,
 
                        },
@@ -1021,9 +977,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                {
 /*             .bank[0] = { */
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK_BASE_S,
                                .controller_address = 0x400e0a00,
@@ -1037,7 +993,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[1] = { */
                        {
                                .present = 0,
-                               .probed = 0,
+                               .probed = false,
                                .bank_number = 1,
 
                        },
@@ -1053,9 +1009,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                {
 /*             .bank[0] = { */
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK_BASE_S,
                                .controller_address = 0x400e0a00,
@@ -1069,7 +1025,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[1] = { */
                        {
                                .present = 0,
-                               .probed = 0,
+                               .probed = false,
                                .bank_number = 1,
 
                        },
@@ -1103,9 +1059,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[0] = { */
                {
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK_BASE_N,
                                .controller_address = 0x400e0A00,
@@ -1120,7 +1076,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[1] = { */
                        {
                                .present = 0,
-                               .probed = 0,
+                               .probed = false,
                                .bank_number = 1,
                        },
                },
@@ -1152,9 +1108,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[0] = { */
                {
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK_BASE_N,
                                .controller_address = 0x400e0A00,
@@ -1169,7 +1125,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[1] = { */
                        {
                                .present = 0,
-                               .probed = 0,
+                               .probed = false,
                                .bank_number = 1,
                        },
                },
@@ -1201,9 +1157,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[0] = { */
                {
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK_BASE_N,
                                .controller_address = 0x400e0A00,
@@ -1218,7 +1174,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[1] = { */
                        {
                                .present = 0,
-                               .probed = 0,
+                               .probed = false,
                                .bank_number = 1,
                        },
                },
@@ -1250,9 +1206,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[0] = { */
                {
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK_BASE_N,
                                .controller_address = 0x400e0A00,
@@ -1267,7 +1223,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[1] = { */
                        {
                                .present = 0,
-                               .probed = 0,
+                               .probed = false,
                                .bank_number = 1,
                        },
                },
@@ -1299,9 +1255,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[0] = { */
                {
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK_BASE_N,
                                .controller_address = 0x400e0A00,
@@ -1316,7 +1272,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[1] = { */
                        {
                                .present = 0,
-                               .probed = 0,
+                               .probed = false,
                                .bank_number = 1,
                        },
                },
@@ -1348,9 +1304,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[0] = { */
                {
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK_BASE_N,
                                .controller_address = 0x400e0A00,
@@ -1365,7 +1321,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[1] = { */
                        {
                                .present = 0,
-                               .probed = 0,
+                               .probed = false,
                                .bank_number = 1,
                        },
                },
@@ -1397,9 +1353,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[0] = { */
                {
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK_BASE_N,
                                .controller_address = 0x400e0A00,
@@ -1414,7 +1370,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[1] = { */
                        {
                                .present = 0,
-                               .probed = 0,
+                               .probed = false,
                                .bank_number = 1,
                        },
                },
@@ -1446,9 +1402,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[0] = { */
                {
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK_BASE_N,
                                .controller_address = 0x400e0A00,
@@ -1463,7 +1419,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[1] = { */
                        {
                                .present = 0,
-                               .probed = 0,
+                               .probed = false,
                                .bank_number = 1,
                        },
                },
@@ -1495,9 +1451,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[0] = { */
                {
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK_BASE_N,
                                .controller_address = 0x400e0A00,
@@ -1512,7 +1468,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[1] = { */
                        {
                                .present = 0,
-                               .probed = 0,
+                               .probed = false,
                                .bank_number = 1,
                        },
                },
@@ -1529,9 +1485,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[0] = { */
                {
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK_BASE_N,
                                .controller_address = 0x400e0A00,
@@ -1546,7 +1502,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[1] = { */
                        {
                                .present = 0,
-                               .probed = 0,
+                               .probed = false,
                                .bank_number = 1,
                        },
                },
@@ -1563,9 +1519,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[0] = { */
                {
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK_BASE_N,
                                .controller_address = 0x400e0A00,
@@ -1580,7 +1536,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[1] = { */
                        {
                                .present = 0,
-                               .probed = 0,
+                               .probed = false,
                                .bank_number = 1,
                        },
                },
@@ -1597,9 +1553,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[0] = { */
                {
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK_BASE_N,
                                .controller_address = 0x400e0A00,
@@ -1614,7 +1570,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[1] = { */
                        {
                                .present = 0,
-                               .probed = 0,
+                               .probed = false,
                                .bank_number = 1,
                        },
                },
@@ -1631,9 +1587,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[0] = { */
                {
                        {
-                               .probed = 0,
-                               .pChip  = NULL,
-                               .pBank  = NULL,
+                               .probed = false,
+                               .chip  = NULL,
+                               .bank  = NULL,
                                .bank_number = 0,
                                .base_address = FLASH_BANK_BASE_N,
                                .controller_address = 0x400e0A00,
@@ -1648,7 +1604,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /*             .bank[1] = { */
                        {
                                .present = 0,
-                               .probed = 0,
+                               .probed = false,
                                .bank_number = 1,
                        },
                },
@@ -1682,9 +1638,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                {
 /*             .bank[0] = { */
                  {
-                       .probed = 0,
-                       .pChip  = NULL,
-                       .pBank  = NULL,
+                       .probed = false,
+                       .chip  = NULL,
+                       .bank  = NULL,
                        .bank_number = 0,
                        .base_address = FLASH_BANK0_BASE_AX,
                        .controller_address = 0x400e0a00,
@@ -1697,9 +1653,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                  },
 /*             .bank[1] = { */
                  {
-                       .probed = 0,
-                       .pChip  = NULL,
-                       .pBank  = NULL,
+                       .probed = false,
+                       .chip  = NULL,
+                       .bank  = NULL,
                        .bank_number = 1,
                        .base_address = FLASH_BANK1_BASE_512K_AX,
                        .controller_address = 0x400e0c00,
@@ -1723,9 +1679,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                {
 /*             .bank[0] = { */
                  {
-                       .probed = 0,
-                       .pChip  = NULL,
-                       .pBank  = NULL,
+                       .probed = false,
+                       .chip  = NULL,
+                       .bank  = NULL,
                        .bank_number = 0,
                        .base_address = FLASH_BANK0_BASE_AX,
                        .controller_address = 0x400e0a00,
@@ -1738,9 +1694,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                  },
 /*             .bank[1] = { */
                  {
-                       .probed = 0,
-                       .pChip  = NULL,
-                       .pBank  = NULL,
+                       .probed = false,
+                       .chip  = NULL,
+                       .bank  = NULL,
                        .bank_number = 1,
                        .base_address = FLASH_BANK1_BASE_256K_AX,
                        .controller_address = 0x400e0c00,
@@ -1782,9 +1738,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                {
 /*             .bank[0] = { */
                  {
-                       .probed = 0,
-                       .pChip  = NULL,
-                       .pBank  = NULL,
+                       .probed = false,
+                       .chip  = NULL,
+                       .bank  = NULL,
                        .bank_number = 0,
                        .base_address = FLASH_BANK0_BASE_AX,
                        .controller_address = 0x400e0a00,
@@ -1797,9 +1753,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                  },
 /*             .bank[1] = { */
                  {
-                       .probed = 0,
-                       .pChip  = NULL,
-                       .pBank  = NULL,
+                       .probed = false,
+                       .chip  = NULL,
+                       .bank  = NULL,
                        .bank_number = 1,
                        .base_address = FLASH_BANK1_BASE_512K_AX,
                        .controller_address = 0x400e0c00,
@@ -1824,9 +1780,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                {
 /*             .bank[0] = { */
                  {
-                       .probed = 0,
-                       .pChip  = NULL,
-                       .pBank  = NULL,
+                       .probed = false,
+                       .chip  = NULL,
+                       .bank  = NULL,
                        .bank_number = 0,
                        .base_address = FLASH_BANK0_BASE_AX,
                        .controller_address = 0x400e0a00,
@@ -1839,9 +1795,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                  },
 /*             .bank[1] = { */
                  {
-                       .probed = 0,
-                       .pChip  = NULL,
-                       .pBank  = NULL,
+                       .probed = false,
+                       .chip  = NULL,
+                       .bank  = NULL,
                        .bank_number = 1,
                        .base_address = FLASH_BANK1_BASE_512K_AX,
                        .controller_address = 0x400e0c00,
@@ -1865,9 +1821,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                {
 /*             .bank[0] = { */
                  {
-                       .probed = 0,
-                       .pChip  = NULL,
-                       .pBank  = NULL,
+                       .probed = false,
+                       .chip  = NULL,
+                       .bank  = NULL,
                        .bank_number = 0,
                        .base_address = FLASH_BANK0_BASE_AX,
                        .controller_address = 0x400e0a00,
@@ -1880,9 +1836,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                  },
 /*             .bank[1] = { */
                  {
-                       .probed = 0,
-                       .pChip  = NULL,
-                       .pBank  = NULL,
+                       .probed = false,
+                       .chip  = NULL,
+                       .bank  = NULL,
                        .bank_number = 1,
                        .base_address = FLASH_BANK1_BASE_512K_AX,
                        .controller_address = 0x400e0c00,
@@ -1906,9 +1862,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                {
 /*             .bank[0] = { */
                  {
-                       .probed = 0,
-                       .pChip  = NULL,
-                       .pBank  = NULL,
+                       .probed = false,
+                       .chip  = NULL,
+                       .bank  = NULL,
                        .bank_number = 0,
                        .base_address = FLASH_BANK0_BASE_AX,
                        .controller_address = 0x400e0a00,
@@ -1921,11 +1877,11 @@ static const struct sam3_chip_details all_sam3_details[] = {
                  },
 /*             .bank[1] = { */
                  {
-                       .probed = 0,
-                       .pChip  = NULL,
-                       .pBank  = NULL,
+                       .probed = false,
+                       .chip  = NULL,
+                       .bank  = NULL,
                        .bank_number = 1,
-                       .base_address = FLASH_BANK1_BASE_512K_AX ,
+                       .base_address = FLASH_BANK1_BASE_512K_AX,
                        .controller_address = 0x400e0c00,
                        .flash_wait_states = 6, /* workaround silicon bug */
                        .present = 1,
@@ -1947,9 +1903,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                {
 /*             .bank[0] = { */
                  {
-                       .probed = 0,
-                       .pChip  = NULL,
-                       .pBank  = NULL,
+                       .probed = false,
+                       .chip  = NULL,
+                       .bank  = NULL,
                        .bank_number = 0,
                        .base_address = FLASH_BANK0_BASE_AX,
                        .controller_address = 0x400e0a00,
@@ -1962,9 +1918,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                  },
 /*             .bank[1] = { */
                  {
-                       .probed = 0,
-                       .pChip  = NULL,
-                       .pBank  = NULL,
+                       .probed = false,
+                       .chip  = NULL,
+                       .bank  = NULL,
                        .bank_number = 1,
                        .base_address = FLASH_BANK1_BASE_256K_AX,
                        .controller_address = 0x400e0c00,
@@ -1988,9 +1944,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                {
 /*             .bank[0] = { */
                  {
-                       .probed = 0,
-                       .pChip  = NULL,
-                       .pBank  = NULL,
+                       .probed = false,
+                       .chip  = NULL,
+                       .bank  = NULL,
                        .bank_number = 0,
                        .base_address = FLASH_BANK0_BASE_AX,
                        .controller_address = 0x400e0a00,
@@ -2003,9 +1959,9 @@ static const struct sam3_chip_details all_sam3_details[] = {
                  },
 /*             .bank[1] = { */
                  {
-                       .probed = 0,
-                       .pChip  = NULL,
-                       .pBank  = NULL,
+                       .probed = false,
+                       .chip  = NULL,
+                       .bank  = NULL,
                        .bank_number = 1,
                        .base_address = FLASH_BANK1_BASE_256K_AX,
                        .controller_address = 0x400e0c00,
@@ -2038,14 +1994,14 @@ static const struct sam3_chip_details all_sam3_details[] = {
 /**
  * Get the current status of the EEFC and
  * the value of some status bits (LOCKE, PROGE).
- * @param pPrivate - info about the bank
+ * @param private  - info about the bank
  * @param v        - result goes here
  */
-static int EFC_GetStatus(struct sam3_bank_private *pPrivate, uint32_t *v)
+static int efc_get_status(struct sam3_bank_private *private, uint32_t *v)
 {
        int r;
-       r = target_read_u32(pPrivate->pChip->target,
-                       pPrivate->controller_address + offset_EFC_FSR,
+       r = target_read_u32(private->chip->target,
+                       private->controller_address + OFFSET_EFC_FSR,
                        v);
        LOG_DEBUG("Status: 0x%08x (lockerror: %d, cmderror: %d, ready: %d)",
                (unsigned int)(*v),
@@ -2058,15 +2014,15 @@ static int EFC_GetStatus(struct sam3_bank_private *pPrivate, uint32_t *v)
 
 /**
  * Get the result of the last executed command.
- * @param pPrivate - info about the bank
+ * @param private  - info about the bank
  * @param v        - result goes here
  */
-static int EFC_GetResult(struct sam3_bank_private *pPrivate, uint32_t *v)
+static int efc_get_result(struct sam3_bank_private *private, uint32_t *v)
 {
        int r;
        uint32_t rv;
-       r = target_read_u32(pPrivate->pChip->target,
-                       pPrivate->controller_address + offset_EFC_FRR,
+       r = target_read_u32(private->chip->target,
+                       private->controller_address + OFFSET_EFC_FRR,
                        &rv);
        if (v)
                *v = rv;
@@ -2074,7 +2030,7 @@ static int EFC_GetResult(struct sam3_bank_private *pPrivate, uint32_t *v)
        return r;
 }
 
-static int EFC_StartCommand(struct sam3_bank_private *pPrivate,
+static int efc_start_command(struct sam3_bank_private *private,
        unsigned command, unsigned argument)
 {
        uint32_t n, v;
@@ -2095,16 +2051,16 @@ do_retry:
                /* case AT91C_EFC_FCMD_EPA: */
                case AT91C_EFC_FCMD_SLB:
                case AT91C_EFC_FCMD_CLB:
-                       n = (pPrivate->size_bytes / pPrivate->page_size);
+                       n = (private->size_bytes / private->page_size);
                        if (argument >= n)
                                LOG_ERROR("*BUG*: Embedded flash has only %u pages", (unsigned)(n));
                        break;
 
                case AT91C_EFC_FCMD_SFB:
                case AT91C_EFC_FCMD_CFB:
-                       if (argument >= pPrivate->pChip->details.n_gpnvms) {
+                       if (argument >= private->chip->details.n_gpnvms) {
                                LOG_ERROR("*BUG*: Embedded flash has only %d GPNVMs",
-                                               pPrivate->pChip->details.n_gpnvms);
+                                               private->chip->details.n_gpnvms);
                        }
                        break;
 
@@ -2129,7 +2085,7 @@ do_retry:
                /* Situation (2) - normal, finished reading unique id */
        } else {
                /* it should be "ready" */
-               EFC_GetStatus(pPrivate, &v);
+               efc_get_status(private, &v);
                if (v & 1) {
                        /* then it is ready */
                        /* we go on */
@@ -2138,14 +2094,14 @@ do_retry:
                                /* we have done this before */
                                /* the controller is not responding. */
                                LOG_ERROR("flash controller(%d) is not ready! Error",
-                                       pPrivate->bank_number);
+                                       private->bank_number);
                                return ERROR_FAIL;
                        } else {
                                retry++;
                                LOG_ERROR("Flash controller(%d) is not ready, attempting reset",
-                                       pPrivate->bank_number);
+                                       private->bank_number);
                                /* we do that by issuing the *STOP* command */
-                               EFC_StartCommand(pPrivate, AT91C_EFC_FCMD_SPUI, 0);
+                               efc_start_command(private, AT91C_EFC_FCMD_SPUI, 0);
                                /* above is recursive, and further recursion is blocked by */
                                /* if (command == AT91C_EFC_FCMD_SPUI) above */
                                goto do_retry;
@@ -2155,8 +2111,8 @@ do_retry:
 
        v = (0x5A << 24) | (argument << 8) | command;
        LOG_DEBUG("Command: 0x%08x", ((unsigned int)(v)));
-       r = target_write_u32(pPrivate->pBank->target,
-                       pPrivate->controller_address + offset_EFC_FCR, v);
+       r = target_write_u32(private->bank->target,
+                       private->controller_address + OFFSET_EFC_FCR, v);
        if (r != ERROR_OK)
                LOG_DEBUG("Error Write failed");
        return r;
@@ -2164,12 +2120,12 @@ do_retry:
 
 /**
  * Performs the given command and wait until its completion (or an error).
- * @param pPrivate - info about the bank
+ * @param private  - info about the bank
  * @param command  - Command to perform.
  * @param argument - Optional command argument.
  * @param status   - put command status bits here
  */
-static int EFC_PerformCommand(struct sam3_bank_private *pPrivate,
+static int efc_perform_command(struct sam3_bank_private *private,
        unsigned command,
        unsigned argument,
        uint32_t *status)
@@ -2177,20 +2133,20 @@ static int EFC_PerformCommand(struct sam3_bank_private *pPrivate,
 
        int r;
        uint32_t v;
-       long long ms_now, ms_end;
+       int64_t ms_now, ms_end;
 
        /* default */
        if (status)
                *status = 0;
 
-       r = EFC_StartCommand(pPrivate, command, argument);
+       r = efc_start_command(private, command, argument);
        if (r != ERROR_OK)
                return r;
 
        ms_end = 500 + timeval_ms();
 
        do {
-               r = EFC_GetStatus(pPrivate, &v);
+               r = efc_get_status(private, &v);
                if (r != ERROR_OK)
                        return r;
                ms_now = timeval_ms();
@@ -2210,87 +2166,87 @@ static int EFC_PerformCommand(struct sam3_bank_private *pPrivate,
 
 /**
  * Read the unique ID.
- * @param pPrivate - info about the bank
- * The unique ID is stored in the 'pPrivate' structure.
+ * @param private - info about the bank
+ * The unique ID is stored in the 'private' structure.
  */
-static int FLASHD_ReadUniqueID(struct sam3_bank_private *pPrivate)
+static int flashd_read_uid(struct sam3_bank_private *private)
 {
        int r;
        uint32_t v;
        int x;
        /* assume 0 */
-       pPrivate->pChip->cfg.unique_id[0] = 0;
-       pPrivate->pChip->cfg.unique_id[1] = 0;
-       pPrivate->pChip->cfg.unique_id[2] = 0;
-       pPrivate->pChip->cfg.unique_id[3] = 0;
+       private->chip->cfg.unique_id[0] = 0;
+       private->chip->cfg.unique_id[1] = 0;
+       private->chip->cfg.unique_id[2] = 0;
+       private->chip->cfg.unique_id[3] = 0;
 
        LOG_DEBUG("Begin");
-       r = EFC_StartCommand(pPrivate, AT91C_EFC_FCMD_STUI, 0);
+       r = efc_start_command(private, AT91C_EFC_FCMD_STUI, 0);
        if (r < 0)
                return r;
 
        for (x = 0; x < 4; x++) {
-               r = target_read_u32(pPrivate->pChip->target,
-                               pPrivate->pBank->base + (x * 4),
+               r = target_read_u32(private->chip->target,
+                               private->bank->base + (x * 4),
                                &v);
                if (r < 0)
                        return r;
-               pPrivate->pChip->cfg.unique_id[x] = v;
+               private->chip->cfg.unique_id[x] = v;
        }
 
-       r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_SPUI, 0, NULL);
+       r = efc_perform_command(private, AT91C_EFC_FCMD_SPUI, 0, NULL);
        LOG_DEBUG("End: R=%d, id = 0x%08x, 0x%08x, 0x%08x, 0x%08x",
                r,
-               (unsigned int)(pPrivate->pChip->cfg.unique_id[0]),
-               (unsigned int)(pPrivate->pChip->cfg.unique_id[1]),
-               (unsigned int)(pPrivate->pChip->cfg.unique_id[2]),
-               (unsigned int)(pPrivate->pChip->cfg.unique_id[3]));
+               (unsigned int)(private->chip->cfg.unique_id[0]),
+               (unsigned int)(private->chip->cfg.unique_id[1]),
+               (unsigned int)(private->chip->cfg.unique_id[2]),
+               (unsigned int)(private->chip->cfg.unique_id[3]));
        return r;
 
 }
 
 /**
  * Erases the entire flash.
- * @param pPrivate - the info about the bank.
+ * @param private - the info about the bank.
  */
-static int FLASHD_EraseEntireBank(struct sam3_bank_private *pPrivate)
+static int flashd_erase_entire_bank(struct sam3_bank_private *private)
 {
        LOG_DEBUG("Here");
-       return EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_EA, 0, NULL);
+       return efc_perform_command(private, AT91C_EFC_FCMD_EA, 0, NULL);
 }
 
 /**
  * Gets current GPNVM state.
- * @param pPrivate - info about the bank.
+ * @param private  - info about the bank.
  * @param gpnvm    -  GPNVM bit index.
  * @param puthere  - result stored here.
  */
 /* ------------------------------------------------------------------------------ */
-static int FLASHD_GetGPNVM(struct sam3_bank_private *pPrivate, unsigned gpnvm, unsigned *puthere)
+static int flashd_get_gpnvm(struct sam3_bank_private *private, unsigned gpnvm, unsigned *puthere)
 {
        uint32_t v;
        int r;
 
        LOG_DEBUG("Here");
-       if (pPrivate->bank_number != 0) {
+       if (private->bank_number != 0) {
                LOG_ERROR("GPNVM only works with Bank0");
                return ERROR_FAIL;
        }
 
-       if (gpnvm >= pPrivate->pChip->details.n_gpnvms) {
+       if (gpnvm >= private->chip->details.n_gpnvms) {
                LOG_ERROR("Invalid GPNVM %d, max: %d, ignored",
-                       gpnvm, pPrivate->pChip->details.n_gpnvms);
+                       gpnvm, private->chip->details.n_gpnvms);
                return ERROR_FAIL;
        }
 
        /* Get GPNVMs status */
-       r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_GFB, 0, NULL);
+       r = efc_perform_command(private, AT91C_EFC_FCMD_GFB, 0, NULL);
        if (r != ERROR_OK) {
                LOG_ERROR("Failed");
                return r;
        }
 
-       r = EFC_GetResult(pPrivate, &v);
+       r = efc_get_result(private, &v);
 
        if (puthere) {
                /* Check if GPNVM is set */
@@ -2303,59 +2259,59 @@ static int FLASHD_GetGPNVM(struct sam3_bank_private *pPrivate, unsigned gpnvm, u
 
 /**
  * Clears the selected GPNVM bit.
- * @param pPrivate info about the bank
+ * @param private info about the bank
  * @param gpnvm GPNVM index.
  * @returns 0 if successful; otherwise returns an error code.
  */
-static int FLASHD_ClrGPNVM(struct sam3_bank_private *pPrivate, unsigned gpnvm)
+static int flashd_clr_gpnvm(struct sam3_bank_private *private, unsigned gpnvm)
 {
        int r;
        unsigned v;
 
        LOG_DEBUG("Here");
-       if (pPrivate->bank_number != 0) {
+       if (private->bank_number != 0) {
                LOG_ERROR("GPNVM only works with Bank0");
                return ERROR_FAIL;
        }
 
-       if (gpnvm >= pPrivate->pChip->details.n_gpnvms) {
+       if (gpnvm >= private->chip->details.n_gpnvms) {
                LOG_ERROR("Invalid GPNVM %d, max: %d, ignored",
-                       gpnvm, pPrivate->pChip->details.n_gpnvms);
+                       gpnvm, private->chip->details.n_gpnvms);
                return ERROR_FAIL;
        }
 
-       r = FLASHD_GetGPNVM(pPrivate, gpnvm, &v);
+       r = flashd_get_gpnvm(private, gpnvm, &v);
        if (r != ERROR_OK) {
                LOG_DEBUG("Failed: %d", r);
                return r;
        }
-       r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_CFB, gpnvm, NULL);
+       r = efc_perform_command(private, AT91C_EFC_FCMD_CFB, gpnvm, NULL);
        LOG_DEBUG("End: %d", r);
        return r;
 }
 
 /**
  * Sets the selected GPNVM bit.
- * @param pPrivate info about the bank
+ * @param private info about the bank
  * @param gpnvm GPNVM index.
  */
-static int FLASHD_SetGPNVM(struct sam3_bank_private *pPrivate, unsigned gpnvm)
+static int flashd_set_gpnvm(struct sam3_bank_private *private, unsigned gpnvm)
 {
        int r;
        unsigned v;
 
-       if (pPrivate->bank_number != 0) {
+       if (private->bank_number != 0) {
                LOG_ERROR("GPNVM only works with Bank0");
                return ERROR_FAIL;
        }
 
-       if (gpnvm >= pPrivate->pChip->details.n_gpnvms) {
+       if (gpnvm >= private->chip->details.n_gpnvms) {
                LOG_ERROR("Invalid GPNVM %d, max: %d, ignored",
-                       gpnvm, pPrivate->pChip->details.n_gpnvms);
+                       gpnvm, private->chip->details.n_gpnvms);
                return ERROR_FAIL;
        }
 
-       r = FLASHD_GetGPNVM(pPrivate, gpnvm, &v);
+       r = flashd_get_gpnvm(private, gpnvm, &v);
        if (r != ERROR_OK)
                return r;
        if (v) {
@@ -2363,35 +2319,35 @@ static int FLASHD_SetGPNVM(struct sam3_bank_private *pPrivate, unsigned gpnvm)
                r = ERROR_OK;
        } else {
                /* set it */
-               r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_SFB, gpnvm, NULL);
+               r = efc_perform_command(private, AT91C_EFC_FCMD_SFB, gpnvm, NULL);
        }
        return r;
 }
 
 /**
  * Returns a bit field (at most 64) of locked regions within a page.
- * @param pPrivate info about the bank
+ * @param private info about the bank
  * @param v where to store locked bits
  */
-static int FLASHD_GetLockBits(struct sam3_bank_private *pPrivate, uint32_t *v)
+static int flashd_get_lock_bits(struct sam3_bank_private *private, uint32_t *v)
 {
        int r;
        LOG_DEBUG("Here");
-       r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_GLB, 0, NULL);
+       r = efc_perform_command(private, AT91C_EFC_FCMD_GLB, 0, NULL);
        if (r == ERROR_OK)
-               r = EFC_GetResult(pPrivate, v);
+               r = efc_get_result(private, v);
        LOG_DEBUG("End: %d", r);
        return r;
 }
 
 /**
  * Unlocks all the regions in the given address range.
- * @param pPrivate info about the bank
+ * @param private info about the bank
  * @param start_sector first sector to unlock
  * @param end_sector last (inclusive) to unlock
  */
 
-static int FLASHD_Unlock(struct sam3_bank_private *pPrivate,
+static int flashd_unlock(struct sam3_bank_private *private,
        unsigned start_sector,
        unsigned end_sector)
 {
@@ -2400,13 +2356,13 @@ static int FLASHD_Unlock(struct sam3_bank_private *pPrivate,
        uint32_t pg;
        uint32_t pages_per_sector;
 
-       pages_per_sector = pPrivate->sector_size / pPrivate->page_size;
+       pages_per_sector = private->sector_size / private->page_size;
 
        /* Unlock all pages */
        while (start_sector <= end_sector) {
                pg = start_sector * pages_per_sector;
 
-               r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_CLB, pg, &status);
+               r = efc_perform_command(private, AT91C_EFC_FCMD_CLB, pg, &status);
                if (r != ERROR_OK)
                        return r;
                start_sector++;
@@ -2417,11 +2373,11 @@ static int FLASHD_Unlock(struct sam3_bank_private *pPrivate,
 
 /**
  * Locks regions
- * @param pPrivate - info about the bank
+ * @param private - info about the bank
  * @param start_sector - first sector to lock
  * @param end_sector   - last sector (inclusive) to lock
  */
-static int FLASHD_Lock(struct sam3_bank_private *pPrivate,
+static int flashd_lock(struct sam3_bank_private *private,
        unsigned start_sector,
        unsigned end_sector)
 {
@@ -2430,13 +2386,13 @@ static int FLASHD_Lock(struct sam3_bank_private *pPrivate,
        uint32_t pages_per_sector;
        int r;
 
-       pages_per_sector = pPrivate->sector_size / pPrivate->page_size;
+       pages_per_sector = private->sector_size / private->page_size;
 
        /* Lock all pages */
        while (start_sector <= end_sector) {
                pg = start_sector * pages_per_sector;
 
-               r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_SLB, pg, &status);
+               r = efc_perform_command(private, AT91C_EFC_FCMD_SLB, pg, &status);
                if (r != ERROR_OK)
                        return r;
                start_sector++;
@@ -2448,7 +2404,7 @@ static int FLASHD_Lock(struct sam3_bank_private *pPrivate,
 
 /* begin helpful debug code */
 /* print the fieldname, the field value, in dec & hex, and return field value */
-static uint32_t sam3_reg_fieldname(struct sam3_chip *pChip,
+static uint32_t sam3_reg_fieldname(struct sam3_chip *chip,
        const char *regname,
        uint32_t value,
        unsigned shift,
@@ -2482,7 +2438,7 @@ static const char *const eproc_names[] = {
        _unknown,                                       /* 0 */
        "arm946es",                                     /* 1 */
        "arm7tdmi",                                     /* 2 */
-       "cortex-m3",                            /* 3 */
+       "Cortex-M3",                            /* 3 */
        "arm920t",                                      /* 4 */
        "arm926ejs",                            /* 5 */
        _unknown,                                       /* 6 */
@@ -2600,72 +2556,72 @@ static const char *const _rc_freq[] = {
        "4 MHz", "8 MHz", "12 MHz", "reserved"
 };
 
-static void sam3_explain_ckgr_mor(struct sam3_chip *pChip)
+static void sam3_explain_ckgr_mor(struct sam3_chip *chip)
 {
        uint32_t v;
        uint32_t rcen;
 
-       v = sam3_reg_fieldname(pChip, "MOSCXTEN", pChip->cfg.CKGR_MOR, 0, 1);
+       v = sam3_reg_fieldname(chip, "MOSCXTEN", chip->cfg.CKGR_MOR, 0, 1);
        LOG_USER("(main xtal enabled: %s)", _yes_or_no(v));
-       v = sam3_reg_fieldname(pChip, "MOSCXTBY", pChip->cfg.CKGR_MOR, 1, 1);
+       v = sam3_reg_fieldname(chip, "MOSCXTBY", chip->cfg.CKGR_MOR, 1, 1);
        LOG_USER("(main osc bypass: %s)", _yes_or_no(v));
-       rcen = sam3_reg_fieldname(pChip, "MOSCRCEN", pChip->cfg.CKGR_MOR, 3, 1);
+       rcen = sam3_reg_fieldname(chip, "MOSCRCEN", chip->cfg.CKGR_MOR, 3, 1);
        LOG_USER("(onchip RC-OSC enabled: %s)", _yes_or_no(rcen));
-       v = sam3_reg_fieldname(pChip, "MOSCRCF", pChip->cfg.CKGR_MOR, 4, 3);
+       v = sam3_reg_fieldname(chip, "MOSCRCF", chip->cfg.CKGR_MOR, 4, 3);
        LOG_USER("(onchip RC-OSC freq: %s)", _rc_freq[v]);
 
-       pChip->cfg.rc_freq = 0;
+       chip->cfg.rc_freq = 0;
        if (rcen) {
                switch (v) {
                        default:
-                               pChip->cfg.rc_freq = 0;
+                               chip->cfg.rc_freq = 0;
                                break;
                        case 0:
-                               pChip->cfg.rc_freq = 4 * 1000 * 1000;
+                               chip->cfg.rc_freq = 4 * 1000 * 1000;
                                break;
                        case 1:
-                               pChip->cfg.rc_freq = 8 * 1000 * 1000;
+                               chip->cfg.rc_freq = 8 * 1000 * 1000;
                                break;
                        case 2:
-                               pChip->cfg.rc_freq = 12 * 1000 * 1000;
+                               chip->cfg.rc_freq = 12 * 1000 * 1000;
                                break;
                }
        }
 
-       v = sam3_reg_fieldname(pChip, "MOSCXTST", pChip->cfg.CKGR_MOR, 8, 8);
+       v = sam3_reg_fieldname(chip, "MOSCXTST", chip->cfg.CKGR_MOR, 8, 8);
        LOG_USER("(startup clks, time= %f uSecs)",
-               ((float)(v * 1000000)) / ((float)(pChip->cfg.slow_freq)));
-       v = sam3_reg_fieldname(pChip, "MOSCSEL", pChip->cfg.CKGR_MOR, 24, 1);
+               ((float)(v * 1000000)) / ((float)(chip->cfg.slow_freq)));
+       v = sam3_reg_fieldname(chip, "MOSCSEL", chip->cfg.CKGR_MOR, 24, 1);
        LOG_USER("(mainosc source: %s)",
                v ? "external xtal" : "internal RC");
 
-       v = sam3_reg_fieldname(pChip, "CFDEN", pChip->cfg.CKGR_MOR, 25, 1);
+       v = sam3_reg_fieldname(chip, "CFDEN", chip->cfg.CKGR_MOR, 25, 1);
        LOG_USER("(clock failure enabled: %s)",
                _yes_or_no(v));
 }
 
-static void sam3_explain_chipid_cidr(struct sam3_chip *pChip)
+static void sam3_explain_chipid_cidr(struct sam3_chip *chip)
 {
        int x;
        uint32_t v;
        const char *cp;
 
-       sam3_reg_fieldname(pChip, "Version", pChip->cfg.CHIPID_CIDR, 0, 5);
+       sam3_reg_fieldname(chip, "Version", chip->cfg.CHIPID_CIDR, 0, 5);
        LOG_USER_N("\n");
 
-       v = sam3_reg_fieldname(pChip, "EPROC", pChip->cfg.CHIPID_CIDR, 5, 3);
+       v = sam3_reg_fieldname(chip, "EPROC", chip->cfg.CHIPID_CIDR, 5, 3);
        LOG_USER("%s", eproc_names[v]);
 
-       v = sam3_reg_fieldname(pChip, "NVPSIZE", pChip->cfg.CHIPID_CIDR, 8, 4);
+       v = sam3_reg_fieldname(chip, "NVPSIZE", chip->cfg.CHIPID_CIDR, 8, 4);
        LOG_USER("%s", nvpsize[v]);
 
-       v = sam3_reg_fieldname(pChip, "NVPSIZE2", pChip->cfg.CHIPID_CIDR, 12, 4);
+       v = sam3_reg_fieldname(chip, "NVPSIZE2", chip->cfg.CHIPID_CIDR, 12, 4);
        LOG_USER("%s", nvpsize2[v]);
 
-       v = sam3_reg_fieldname(pChip, "SRAMSIZE", pChip->cfg.CHIPID_CIDR, 16, 4);
+       v = sam3_reg_fieldname(chip, "SRAMSIZE", chip->cfg.CHIPID_CIDR, 16, 4);
        LOG_USER("%s", sramsize[v]);
 
-       v = sam3_reg_fieldname(pChip, "ARCH", pChip->cfg.CHIPID_CIDR, 20, 8);
+       v = sam3_reg_fieldname(chip, "ARCH", chip->cfg.CHIPID_CIDR, 20, 8);
        cp = _unknown;
        for (x = 0; archnames[x].name; x++) {
                if (v == archnames[x].value) {
@@ -2676,73 +2632,73 @@ static void sam3_explain_chipid_cidr(struct sam3_chip *pChip)
 
        LOG_USER("%s", cp);
 
-       v = sam3_reg_fieldname(pChip, "NVPTYP", pChip->cfg.CHIPID_CIDR, 28, 3);
+       v = sam3_reg_fieldname(chip, "NVPTYP", chip->cfg.CHIPID_CIDR, 28, 3);
        LOG_USER("%s", nvptype[v]);
 
-       v = sam3_reg_fieldname(pChip, "EXTID", pChip->cfg.CHIPID_CIDR, 31, 1);
+       v = sam3_reg_fieldname(chip, "EXTID", chip->cfg.CHIPID_CIDR, 31, 1);
        LOG_USER("(exists: %s)", _yes_or_no(v));
 }
 
-static void sam3_explain_ckgr_mcfr(struct sam3_chip *pChip)
+static void sam3_explain_ckgr_mcfr(struct sam3_chip *chip)
 {
        uint32_t v;
 
-       v = sam3_reg_fieldname(pChip, "MAINFRDY", pChip->cfg.CKGR_MCFR, 16, 1);
+       v = sam3_reg_fieldname(chip, "MAINFRDY", chip->cfg.CKGR_MCFR, 16, 1);
        LOG_USER("(main ready: %s)", _yes_or_no(v));
 
-       v = sam3_reg_fieldname(pChip, "MAINF", pChip->cfg.CKGR_MCFR, 0, 16);
+       v = sam3_reg_fieldname(chip, "MAINF", chip->cfg.CKGR_MCFR, 0, 16);
 
-       v = (v * pChip->cfg.slow_freq) / 16;
-       pChip->cfg.mainosc_freq = v;
+       v = (v * chip->cfg.slow_freq) / 16;
+       chip->cfg.mainosc_freq = v;
 
        LOG_USER("(%3.03f Mhz (%" PRIu32 ".%03" PRIu32 "khz slowclk)",
                _tomhz(v),
-               (uint32_t)(pChip->cfg.slow_freq / 1000),
-               (uint32_t)(pChip->cfg.slow_freq % 1000));
+               (uint32_t)(chip->cfg.slow_freq / 1000),
+               (uint32_t)(chip->cfg.slow_freq % 1000));
 }
 
-static void sam3_explain_ckgr_plla(struct sam3_chip *pChip)
+static void sam3_explain_ckgr_plla(struct sam3_chip *chip)
 {
        uint32_t mula, diva;
 
-       diva = sam3_reg_fieldname(pChip, "DIVA", pChip->cfg.CKGR_PLLAR, 0, 8);
+       diva = sam3_reg_fieldname(chip, "DIVA", chip->cfg.CKGR_PLLAR, 0, 8);
        LOG_USER_N("\n");
-       mula = sam3_reg_fieldname(pChip, "MULA", pChip->cfg.CKGR_PLLAR, 16, 11);
+       mula = sam3_reg_fieldname(chip, "MULA", chip->cfg.CKGR_PLLAR, 16, 11);
        LOG_USER_N("\n");
-       pChip->cfg.plla_freq = 0;
+       chip->cfg.plla_freq = 0;
        if (mula == 0)
                LOG_USER("\tPLLA Freq: (Disabled,mula = 0)");
        else if (diva == 0)
                LOG_USER("\tPLLA Freq: (Disabled,diva = 0)");
        else if (diva >= 1) {
-               pChip->cfg.plla_freq = (pChip->cfg.mainosc_freq * (mula + 1) / diva);
+               chip->cfg.plla_freq = (chip->cfg.mainosc_freq * (mula + 1) / diva);
                LOG_USER("\tPLLA Freq: %3.03f MHz",
-                       _tomhz(pChip->cfg.plla_freq));
+                       _tomhz(chip->cfg.plla_freq));
        }
 }
 
-static void sam3_explain_mckr(struct sam3_chip *pChip)
+static void sam3_explain_mckr(struct sam3_chip *chip)
 {
        uint32_t css, pres, fin = 0;
        int pdiv = 0;
        const char *cp = NULL;
 
-       css = sam3_reg_fieldname(pChip, "CSS", pChip->cfg.PMC_MCKR, 0, 2);
+       css = sam3_reg_fieldname(chip, "CSS", chip->cfg.PMC_MCKR, 0, 2);
        switch (css & 3) {
                case 0:
-                       fin = pChip->cfg.slow_freq;
+                       fin = chip->cfg.slow_freq;
                        cp = "slowclk";
                        break;
                case 1:
-                       fin = pChip->cfg.mainosc_freq;
+                       fin = chip->cfg.mainosc_freq;
                        cp  = "mainosc";
                        break;
                case 2:
-                       fin = pChip->cfg.plla_freq;
+                       fin = chip->cfg.plla_freq;
                        cp  = "plla";
                        break;
                case 3:
-                       if (pChip->cfg.CKGR_UCKR & (1 << 16)) {
+                       if (chip->cfg.CKGR_UCKR & (1 << 16)) {
                                fin = 480 * 1000 * 1000;
                                cp = "upll";
                        } else {
@@ -2758,7 +2714,7 @@ static void sam3_explain_mckr(struct sam3_chip *pChip)
        LOG_USER("%s (%3.03f Mhz)",
                cp,
                _tomhz(fin));
-       pres = sam3_reg_fieldname(pChip, "PRES", pChip->cfg.PMC_MCKR, 4, 3);
+       pres = sam3_reg_fieldname(chip, "PRES", chip->cfg.PMC_MCKR, 4, 3);
        switch (pres & 0x07) {
                case 0:
                        pdiv = 1;
@@ -2800,33 +2756,33 @@ static void sam3_explain_mckr(struct sam3_chip *pChip)
        fin = fin / pdiv;
        /* sam3 has a *SINGLE* clock - */
        /* other at91 series parts have divisors for these. */
-       pChip->cfg.cpu_freq = fin;
-       pChip->cfg.mclk_freq = fin;
-       pChip->cfg.fclk_freq = fin;
+       chip->cfg.cpu_freq = fin;
+       chip->cfg.mclk_freq = fin;
+       chip->cfg.fclk_freq = fin;
        LOG_USER("\t\tResult CPU Freq: %3.03f",
                _tomhz(fin));
 }
 
 #if 0
-static struct sam3_chip *target2sam3(struct target *pTarget)
+static struct sam3_chip *target2sam3(struct target *target)
 {
-       struct sam3_chip *pChip;
+       struct sam3_chip *chip;
 
-       if (pTarget == NULL)
+       if (!target)
                return NULL;
 
-       pChip = all_sam3_chips;
-       while (pChip) {
-               if (pChip->target == pTarget)
+       chip = all_sam3_chips;
+       while (chip) {
+               if (chip->target == target)
                        break;  /* return below */
                else
-                       pChip = pChip->next;
+                       chip = chip->next;
        }
-       return pChip;
+       return chip;
 }
 #endif
 
-static uint32_t *sam3_get_reg_ptr(struct sam3_cfg *pCfg, const struct sam3_reg_list *pList)
+static uint32_t *sam3_get_reg_ptr(struct sam3_cfg *cfg, const struct sam3_reg_list *list)
 {
        /* this function exists to help */
        /* keep funky offsetof() errors */
@@ -2835,7 +2791,7 @@ static uint32_t *sam3_get_reg_ptr(struct sam3_cfg *pCfg, const struct sam3_reg_l
        /* By using prototypes - we can detect what would */
        /* be casting errors. */
 
-       return (uint32_t *)(void *)(((char *)(pCfg)) + pList->struct_offset);
+       return (uint32_t *)(void *)(((char *)(cfg)) + list->struct_offset);
 }
 
 
@@ -2875,65 +2831,65 @@ static struct sam3_bank_private *get_sam3_bank_private(struct flash_bank *bank)
  * Given a pointer to where it goes in the structure,
  * determine the register name, address from the all registers table.
  */
-static const struct sam3_reg_list *sam3_GetReg(struct sam3_chip *pChip, uint32_t *goes_here)
+static const struct sam3_reg_list *sam3_get_reg(struct sam3_chip *chip, uint32_t *goes_here)
 {
-       const struct sam3_reg_list *pReg;
+       const struct sam3_reg_list *reg;
 
-       pReg = &(sam3_all_regs[0]);
-       while (pReg->name) {
-               uint32_t *pPossible;
+       reg = &(sam3_all_regs[0]);
+       while (reg->name) {
+               uint32_t *possible;
 
                /* calculate where this one go.. */
                /* it is "possibly" this register. */
 
-               pPossible = ((uint32_t *)(void *)(((char *)(&(pChip->cfg))) + pReg->struct_offset));
+               possible = ((uint32_t *)(void *)(((char *)(&(chip->cfg))) + reg->struct_offset));
 
                /* well? Is it this register */
-               if (pPossible == goes_here) {
+               if (possible == goes_here) {
                        /* Jump for joy! */
-                       return pReg;
+                       return reg;
                }
 
                /* next... */
-               pReg++;
+               reg++;
        }
        /* This is *TOTAL*PANIC* - we are totally screwed. */
        LOG_ERROR("INVALID SAM3 REGISTER");
        return NULL;
 }
 
-static int sam3_ReadThisReg(struct sam3_chip *pChip, uint32_t *goes_here)
+static int sam3_read_this_reg(struct sam3_chip *chip, uint32_t *goes_here)
 {
-       const struct sam3_reg_list *pReg;
+       const struct sam3_reg_list *reg;
        int r;
 
-       pReg = sam3_GetReg(pChip, goes_here);
-       if (!pReg)
+       reg = sam3_get_reg(chip, goes_here);
+       if (!reg)
                return ERROR_FAIL;
 
-       r = target_read_u32(pChip->target, pReg->address, goes_here);
+       r = target_read_u32(chip->target, reg->address, goes_here);
        if (r != ERROR_OK) {
                LOG_ERROR("Cannot read SAM3 register: %s @ 0x%08x, Err: %d",
-                       pReg->name, (unsigned)(pReg->address), r);
+                       reg->name, (unsigned)(reg->address), r);
        }
        return r;
 }
 
-static int sam3_ReadAllRegs(struct sam3_chip *pChip)
+static int sam3_read_all_regs(struct sam3_chip *chip)
 {
        int r;
-       const struct sam3_reg_list *pReg;
+       const struct sam3_reg_list *reg;
 
-       pReg = &(sam3_all_regs[0]);
-       while (pReg->name) {
-               r = sam3_ReadThisReg(pChip,
-                               sam3_get_reg_ptr(&(pChip->cfg), pReg));
+       reg = &(sam3_all_regs[0]);
+       while (reg->name) {
+               r = sam3_read_this_reg(chip,
+                               sam3_get_reg_ptr(&(chip->cfg), reg));
                if (r != ERROR_OK) {
                        LOG_ERROR("Cannot read SAM3 register: %s @ 0x%08x, Error: %d",
-                               pReg->name, ((unsigned)(pReg->address)), r);
+                               reg->name, ((unsigned)(reg->address)), r);
                        return r;
                }
-               pReg++;
+               reg++;
        }
 
        /* Chip identification register
@@ -2950,77 +2906,55 @@ static int sam3_ReadAllRegs(struct sam3_chip *pChip)
        * located in the memory map of the Power Management Controller
        * (PMC). Furthermore, the address is not used by the PMC.
        * So when read, the memory controller returns zero.*/
-       if (pChip->cfg.CHIPID_CIDR == 0)        {
-               /*Put the correct CIDR and EXID values in the pChip structure */
-               pChip->cfg.CHIPID_CIDR = pChip->cfg.CHIPID_CIDR2;
-               pChip->cfg.CHIPID_EXID = pChip->cfg.CHIPID_EXID2;
+       if (chip->cfg.CHIPID_CIDR == 0) {
+               /*Put the correct CIDR and EXID values in the chip structure */
+               chip->cfg.CHIPID_CIDR = chip->cfg.CHIPID_CIDR2;
+               chip->cfg.CHIPID_EXID = chip->cfg.CHIPID_EXID2;
        }
        return ERROR_OK;
 }
 
-static int sam3_GetInfo(struct sam3_chip *pChip)
+static int sam3_get_info(struct sam3_chip *chip)
 {
-       const struct sam3_reg_list *pReg;
+       const struct sam3_reg_list *reg;
        uint32_t regval;
 
-       pReg = &(sam3_all_regs[0]);
-       while (pReg->name) {
+       reg = &(sam3_all_regs[0]);
+       while (reg->name) {
                /* display all regs */
-               LOG_DEBUG("Start: %s", pReg->name);
-               regval = *sam3_get_reg_ptr(&(pChip->cfg), pReg);
+               LOG_DEBUG("Start: %s", reg->name);
+               regval = *sam3_get_reg_ptr(&(chip->cfg), reg);
                LOG_USER("%*s: [0x%08" PRIx32 "] -> 0x%08" PRIx32,
                        REG_NAME_WIDTH,
-                       pReg->name,
-                       pReg->address,
+                       reg->name,
+                       reg->address,
                        regval);
-               if (pReg->explain_func)
-                       (*(pReg->explain_func))(pChip);
-               LOG_DEBUG("End: %s", pReg->name);
-               pReg++;
+               if (reg->explain_func)
+                       (*(reg->explain_func))(chip);
+               LOG_DEBUG("End: %s", reg->name);
+               reg++;
        }
-       LOG_USER("   rc-osc: %3.03f MHz", _tomhz(pChip->cfg.rc_freq));
-       LOG_USER("  mainosc: %3.03f MHz", _tomhz(pChip->cfg.mainosc_freq));
-       LOG_USER("     plla: %3.03f MHz", _tomhz(pChip->cfg.plla_freq));
-       LOG_USER(" cpu-freq: %3.03f MHz", _tomhz(pChip->cfg.cpu_freq));
-       LOG_USER("mclk-freq: %3.03f MHz", _tomhz(pChip->cfg.mclk_freq));
+       LOG_USER("   rc-osc: %3.03f MHz", _tomhz(chip->cfg.rc_freq));
+       LOG_USER("  mainosc: %3.03f MHz", _tomhz(chip->cfg.mainosc_freq));
+       LOG_USER("     plla: %3.03f MHz", _tomhz(chip->cfg.plla_freq));
+       LOG_USER(" cpu-freq: %3.03f MHz", _tomhz(chip->cfg.cpu_freq));
+       LOG_USER("mclk-freq: %3.03f MHz", _tomhz(chip->cfg.mclk_freq));
 
        LOG_USER(" UniqueId: 0x%08" PRIx32 " 0x%08" PRIx32 " 0x%08" PRIx32 " 0x%08" PRIx32,
-               pChip->cfg.unique_id[0],
-               pChip->cfg.unique_id[1],
-               pChip->cfg.unique_id[2],
-               pChip->cfg.unique_id[3]);
+               chip->cfg.unique_id[0],
+               chip->cfg.unique_id[1],
+               chip->cfg.unique_id[2],
+               chip->cfg.unique_id[3]);
 
        return ERROR_OK;
 }
 
-static int sam3_erase_check(struct flash_bank *bank)
-{
-       int x;
-
-       LOG_DEBUG("Here");
-       if (bank->target->state != TARGET_HALTED) {
-               LOG_ERROR("Target not halted");
-               return ERROR_TARGET_NOT_HALTED;
-       }
-       if (0 == bank->num_sectors) {
-               LOG_ERROR("Target: not supported/not probed");
-               return ERROR_FAIL;
-       }
-
-       LOG_INFO("sam3 - supports auto-erase, erase_check ignored");
-       for (x = 0; x < bank->num_sectors; x++)
-               bank->sectors[x].is_erased = 1;
-
-       LOG_DEBUG("Done");
-       return ERROR_OK;
-}
-
 static int sam3_protect_check(struct flash_bank *bank)
 {
        int r;
        uint32_t v = 0;
        unsigned x;
-       struct sam3_bank_private *pPrivate;
+       struct sam3_bank_private *private;
 
        LOG_DEBUG("Begin");
        if (bank->target->state != TARGET_HALTED) {
@@ -3028,21 +2962,21 @@ static int sam3_protect_check(struct flash_bank *bank)
                return ERROR_TARGET_NOT_HALTED;
        }
 
-       pPrivate = get_sam3_bank_private(bank);
-       if (!pPrivate) {
+       private = get_sam3_bank_private(bank);
+       if (!private) {
                LOG_ERROR("no private for this bank?");
                return ERROR_FAIL;
        }
-       if (!(pPrivate->probed))
+       if (!(private->probed))
                return ERROR_FLASH_BANK_NOT_PROBED;
 
-       r = FLASHD_GetLockBits(pPrivate, &v);
+       r = flashd_get_lock_bits(private, &v);
        if (r != ERROR_OK) {
                LOG_DEBUG("Failed: %d", r);
                return r;
        }
 
-       for (x = 0; x < pPrivate->nsectors; x++)
+       for (x = 0; x < private->nsectors; x++)
                bank->sectors[x].is_protected = (!!(v & (1 << x)));
        LOG_DEBUG("Done");
        return ERROR_OK;
@@ -3050,32 +2984,32 @@ static int sam3_protect_check(struct flash_bank *bank)
 
 FLASH_BANK_COMMAND_HANDLER(sam3_flash_bank_command)
 {
-       struct sam3_chip *pChip;
+       struct sam3_chip *chip;
 
-       pChip = all_sam3_chips;
+       chip = all_sam3_chips;
 
        /* is this an existing chip? */
-       while (pChip) {
-               if (pChip->target == bank->target)
+       while (chip) {
+               if (chip->target == bank->target)
                        break;
-               pChip = pChip->next;
+               chip = chip->next;
        }
 
-       if (!pChip) {
+       if (!chip) {
                /* this is a *NEW* chip */
-               pChip = calloc(1, sizeof(struct sam3_chip));
-               if (!pChip) {
+               chip = calloc(1, sizeof(struct sam3_chip));
+               if (!chip) {
                        LOG_ERROR("NO RAM!");
                        return ERROR_FAIL;
                }
-               pChip->target = bank->target;
+               chip->target = bank->target;
                /* insert at head */
-               pChip->next = all_sam3_chips;
-               all_sam3_chips = pChip;
-               pChip->target = bank->target;
+               chip->next = all_sam3_chips;
+               all_sam3_chips = chip;
+               chip->target = bank->target;
                /* assumption is this runs at 32khz */
-               pChip->cfg.slow_freq = 32768;
-               pChip->probed = 0;
+               chip->cfg.slow_freq = 32768;
+               chip->probed = false;
        }
 
        switch (bank->base) {
@@ -3092,26 +3026,25 @@ FLASH_BANK_COMMAND_HANDLER(sam3_flash_bank_command)
                    ((unsigned int)(FLASH_BANK1_BASE_256K_AX)),
                    ((unsigned int)(FLASH_BANK1_BASE_512K_AX)));
                        return ERROR_FAIL;
-                       break;
 
                /* at91sam3s and at91sam3n series only has bank 0*/
                /* at91sam3u and at91sam3ax series has the same address for bank 0*/
                case FLASH_BANK_BASE_S:
                case FLASH_BANK0_BASE_U:
-                       bank->driver_priv = &(pChip->details.bank[0]);
+                       bank->driver_priv = &(chip->details.bank[0]);
                        bank->bank_number = 0;
-                       pChip->details.bank[0].pChip = pChip;
-                       pChip->details.bank[0].pBank = bank;
+                       chip->details.bank[0].chip = chip;
+                       chip->details.bank[0].bank = bank;
                        break;
 
                /* Bank 1 of at91sam3u or at91sam3ax series */
                case FLASH_BANK1_BASE_U:
                case FLASH_BANK1_BASE_256K_AX:
                case FLASH_BANK1_BASE_512K_AX:
-                       bank->driver_priv = &(pChip->details.bank[1]);
+                       bank->driver_priv = &(chip->details.bank[1]);
                        bank->bank_number = 1;
-                       pChip->details.bank[1].pChip = pChip;
-                       pChip->details.bank[1].pBank = bank;
+                       chip->details.bank[1].chip = chip;
+                       chip->details.bank[1].bank = bank;
                        break;
        }
 
@@ -3119,57 +3052,73 @@ FLASH_BANK_COMMAND_HANDLER(sam3_flash_bank_command)
        return ERROR_OK;
 }
 
-static int sam3_GetDetails(struct sam3_bank_private *pPrivate)
+/**
+ * Remove all chips from the internal list without distinguishing which one
+ * is owned by this bank. This simplification works only for one shot
+ * deallocation like current flash_free_all_banks()
+ */
+static void sam3_free_driver_priv(struct flash_bank *bank)
 {
-       const struct sam3_chip_details *pDetails;
-       struct sam3_chip *pChip;
+       struct sam3_chip *chip = all_sam3_chips;
+       while (chip) {
+               struct sam3_chip *next = chip->next;
+               free(chip);
+               chip = next;
+       }
+       all_sam3_chips = NULL;
+}
+
+static int sam3_get_details(struct sam3_bank_private *private)
+{
+       const struct sam3_chip_details *details;
+       struct sam3_chip *chip;
        struct flash_bank *saved_banks[SAM3_MAX_FLASH_BANKS];
        unsigned x;
 
        LOG_DEBUG("Begin");
-       pDetails = all_sam3_details;
-       while (pDetails->name) {
+       details = all_sam3_details;
+       while (details->name) {
                /* Compare cidr without version bits */
-               if (((pDetails->chipid_cidr ^ pPrivate->pChip->cfg.CHIPID_CIDR) & 0xFFFFFFE0) == 0)
+               if (((details->chipid_cidr ^ private->chip->cfg.CHIPID_CIDR) & 0xFFFFFFE0) == 0)
                        break;
                else
-                       pDetails++;
+                       details++;
        }
-       if (pDetails->name == NULL) {
+       if (!details->name) {
                LOG_ERROR("SAM3 ChipID 0x%08x not found in table (perhaps you can ID this chip?)",
-                       (unsigned int)(pPrivate->pChip->cfg.CHIPID_CIDR));
+                       (unsigned int)(private->chip->cfg.CHIPID_CIDR));
                /* Help the victim, print details about the chip */
                LOG_INFO("SAM3 CHIPID_CIDR: 0x%08" PRIx32 " decodes as follows",
-                       pPrivate->pChip->cfg.CHIPID_CIDR);
-               sam3_explain_chipid_cidr(pPrivate->pChip);
+                       private->chip->cfg.CHIPID_CIDR);
+               sam3_explain_chipid_cidr(private->chip);
                return ERROR_FAIL;
        }
 
        /* DANGER: THERE ARE DRAGONS HERE */
 
-       /* get our pChip - it is going */
+       /* get our chip - it is going */
        /* to be over-written shortly */
-       pChip = pPrivate->pChip;
+       chip = private->chip;
 
        /* Note that, in reality: */
        /*  */
-       /*     pPrivate = &(pChip->details.bank[0]) */
-       /* or  pPrivate = &(pChip->details.bank[1]) */
+       /*     private = &(chip->details.bank[0]) */
+       /* or  private = &(chip->details.bank[1]) */
        /*  */
 
        /* save the "bank" pointers */
        for (x = 0; x < SAM3_MAX_FLASH_BANKS; x++)
-               saved_banks[x] = pChip->details.bank[x].pBank;
+               saved_banks[x] = chip->details.bank[x].bank;
 
        /* Overwrite the "details" structure. */
-       memcpy(&(pPrivate->pChip->details),
-               pDetails,
-               sizeof(pPrivate->pChip->details));
+       memcpy(&(private->chip->details),
+               details,
+               sizeof(private->chip->details));
 
        /* now fix the ghosted pointers */
        for (x = 0; x < SAM3_MAX_FLASH_BANKS; x++) {
-               pChip->details.bank[x].pChip = pChip;
-               pChip->details.bank[x].pBank = saved_banks[x];
+               chip->details.bank[x].chip = chip;
+               chip->details.bank[x].bank = saved_banks[x];
        }
 
        /* update the *BANK*SIZE* */
@@ -3180,72 +3129,71 @@ static int sam3_GetDetails(struct sam3_bank_private *pPrivate)
 
 static int _sam3_probe(struct flash_bank *bank, int noise)
 {
-       unsigned x;
        int r;
-       struct sam3_bank_private *pPrivate;
+       struct sam3_bank_private *private;
 
 
-       LOG_DEBUG("Begin: Bank: %d, Noise: %d", bank->bank_number, noise);
+       LOG_DEBUG("Begin: Bank: %u, Noise: %d", bank->bank_number, noise);
        if (bank->target->state != TARGET_HALTED) {
                LOG_ERROR("Target not halted");
                return ERROR_TARGET_NOT_HALTED;
        }
 
-       pPrivate = get_sam3_bank_private(bank);
-       if (!pPrivate) {
+       private = get_sam3_bank_private(bank);
+       if (!private) {
                LOG_ERROR("Invalid/unknown bank number");
                return ERROR_FAIL;
        }
 
-       r = sam3_ReadAllRegs(pPrivate->pChip);
+       r = sam3_read_all_regs(private->chip);
        if (r != ERROR_OK)
                return r;
 
        LOG_DEBUG("Here");
-       if (pPrivate->pChip->probed)
-               r = sam3_GetInfo(pPrivate->pChip);
+       if (private->chip->probed)
+               r = sam3_get_info(private->chip);
        else
-               r = sam3_GetDetails(pPrivate);
+               r = sam3_get_details(private);
        if (r != ERROR_OK)
                return r;
 
        /* update the flash bank size */
-       for (x = 0; x < SAM3_MAX_FLASH_BANKS; x++) {
-               if (bank->base == pPrivate->pChip->details.bank[x].base_address) {
-                       bank->size = pPrivate->pChip->details.bank[x].size_bytes;
+       for (unsigned int x = 0; x < SAM3_MAX_FLASH_BANKS; x++) {
+               if (bank->base == private->chip->details.bank[x].base_address) {
+                       bank->size = private->chip->details.bank[x].size_bytes;
                        break;
                }
        }
 
-       if (bank->sectors == NULL) {
-               bank->sectors = calloc(pPrivate->nsectors, (sizeof((bank->sectors)[0])));
-               if (bank->sectors == NULL) {
+       if (!bank->sectors) {
+               bank->sectors = calloc(private->nsectors, (sizeof((bank->sectors)[0])));
+               if (!bank->sectors) {
                        LOG_ERROR("No memory!");
                        return ERROR_FAIL;
                }
-               bank->num_sectors = pPrivate->nsectors;
+               bank->num_sectors = private->nsectors;
 
-               for (x = 0; ((int)(x)) < bank->num_sectors; x++) {
-                       bank->sectors[x].size = pPrivate->sector_size;
-                       bank->sectors[x].offset = x * (pPrivate->sector_size);
+               for (unsigned int x = 0; x < bank->num_sectors; x++) {
+                       bank->sectors[x].size = private->sector_size;
+                       bank->sectors[x].offset = x * (private->sector_size);
                        /* mark as unknown */
                        bank->sectors[x].is_erased = -1;
                        bank->sectors[x].is_protected = -1;
                }
        }
 
-       pPrivate->probed = 1;
+       private->probed = true;
 
        r = sam3_protect_check(bank);
        if (r != ERROR_OK)
                return r;
 
        LOG_DEBUG("Bank = %d, nbanks = %d",
-               pPrivate->bank_number, pPrivate->pChip->details.n_banks);
-       if ((pPrivate->bank_number + 1) == pPrivate->pChip->details.n_banks) {
+               private->bank_number, private->chip->details.n_banks);
+       if ((private->bank_number + 1) == private->chip->details.n_banks) {
                /* read unique id, */
                /* it appears to be associated with the *last* flash bank. */
-               FLASHD_ReadUniqueID(pPrivate);
+               flashd_read_uid(private);
        }
 
        return r;
@@ -3261,9 +3209,10 @@ static int sam3_auto_probe(struct flash_bank *bank)
        return _sam3_probe(bank, 0);
 }
 
-static int sam3_erase(struct flash_bank *bank, int first, int last)
+static int sam3_erase(struct flash_bank *bank, unsigned int first,
+               unsigned int last)
 {
-       struct sam3_bank_private *pPrivate;
+       struct sam3_bank_private *private;
        int r;
 
        LOG_DEBUG("Here");
@@ -3278,22 +3227,23 @@ static int sam3_erase(struct flash_bank *bank, int first, int last)
                return r;
        }
 
-       pPrivate = get_sam3_bank_private(bank);
-       if (!(pPrivate->probed))
+       private = get_sam3_bank_private(bank);
+       if (!(private->probed))
                return ERROR_FLASH_BANK_NOT_PROBED;
 
-       if ((first == 0) && ((last + 1) == ((int)(pPrivate->nsectors)))) {
+       if ((first == 0) && ((last + 1) == private->nsectors)) {
                /* whole chip */
                LOG_DEBUG("Here");
-               return FLASHD_EraseEntireBank(pPrivate);
+               return flashd_erase_entire_bank(private);
        }
        LOG_INFO("sam3 auto-erases while programming (request ignored)");
        return ERROR_OK;
 }
 
-static int sam3_protect(struct flash_bank *bank, int set, int first, int last)
+static int sam3_protect(struct flash_bank *bank, int set, unsigned int first,
+               unsigned int last)
 {
-       struct sam3_bank_private *pPrivate;
+       struct sam3_bank_private *private;
        int r;
 
        LOG_DEBUG("Here");
@@ -3302,32 +3252,32 @@ static int sam3_protect(struct flash_bank *bank, int set, int first, int last)
                return ERROR_TARGET_NOT_HALTED;
        }
 
-       pPrivate = get_sam3_bank_private(bank);
-       if (!(pPrivate->probed))
+       private = get_sam3_bank_private(bank);
+       if (!(private->probed))
                return ERROR_FLASH_BANK_NOT_PROBED;
 
        if (set)
-               r = FLASHD_Lock(pPrivate, (unsigned)(first), (unsigned)(last));
+               r = flashd_lock(private, first, last);
        else
-               r = FLASHD_Unlock(pPrivate, (unsigned)(first), (unsigned)(last));
+               r = flashd_unlock(private, first, last);
        LOG_DEBUG("End: r=%d", r);
 
        return r;
 
 }
 
-static int sam3_page_read(struct sam3_bank_private *pPrivate, unsigned pagenum, uint8_t *buf)
+static int sam3_page_read(struct sam3_bank_private *private, unsigned pagenum, uint8_t *buf)
 {
        uint32_t adr;
        int r;
 
-       adr = pagenum * pPrivate->page_size;
-       adr += pPrivate->base_address;
+       adr = pagenum * private->page_size;
+       adr += private->base_address;
 
-       r = target_read_memory(pPrivate->pChip->target,
+       r = target_read_memory(private->chip->target,
                        adr,
                        4,                                      /* THIS*MUST*BE* in 32bit values */
-                       pPrivate->page_size / 4,
+                       private->page_size / 4,
                        buf);
        if (r != ERROR_OK)
                LOG_ERROR("SAM3: Flash program failed to read page phys address: 0x%08x",
@@ -3335,18 +3285,18 @@ static int sam3_page_read(struct sam3_bank_private *pPrivate, unsigned pagenum,
        return r;
 }
 
-static int sam3_page_write(struct sam3_bank_private *pPrivate, unsigned pagenum, const uint8_t *buf)
+static int sam3_page_write(struct sam3_bank_private *private, unsigned pagenum, const uint8_t *buf)
 {
        uint32_t adr;
        uint32_t status;
        uint32_t fmr;   /* EEFC Flash Mode Register */
        int r;
 
-       adr = pagenum * pPrivate->page_size;
-       adr += pPrivate->base_address;
+       adr = pagenum * private->page_size;
+       adr += private->base_address;
 
        /* Get flash mode register value */
-       r = target_read_u32(pPrivate->pChip->target, pPrivate->controller_address, &fmr);
+       r = target_read_u32(private->chip->target, private->controller_address, &fmr);
        if (r != ERROR_OK)
                LOG_DEBUG("Error Read failed: read flash mode register");
 
@@ -3354,18 +3304,18 @@ static int sam3_page_write(struct sam3_bank_private *pPrivate, unsigned pagenum,
        fmr &= 0xfffff0ff;
 
        /* set FWS (flash wait states) field in the FMR (flash mode register) */
-       fmr |= (pPrivate->flash_wait_states << 8);
+       fmr |= (private->flash_wait_states << 8);
 
        LOG_DEBUG("Flash Mode: 0x%08x", ((unsigned int)(fmr)));
-       r = target_write_u32(pPrivate->pBank->target, pPrivate->controller_address, fmr);
+       r = target_write_u32(private->bank->target, private->controller_address, fmr);
        if (r != ERROR_OK)
                LOG_DEBUG("Error Write failed: set flash mode register");
 
        LOG_DEBUG("Wr Page %u @ phys address: 0x%08x", pagenum, (unsigned int)(adr));
-       r = target_write_memory(pPrivate->pChip->target,
+       r = target_write_memory(private->chip->target,
                        adr,
                        4,                                      /* THIS*MUST*BE* in 32bit values */
-                       pPrivate->page_size / 4,
+                       private->page_size / 4,
                        buf);
        if (r != ERROR_OK) {
                LOG_ERROR("SAM3: Failed to write (buffer) page at phys address 0x%08x",
@@ -3373,7 +3323,7 @@ static int sam3_page_write(struct sam3_bank_private *pPrivate, unsigned pagenum,
                return r;
        }
 
-       r = EFC_PerformCommand(pPrivate,
+       r = efc_perform_command(private,
                        /* send Erase & Write Page */
                        AT91C_EFC_FCMD_EWP,
                        pagenum,
@@ -3403,10 +3353,10 @@ static int sam3_write(struct flash_bank *bank,
        unsigned page_end;
        int r;
        unsigned page_offset;
-       struct sam3_bank_private *pPrivate;
+       struct sam3_bank_private *private;
        uint8_t *pagebuffer;
 
-       /* incase we bail further below, set this to null */
+       /* in case we bail further below, set this to null */
        pagebuffer = NULL;
 
        /* ignore dumb requests */
@@ -3421,32 +3371,32 @@ static int sam3_write(struct flash_bank *bank,
                goto done;
        }
 
-       pPrivate = get_sam3_bank_private(bank);
-       if (!(pPrivate->probed)) {
+       private = get_sam3_bank_private(bank);
+       if (!(private->probed)) {
                r = ERROR_FLASH_BANK_NOT_PROBED;
                goto done;
        }
 
-       if ((offset + count) > pPrivate->size_bytes) {
+       if ((offset + count) > private->size_bytes) {
                LOG_ERROR("Flash write error - past end of bank");
                LOG_ERROR(" offset: 0x%08x, count 0x%08x, BankEnd: 0x%08x",
                        (unsigned int)(offset),
                        (unsigned int)(count),
-                       (unsigned int)(pPrivate->size_bytes));
+                       (unsigned int)(private->size_bytes));
                r = ERROR_FAIL;
                goto done;
        }
 
-       pagebuffer = malloc(pPrivate->page_size);
+       pagebuffer = malloc(private->page_size);
        if (!pagebuffer) {
-               LOG_ERROR("No memory for %d Byte page buffer", (int)(pPrivate->page_size));
+               LOG_ERROR("No memory for %d Byte page buffer", (int)(private->page_size));
                r = ERROR_FAIL;
                goto done;
        }
 
        /* what page do we start & end in? */
-       page_cur = offset / pPrivate->page_size;
-       page_end = (offset + count - 1) / pPrivate->page_size;
+       page_cur = offset / private->page_size;
+       page_end = (offset + count - 1) / private->page_size;
 
        LOG_DEBUG("Offset: 0x%08x, Count: 0x%08x", (unsigned int)(offset), (unsigned int)(count));
        LOG_DEBUG("Page start: %d, Page End: %d", (int)(page_cur), (int)(page_end));
@@ -3461,16 +3411,16 @@ static int sam3_write(struct flash_bank *bank,
        /* Handle special case - all one page. */
        if (page_cur == page_end) {
                LOG_DEBUG("Special case, all in one page");
-               r = sam3_page_read(pPrivate, page_cur, pagebuffer);
+               r = sam3_page_read(private, page_cur, pagebuffer);
                if (r != ERROR_OK)
                        goto done;
 
-               page_offset = (offset & (pPrivate->page_size-1));
+               page_offset = (offset & (private->page_size-1));
                memcpy(pagebuffer + page_offset,
                        buffer,
                        count);
 
-               r = sam3_page_write(pPrivate, page_cur, pagebuffer);
+               r = sam3_page_write(private, page_cur, pagebuffer);
                if (r != ERROR_OK)
                        goto done;
                r = ERROR_OK;
@@ -3478,21 +3428,21 @@ static int sam3_write(struct flash_bank *bank,
        }
 
        /* non-aligned start */
-       page_offset = offset & (pPrivate->page_size - 1);
+       page_offset = offset & (private->page_size - 1);
        if (page_offset) {
                LOG_DEBUG("Not-Aligned start");
                /* read the partial */
-               r = sam3_page_read(pPrivate, page_cur, pagebuffer);
+               r = sam3_page_read(private, page_cur, pagebuffer);
                if (r != ERROR_OK)
                        goto done;
 
                /* over-write with new data */
-               n = (pPrivate->page_size - page_offset);
+               n = (private->page_size - page_offset);
                memcpy(pagebuffer + page_offset,
                        buffer,
                        n);
 
-               r = sam3_page_write(pPrivate, page_cur, pagebuffer);
+               r = sam3_page_write(private, page_cur, pagebuffer);
                if (r != ERROR_OK)
                        goto done;
 
@@ -3504,7 +3454,7 @@ static int sam3_write(struct flash_bank *bank,
 
        /* By checking that offset is correct here, we also
        fix a clang warning */
-       assert(offset % pPrivate->page_size == 0);
+       assert(offset % private->page_size == 0);
 
        /* intermediate large pages */
        /* also - the final *terminal* */
@@ -3513,12 +3463,12 @@ static int sam3_write(struct flash_bank *bank,
                (int)page_cur, (int)page_end, (unsigned int)(count));
 
        while ((page_cur < page_end) &&
-                       (count >= pPrivate->page_size)) {
-               r = sam3_page_write(pPrivate, page_cur, buffer);
+                       (count >= private->page_size)) {
+               r = sam3_page_write(private, page_cur, buffer);
                if (r != ERROR_OK)
                        goto done;
-               count -= pPrivate->page_size;
-               buffer += pPrivate->page_size;
+               count -= private->page_size;
+               buffer += private->page_size;
                page_cur += 1;
        }
 
@@ -3526,38 +3476,37 @@ static int sam3_write(struct flash_bank *bank,
        if (count) {
                LOG_DEBUG("Terminal partial page, count = 0x%08x", (unsigned int)(count));
                /* we have a partial page */
-               r = sam3_page_read(pPrivate, page_cur, pagebuffer);
+               r = sam3_page_read(private, page_cur, pagebuffer);
                if (r != ERROR_OK)
                        goto done;
                                        /* data goes at start */
                memcpy(pagebuffer, buffer, count);
-               r = sam3_page_write(pPrivate, page_cur, pagebuffer);
+               r = sam3_page_write(private, page_cur, pagebuffer);
                if (r != ERROR_OK)
                        goto done;
        }
        LOG_DEBUG("Done!");
        r = ERROR_OK;
 done:
-       if (pagebuffer)
-               free(pagebuffer);
+       free(pagebuffer);
        return r;
 }
 
 COMMAND_HANDLER(sam3_handle_info_command)
 {
-       struct sam3_chip *pChip;
-       pChip = get_current_sam3(CMD_CTX);
-       if (!pChip)
+       struct sam3_chip *chip;
+       chip = get_current_sam3(CMD);
+       if (!chip)
                return ERROR_OK;
 
        unsigned x;
        int r;
 
        /* bank0 must exist before we can do anything */
-       if (pChip->details.bank[0].pBank == NULL) {
+       if (!chip->details.bank[0].bank) {
                x = 0;
 need_define:
-               command_print(CMD_CTX,
+               command_print(CMD,
                        "Please define bank %d via command: flash bank %s ... ",
                        x,
                        at91sam3_flash.name);
@@ -3565,8 +3514,8 @@ need_define:
        }
 
        /* if bank 0 is not probed, then probe it */
-       if (!(pChip->details.bank[0].probed)) {
-               r = sam3_auto_probe(pChip->details.bank[0].pBank);
+       if (!(chip->details.bank[0].probed)) {
+               r = sam3_auto_probe(chip->details.bank[0].bank);
                if (r != ERROR_OK)
                        return ERROR_FAIL;
        }
@@ -3577,21 +3526,21 @@ need_define:
        /* auto-probe other banks, 0 done above */
        for (x = 1; x < SAM3_MAX_FLASH_BANKS; x++) {
                /* skip banks not present */
-               if (!(pChip->details.bank[x].present))
+               if (!(chip->details.bank[x].present))
                        continue;
 
-               if (pChip->details.bank[x].pBank == NULL)
+               if (!chip->details.bank[x].bank)
                        goto need_define;
 
-               if (pChip->details.bank[x].probed)
+               if (chip->details.bank[x].probed)
                        continue;
 
-               r = sam3_auto_probe(pChip->details.bank[x].pBank);
+               r = sam3_auto_probe(chip->details.bank[x].bank);
                if (r != ERROR_OK)
                        return r;
        }
 
-       r = sam3_GetInfo(pChip);
+       r = sam3_get_info(chip);
        if (r != ERROR_OK) {
                LOG_DEBUG("Sam3Info, Failed %d", r);
                return r;
@@ -3604,24 +3553,24 @@ COMMAND_HANDLER(sam3_handle_gpnvm_command)
 {
        unsigned x, v;
        int r, who;
-       struct sam3_chip *pChip;
+       struct sam3_chip *chip;
 
-       pChip = get_current_sam3(CMD_CTX);
-       if (!pChip)
+       chip = get_current_sam3(CMD);
+       if (!chip)
                return ERROR_OK;
 
-       if (pChip->target->state != TARGET_HALTED) {
+       if (chip->target->state != TARGET_HALTED) {
                LOG_ERROR("sam3 - target not halted");
                return ERROR_TARGET_NOT_HALTED;
        }
 
-       if (pChip->details.bank[0].pBank == NULL) {
-               command_print(CMD_CTX, "Bank0 must be defined first via: flash bank %s ...",
+       if (!chip->details.bank[0].bank) {
+               command_print(CMD, "Bank0 must be defined first via: flash bank %s ...",
                        at91sam3_flash.name);
                return ERROR_FAIL;
        }
-       if (!pChip->details.bank[0].probed) {
-               r = sam3_auto_probe(pChip->details.bank[0].pBank);
+       if (!chip->details.bank[0].probed) {
+               r = sam3_auto_probe(chip->details.bank[0].bank);
                if (r != ERROR_OK)
                        return r;
        }
@@ -3629,15 +3578,13 @@ COMMAND_HANDLER(sam3_handle_gpnvm_command)
        switch (CMD_ARGC) {
                default:
                        return ERROR_COMMAND_SYNTAX_ERROR;
-                       break;
                case 0:
                        goto showall;
-                       break;
                case 1:
                        who = -1;
                        break;
                case 2:
-                       if ((0 == strcmp(CMD_ARGV[0], "show")) && (0 == strcmp(CMD_ARGV[1], "all")))
+                       if ((strcmp(CMD_ARGV[0], "show") == 0) && (strcmp(CMD_ARGV[1], "all") == 0))
                                who = -1;
                        else {
                                uint32_t v32;
@@ -3647,40 +3594,41 @@ COMMAND_HANDLER(sam3_handle_gpnvm_command)
                        break;
        }
 
-       if (0 == strcmp("show", CMD_ARGV[0])) {
+       if (strcmp("show", CMD_ARGV[0]) == 0) {
                if (who == -1) {
 showall:
                        r = ERROR_OK;
-                       for (x = 0; x < pChip->details.n_gpnvms; x++) {
-                               r = FLASHD_GetGPNVM(&(pChip->details.bank[0]), x, &v);
+                       for (x = 0; x < chip->details.n_gpnvms; x++) {
+                               r = flashd_get_gpnvm(&(chip->details.bank[0]), x, &v);
                                if (r != ERROR_OK)
                                        break;
-                               command_print(CMD_CTX, "sam3-gpnvm%u: %u", x, v);
+                               command_print(CMD, "sam3-gpnvm%u: %u", x, v);
                        }
                        return r;
                }
-               if ((who >= 0) && (((unsigned)(who)) < pChip->details.n_gpnvms)) {
-                       r = FLASHD_GetGPNVM(&(pChip->details.bank[0]), who, &v);
-                       command_print(CMD_CTX, "sam3-gpnvm%u: %u", who, v);
+               if ((who >= 0) && (((unsigned)(who)) < chip->details.n_gpnvms)) {
+                       r = flashd_get_gpnvm(&(chip->details.bank[0]), who, &v);
+                       if (r == ERROR_OK)
+                               command_print(CMD, "sam3-gpnvm%u: %u", who, v);
                        return r;
                } else {
-                       command_print(CMD_CTX, "sam3-gpnvm invalid GPNVM: %u", who);
+                       command_print(CMD, "sam3-gpnvm invalid GPNVM: %u", who);
                        return ERROR_COMMAND_SYNTAX_ERROR;
                }
        }
 
        if (who == -1) {
-               command_print(CMD_CTX, "Missing GPNVM number");
+               command_print(CMD, "Missing GPNVM number");
                return ERROR_COMMAND_SYNTAX_ERROR;
        }
 
-       if (0 == strcmp("set", CMD_ARGV[0]))
-               r = FLASHD_SetGPNVM(&(pChip->details.bank[0]), who);
-       else if ((0 == strcmp("clr", CMD_ARGV[0])) ||
-                (0 == strcmp("clear", CMD_ARGV[0])))                   /* quietly accept both */
-               r = FLASHD_ClrGPNVM(&(pChip->details.bank[0]), who);
+       if (strcmp("set", CMD_ARGV[0]) == 0)
+               r = flashd_set_gpnvm(&(chip->details.bank[0]), who);
+       else if ((strcmp("clr", CMD_ARGV[0]) == 0) ||
+                (strcmp("clear", CMD_ARGV[0]) == 0))                   /* quietly accept both */
+               r = flashd_clr_gpnvm(&(chip->details.bank[0]), who);
        else {
-               command_print(CMD_CTX, "Unknown command: %s", CMD_ARGV[0]);
+               command_print(CMD, "Unknown command: %s", CMD_ARGV[0]);
                r = ERROR_COMMAND_SYNTAX_ERROR;
        }
        return r;
@@ -3688,10 +3636,10 @@ showall:
 
 COMMAND_HANDLER(sam3_handle_slowclk_command)
 {
-       struct sam3_chip *pChip;
+       struct sam3_chip *chip;
 
-       pChip = get_current_sam3(CMD_CTX);
-       if (!pChip)
+       chip = get_current_sam3(CMD);
+       if (!chip)
                return ERROR_OK;
 
        switch (CMD_ARGC) {
@@ -3705,21 +3653,20 @@ COMMAND_HANDLER(sam3_handle_slowclk_command)
                        COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], v);
                        if (v > 200000) {
                                /* absurd slow clock of 200Khz? */
-                               command_print(CMD_CTX, "Absurd/illegal slow clock freq: %d\n", (int)(v));
+                               command_print(CMD, "Absurd/illegal slow clock freq: %d\n", (int)(v));
                                return ERROR_COMMAND_SYNTAX_ERROR;
                        }
-                       pChip->cfg.slow_freq = v;
+                       chip->cfg.slow_freq = v;
                        break;
                }
                default:
                        /* error */
-                       command_print(CMD_CTX, "Too many parameters");
+                       command_print(CMD, "Too many parameters");
                        return ERROR_COMMAND_SYNTAX_ERROR;
-                       break;
        }
-       command_print(CMD_CTX, "Slowclk freq: %d.%03dkhz",
-               (int)(pChip->cfg.slow_freq / 1000),
-               (int)(pChip->cfg.slow_freq % 1000));
+       command_print(CMD, "Slowclk freq: %d.%03dkhz",
+               (int)(chip->cfg.slow_freq / 1000),
+               (int)(chip->cfg.slow_freq % 1000));
        return ERROR_OK;
 }
 
@@ -3737,8 +3684,9 @@ static const struct command_registration at91sam3_exec_command_handlers[] = {
                .name = "info",
                .handler = sam3_handle_info_command,
                .mode = COMMAND_EXEC,
-               .help = "Print information about the current at91sam3 chip"
+               .help = "Print information about the current at91sam3 chip "
                        "and its flash configuration.",
+               .usage = "",
        },
        {
                .name = "slowclk",
@@ -3761,7 +3709,7 @@ static const struct command_registration at91sam3_command_handlers[] = {
        COMMAND_REGISTRATION_DONE
 };
 
-struct flash_driver at91sam3_flash = {
+const struct flash_driver at91sam3_flash = {
        .name = "at91sam3",
        .commands = at91sam3_command_handlers,
        .flash_bank_command = sam3_flash_bank_command,
@@ -3771,6 +3719,7 @@ struct flash_driver at91sam3_flash = {
        .read = default_flash_read,
        .probe = sam3_probe,
        .auto_probe = sam3_auto_probe,
-       .erase_check = sam3_erase_check,
+       .erase_check = default_flash_blank_check,
        .protect_check = sam3_protect_check,
+       .free_driver_priv = sam3_free_driver_priv,
 };