flash_bank_t -> struct flash_bank

[fw/openocd] / src / flash / non_cfi.c

diff --git a/src/flash/non_cfi.c b/src/flash/non_cfi.c
index 90de787945a6d4170bfb26ad9439b6c9b006999c..f98b108014c621232c38b54cd583e50bb94014d2 100644 (file)
--- a/src/flash/non_cfi.c
+++ b/src/flash/non_cfi.c
@@ -32,7 +32,7 @@
 #define ERASE_REGION(num, size) (((size/256) << 16) | (num-1))
 
 /* non-CFI compatible flashes */
-static non_cfi_t non_cfi_flashes[] = {
+static struct non_cfi non_cfi_flashes[] = {
        {
                .mfr = CFI_MFR_SST,
                .id = 0xd4,
@@ -140,7 +140,10 @@ static non_cfi_t non_cfi_flashes[] = {
 
        /* SST 39VF* do not support DQ5 status polling - this currently is
           only supported by the host algorithm, not by the target code using
-          the work area. */
+          the work area.
+           Only true for 8-bit and 32-bit wide memories. 16-bit wide memories
+           without DQ5 status polling are supported by the target code.
+        */
        {
                .mfr = CFI_MFR_SST,
                .id = 0x2782,                           /* SST39xF160 */
@@ -400,10 +403,10 @@ static non_cfi_t non_cfi_flashes[] = {
        }
 };
 
-void cfi_fixup_non_cfi(flash_bank_t *bank)
+void cfi_fixup_non_cfi(struct flash_bank *bank)
 {
-       cfi_flash_bank_t *cfi_info = bank->driver_priv;
-       non_cfi_t *non_cfi = non_cfi_flashes;
+       struct cfi_flash_bank *cfi_info = bank->driver_priv;
+       struct non_cfi *non_cfi = non_cfi_flashes;
 
        for (non_cfi = non_cfi_flashes; non_cfi->mfr; non_cfi++)
        {
@@ -453,7 +456,7 @@ void cfi_fixup_non_cfi(flash_bank_t *bank)
 
        if (cfi_info->pri_id == 0x2)
        {
-               cfi_spansion_pri_ext_t *pri_ext = malloc(sizeof(cfi_spansion_pri_ext_t));
+               struct cfi_spansion_pri_ext *pri_ext = malloc(sizeof(struct cfi_spansion_pri_ext));
 
                pri_ext->pri[0] = 'P';
                pri_ext->pri[1] = 'R';