#include "config.h"
#endif
-#include "replacements.h"
-#include "log.h"
-
-#include <stdlib.h>
-#include <string.h>
-#include <inttypes.h>
-
-#include <errno.h>
-
#include "nand.h"
-#include "flash.h"
#include "time_support.h"
#include "fileio.h"
-#include "image.h"
-int nand_register_commands(struct command_context_s *cmd_ctx);
-int handle_nand_list_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_nand_check_bad_blocks_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_nand_list_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_nand_check_bad_blocks_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
-int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
-int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size);
+static int nand_read_page(struct nand_device_s *device, u32 page, uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size);
+//static int nand_read_plain(struct nand_device_s *device, u32 address, uint8_t *data, u32 data_size);
-int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
-int nand_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
+static int nand_write_page(struct nand_device_s *device, u32 page, uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size);
/* NAND flash controller
*/
+extern nand_flash_controller_t davinci_nand_controller;
extern nand_flash_controller_t lpc3180_nand_controller;
+extern nand_flash_controller_t orion_nand_controller;
extern nand_flash_controller_t s3c2410_nand_controller;
extern nand_flash_controller_t s3c2412_nand_controller;
extern nand_flash_controller_t s3c2440_nand_controller;
/* extern nand_flash_controller_t boundary_scan_nand_controller; */
-nand_flash_controller_t *nand_flash_controllers[] =
+static nand_flash_controller_t *nand_flash_controllers[] =
{
+ &davinci_nand_controller,
&lpc3180_nand_controller,
+ &orion_nand_controller,
&s3c2410_nand_controller,
&s3c2412_nand_controller,
&s3c2440_nand_controller,
};
/* configured NAND devices and NAND Flash command handler */
-nand_device_t *nand_devices = NULL;
+static nand_device_t *nand_devices = NULL;
static command_t *nand_cmd;
/* Chip ID list
* 256 256 Byte page size
* 512 512 Byte page size
*/
-nand_info_t nand_flash_ids[] =
+static nand_info_t nand_flash_ids[] =
{
+ /* start "museum" IDs */
{"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0},
{"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0},
{"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, 0},
{"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, 0},
{"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16},
{"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16},
+ /* end "museum" IDs */
{"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, 0},
{"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, 0},
{"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, LP_OPTIONS16},
{"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16},
- {NULL, 0,}
+ {NULL, 0, 0, 0, 0, 0 }
};
/* Manufacturer ID list
*/
-nand_manufacturer_t nand_manuf_ids[] =
+static nand_manufacturer_t nand_manuf_ids[] =
{
{0x0, "unknown"},
{NAND_MFR_TOSHIBA, "Toshiba"},
{NAND_MFR_RENESAS, "Renesas"},
{NAND_MFR_STMICRO, "ST Micro"},
{NAND_MFR_HYNIX, "Hynix"},
+ {NAND_MFR_MICRON, "Micron"},
{0x0, NULL},
};
+/*
+ * Define default oob placement schemes for large and small page devices
+ */
+
+#if 0
+static nand_ecclayout_t nand_oob_8 = {
+ .eccbytes = 3,
+ .eccpos = {0, 1, 2},
+ .oobfree = {
+ {.offset = 3,
+ .length = 2},
+ {.offset = 6,
+ .length = 2}}
+};
+#endif
+
+static nand_ecclayout_t nand_oob_16 = {
+ .eccbytes = 6,
+ .eccpos = {0, 1, 2, 3, 6, 7},
+ .oobfree = {
+ {.offset = 8,
+ . length = 8}}
+};
+
+static nand_ecclayout_t nand_oob_64 = {
+ .eccbytes = 24,
+ .eccpos = {
+ 40, 41, 42, 43, 44, 45, 46, 47,
+ 48, 49, 50, 51, 52, 53, 54, 55,
+ 56, 57, 58, 59, 60, 61, 62, 63},
+ .oobfree = {
+ {.offset = 2,
+ .length = 38}}
+};
+
/* nand device <nand_controller> [controller options]
*/
-int handle_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
int i;
int retval;
-
+
if (argc < 1)
{
LOG_WARNING("incomplete flash device nand configuration");
return ERROR_FLASH_BANK_INVALID;
}
-
+
for (i = 0; nand_flash_controllers[i]; i++)
{
nand_device_t *p, *c;
-
+
if (strcmp(args[0], nand_flash_controllers[i]->name) == 0)
{
/* register flash specific commands */
LOG_ERROR("couldn't register '%s' commands", args[0]);
return retval;
}
-
+
c = malloc(sizeof(nand_device_t));
c->controller = nand_flash_controllers[i];
free(c);
return ERROR_OK;
}
-
+
/* put NAND device in linked list */
if (nand_devices)
{
{
nand_devices = c;
}
-
+
return ERROR_OK;
}
}
{
LOG_ERROR("%i: %s", i, nand_flash_controllers[i]->name);
}
-
+
return ERROR_OK;
}
int nand_register_commands(struct command_context_s *cmd_ctx)
{
nand_cmd = register_command(cmd_ctx, NULL, "nand", NULL, COMMAND_ANY, "NAND specific commands");
-
+
register_command(cmd_ctx, nand_cmd, "device", handle_nand_device_command, COMMAND_CONFIG, NULL);
-
+
return ERROR_OK;
}
register_command(cmd_ctx, nand_cmd, "probe", handle_nand_probe_command, COMMAND_EXEC,
"identify NAND flash device <num>");
register_command(cmd_ctx, nand_cmd, "check_bad_blocks", handle_nand_check_bad_blocks_command, COMMAND_EXEC,
- "check NAND flash device <num> for bad blocks [<first> <last>]");
+ "check NAND flash device <num> for bad blocks [<offset> <length>]");
register_command(cmd_ctx, nand_cmd, "erase", handle_nand_erase_command, COMMAND_EXEC,
- "erase blocks on NAND flash device <num> <first> <last>");
- register_command(cmd_ctx, nand_cmd, "copy", handle_nand_copy_command, COMMAND_EXEC,
- "copy from NAND flash device <num> <offset> <length> <ram-address>");
+ "erase blocks on NAND flash device <num> <offset> <length>");
register_command(cmd_ctx, nand_cmd, "dump", handle_nand_dump_command, COMMAND_EXEC,
- "dump from NAND flash device <num> <filename> <offset> <size> [options]");
+ "dump from NAND flash device <num> <filename> "
+ "<offset> <length> [oob_raw|oob_only]");
register_command(cmd_ctx, nand_cmd, "write", handle_nand_write_command, COMMAND_EXEC,
- "write to NAND flash device <num> <filename> <offset> [options]");
+ "write to NAND flash device <num> <filename> <offset> [oob_raw|oob_only|oob_softecc|oob_softecc_kw]");
register_command(cmd_ctx, nand_cmd, "raw_access", handle_nand_raw_access_command, COMMAND_EXEC,
"raw access to NAND flash device <num> ['enable'|'disable']");
}
-
+
return ERROR_OK;
}
return p;
}
}
-
+
return NULL;
}
-int nand_build_bbt(struct nand_device_s *device, int first, int last)
+static int nand_build_bbt(struct nand_device_s *device, int first, int last)
{
u32 page = 0x0;
int i;
- u8 *oob;
-
- oob = malloc(6);
-
+ uint8_t oob[6];
+
if ((first < 0) || (first >= device->num_blocks))
first = 0;
-
+
if ((last >= device->num_blocks) || (last == -1))
last = device->num_blocks - 1;
-
+
for (i = first; i < last; i++)
{
nand_read_page(device, page, NULL, 0, oob, 6);
-
+
if (((device->device->options & NAND_BUSWIDTH_16) && ((oob[0] & oob[1]) != 0xff))
|| (((device->page_size == 512) && (oob[5] != 0xff)) ||
((device->page_size == 2048) && (oob[0] != 0xff))))
{
- LOG_WARNING("invalid block: %i", i);
+ LOG_WARNING("bad block: %i", i);
device->blocks[i].is_bad = 1;
}
else
{
device->blocks[i].is_bad = 0;
}
-
+
page += (device->erase_size / device->page_size);
}
-
+
return ERROR_OK;
}
-int nand_read_status(struct nand_device_s *device, u8 *status)
+int nand_read_status(struct nand_device_s *device, uint8_t *status)
{
if (!device->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
-
+
/* Send read status command */
device->controller->command(device, NAND_CMD_STATUS);
-
+
alive_sleep(1);
-
+
/* read status */
if (device->device->options & NAND_BUSWIDTH_16)
{
- u16 data;
+ uint16_t data;
device->controller->read_data(device, &data);
*status = data & 0xff;
}
{
device->controller->read_data(device, status);
}
-
+
return ERROR_OK;
}
+static int nand_poll_ready(struct nand_device_s *device, int timeout)
+{
+ uint8_t status;
+
+ device->controller->command(device, NAND_CMD_STATUS);
+ do {
+ if (device->device->options & NAND_BUSWIDTH_16) {
+ uint16_t data;
+ device->controller->read_data(device, &data);
+ status = data & 0xff;
+ } else {
+ device->controller->read_data(device, &status);
+ }
+ if (status & NAND_STATUS_READY)
+ break;
+ alive_sleep(1);
+ } while (timeout--);
+
+ return (status & NAND_STATUS_READY) != 0;
+}
+
int nand_probe(struct nand_device_s *device)
{
- u8 manufacturer_id, device_id;
- u8 id_buff[6];
+ uint8_t manufacturer_id, device_id;
+ uint8_t id_buff[6];
int retval;
int i;
/* clear device data */
device->device = NULL;
device->manufacturer = NULL;
-
+
/* clear device parameters */
device->bus_width = 0;
device->address_cycles = 0;
device->page_size = 0;
device->erase_size = 0;
-
+
/* initialize controller (device parameters are zero, use controller default) */
if ((retval = device->controller->init(device) != ERROR_OK))
{
return ERROR_NAND_OPERATION_FAILED;
}
}
-
+
device->controller->command(device, NAND_CMD_RESET);
device->controller->reset(device);
device->controller->command(device, NAND_CMD_READID);
device->controller->address(device, 0x0);
-
+
if (device->bus_width == 8)
{
device->controller->read_data(device, &manufacturer_id);
}
else
{
- u16 data_buf;
+ uint16_t data_buf;
device->controller->read_data(device, &data_buf);
manufacturer_id = data_buf & 0xff;
device->controller->read_data(device, &data_buf);
device_id = data_buf & 0xff;
}
-
+
for (i = 0; nand_flash_ids[i].name; i++)
{
if (nand_flash_ids[i].id == device_id)
break;
}
}
-
+
for (i = 0; nand_manuf_ids[i].name; i++)
{
if (nand_manuf_ids[i].id == manufacturer_id)
break;
}
}
-
+
if (!device->manufacturer)
{
device->manufacturer = &nand_manuf_ids[0];
device->manufacturer->id = manufacturer_id;
}
-
+
if (!device->device)
{
LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
manufacturer_id, device_id);
return ERROR_NAND_OPERATION_FAILED;
}
-
+
LOG_DEBUG("found %s (%s)", device->device->name, device->manufacturer->name);
-
+
/* initialize device parameters */
-
- /* bus width */
+
+ /* bus width */
if (device->device->options & NAND_BUSWIDTH_16)
device->bus_width = 16;
else
}
else
{
- u16 data_buf;
+ uint16_t data_buf;
device->controller->read_data(device, &data_buf);
id_buff[3] = data_buf;
id_buff[5] = data_buf >> 8;
}
}
-
+
/* page size */
if (device->device->page_size == 0)
{
{
device->page_size = device->device->page_size;
}
-
+
/* number of address cycles */
if (device->page_size <= 512)
{
device->address_cycles = 5;
else
{
- LOG_ERROR("BUG: small page NAND device with more than 32 GiB encountered");
+ LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
device->address_cycles = 6;
}
}
-
+
/* erase size */
if (device->device->erase_size == 0)
{
{
device->erase_size = device->device->erase_size;
}
-
+
/* initialize controller, but leave parameters at the controllers default */
if ((retval = device->controller->init(device) != ERROR_OK))
{
return ERROR_NAND_OPERATION_FAILED;
}
}
-
+
device->num_blocks = (device->device->chip_size * 1024) / (device->erase_size / 1024);
device->blocks = malloc(sizeof(nand_block_t) * device->num_blocks);
-
+
for (i = 0; i < device->num_blocks; i++)
{
device->blocks[i].size = device->erase_size;
device->blocks[i].is_erased = -1;
device->blocks[i].is_bad = -1;
}
-
+
return ERROR_OK;
}
{
int i;
u32 page;
- u8 status;
+ uint8_t status;
int retval;
-
+
if (!device->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
-
+
if ((first_block < 0) || (last_block > device->num_blocks))
return ERROR_INVALID_ARGUMENTS;
-
+
/* make sure we know if a block is bad before erasing it */
for (i = first_block; i <= last_block; i++)
{
break;
}
}
-
+
for (i = first_block; i <= last_block; i++)
{
/* Send erase setup command */
device->controller->command(device, NAND_CMD_ERASE1);
-
+
page = i * (device->erase_size / device->page_size);
-
+
/* Send page address */
if (device->page_size <= 512)
{
/* row */
device->controller->address(device, page & 0xff);
device->controller->address(device, (page >> 8) & 0xff);
-
+
/* 3rd cycle only on devices with more than 32 MiB */
if (device->address_cycles >= 4)
device->controller->address(device, (page >> 16) & 0xff);
-
+
/* 4th cycle only on devices with more than 8 GiB */
if (device->address_cycles >= 5)
device->controller->address(device, (page >> 24) & 0xff);
/* row */
device->controller->address(device, page & 0xff);
device->controller->address(device, (page >> 8) & 0xff);
-
+
/* 3rd cycle only on devices with more than 128 MiB */
if (device->address_cycles >= 5)
device->controller->address(device, (page >> 16) & 0xff);
}
-
+
/* Send erase confirm command */
device->controller->command(device, NAND_CMD_ERASE2);
-
- if (!device->controller->nand_ready(device, 1000))
- {
+
+ retval = device->controller->nand_ready ?
+ device->controller->nand_ready(device, 1000) :
+ nand_poll_ready(device, 1000);
+ if (!retval) {
LOG_ERROR("timeout waiting for NAND flash block erase to complete");
return ERROR_NAND_OPERATION_TIMEOUT;
}
-
+
if ((retval = nand_read_status(device, &status)) != ERROR_OK)
{
LOG_ERROR("couldn't read status");
return ERROR_NAND_OPERATION_FAILED;
}
-
+
if (status & 0x1)
{
LOG_ERROR("erase operation didn't pass, status: 0x%2.2x", status);
return ERROR_NAND_OPERATION_FAILED;
}
+
+ device->blocks[i].is_erased = 1;
}
-
+
return ERROR_OK;
}
-int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size)
+#if 0
+static int nand_read_plain(struct nand_device_s *device, u32 address, uint8_t *data, u32 data_size)
{
- u8 *page;
-
+ uint8_t *page;
+
if (!device->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
-
+
if (address % device->page_size)
{
LOG_ERROR("reads need to be page aligned");
return ERROR_NAND_OPERATION_FAILED;
}
-
+
page = malloc(device->page_size);
-
+
while (data_size > 0 )
{
u32 thisrun_size = (data_size > device->page_size) ? device->page_size : data_size;
u32 page_address;
-
-
+
+
page_address = address / device->page_size;
-
+
nand_read_page(device, page_address, page, device->page_size, NULL, 0);
memcpy(data, page, thisrun_size);
-
+
address += thisrun_size;
data += thisrun_size;
data_size -= thisrun_size;
}
-
+
free(page);
-
+
return ERROR_OK;
}
-int nand_write_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size)
+static int nand_write_plain(struct nand_device_s *device, u32 address, uint8_t *data, u32 data_size)
{
- u8 *page;
-
+ uint8_t *page;
+
if (!device->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
-
+
if (address % device->page_size)
{
LOG_ERROR("writes need to be page aligned");
return ERROR_NAND_OPERATION_FAILED;
}
-
+
page = malloc(device->page_size);
-
+
while (data_size > 0 )
{
u32 thisrun_size = (data_size > device->page_size) ? device->page_size : data_size;
u32 page_address;
-
+
memset(page, 0xff, device->page_size);
memcpy(page, data, thisrun_size);
-
+
page_address = address / device->page_size;
-
+
nand_write_page(device, page_address, page, device->page_size, NULL, 0);
-
+
address += thisrun_size;
data += thisrun_size;
data_size -= thisrun_size;
}
-
+
free(page);
-
+
return ERROR_OK;
}
+#endif
-int nand_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
+int nand_write_page(struct nand_device_s *device, u32 page, uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size)
{
+ u32 block;
+
if (!device->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
-
+
+ block = page / (device->erase_size / device->page_size);
+ if (device->blocks[block].is_erased == 1)
+ device->blocks[block].is_erased = 0;
+
if (device->use_raw || device->controller->write_page == NULL)
return nand_write_page_raw(device, page, data, data_size, oob, oob_size);
else
return device->controller->write_page(device, page, data, data_size, oob, oob_size);
}
-int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
+static int nand_read_page(struct nand_device_s *device, u32 page, uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size)
{
if (!device->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
-
+
if (device->use_raw || device->controller->read_page == NULL)
return nand_read_page_raw(device, page, data, data_size, oob, oob_size);
else
return device->controller->read_page(device, page, data, data_size, oob, oob_size);
}
-int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
+int nand_read_page_raw(struct nand_device_s *device, u32 page, uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size)
{
- int i;
-
+ u32 i;
+
if (!device->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
device->controller->command(device, NAND_CMD_READ0);
else
device->controller->command(device, NAND_CMD_READOOB);
-
+
/* column (always 0, we start at the beginning of a page/OOB area) */
device->controller->address(device, 0x0);
-
+
/* row */
device->controller->address(device, page & 0xff);
device->controller->address(device, (page >> 8) & 0xff);
-
+
/* 4th cycle only on devices with more than 32 MiB */
if (device->address_cycles >= 4)
device->controller->address(device, (page >> 16) & 0xff);
{
/* large page device */
device->controller->command(device, NAND_CMD_READ0);
-
+
/* column (0 when we start at the beginning of a page,
* or 2048 for the beginning of OOB area)
*/
device->controller->address(device, 0x0);
else
device->controller->address(device, 0x8);
-
+
/* row */
device->controller->address(device, page & 0xff);
device->controller->address(device, (page >> 8) & 0xff);
/* large page devices need a start command */
device->controller->command(device, NAND_CMD_READSTART);
}
-
- if (!device->controller->nand_ready(device, 100))
- return ERROR_NAND_OPERATION_TIMEOUT;
-
+
+ if (device->controller->nand_ready) {
+ if (!device->controller->nand_ready(device, 100))
+ return ERROR_NAND_OPERATION_TIMEOUT;
+ } else {
+ alive_sleep(1);
+ }
+
if (data)
{
if (device->controller->read_block_data != NULL)
}
}
}
-
+
if (oob)
{
if (device->controller->read_block_data != NULL)
}
}
}
-
- return ERROR_OK;
+
+ return ERROR_OK;
}
-int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
+int nand_write_page_raw(struct nand_device_s *device, u32 page, uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size)
{
- int i;
+ u32 i;
int retval;
- u8 status;
-
+ uint8_t status;
+
if (!device->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
device->controller->command(device, NAND_CMD_SEQIN);
-
+
if (device->page_size <= 512)
{
/* column (always 0, we start at the beginning of a page/OOB area) */
device->controller->address(device, 0x0);
-
+
/* row */
device->controller->address(device, page & 0xff);
device->controller->address(device, (page >> 8) & 0xff);
-
+
/* 4th cycle only on devices with more than 32 MiB */
if (device->address_cycles >= 4)
device->controller->address(device, (page >> 16) & 0xff);
* or 2048 for the beginning of OOB area)
*/
device->controller->address(device, 0x0);
- device->controller->address(device, 0x8);
-
+ if (data)
+ device->controller->address(device, 0x0);
+ else
+ device->controller->address(device, 0x8);
+
/* row */
device->controller->address(device, page & 0xff);
device->controller->address(device, (page >> 8) & 0xff);
if (device->address_cycles >= 5)
device->controller->address(device, (page >> 16) & 0xff);
}
-
+
if (data)
{
if (device->controller->write_block_data != NULL)
{
if (device->device->options & NAND_BUSWIDTH_16)
{
- u16 data_buf = le_to_h_u16(data);
+ uint16_t data_buf = le_to_h_u16(data);
device->controller->write_data(device, data_buf);
data += 2;
i += 2;
}
}
}
-
+
if (oob)
{
if (device->controller->write_block_data != NULL)
{
if (device->device->options & NAND_BUSWIDTH_16)
{
- u16 oob_buf = le_to_h_u16(data);
+ uint16_t oob_buf = le_to_h_u16(data);
device->controller->write_data(device, oob_buf);
oob += 2;
i += 2;
}
}
}
-
+
device->controller->command(device, NAND_CMD_PAGEPROG);
-
- if (!device->controller->nand_ready(device, 100))
+
+ retval = device->controller->nand_ready ?
+ device->controller->nand_ready(device, 100) :
+ nand_poll_ready(device, 100);
+ if (!retval)
return ERROR_NAND_OPERATION_TIMEOUT;
-
+
if ((retval = nand_read_status(device, &status)) != ERROR_OK)
{
LOG_ERROR("couldn't read status");
return ERROR_NAND_OPERATION_FAILED;
}
-
+
if (status & NAND_STATUS_FAIL)
{
LOG_ERROR("write operation didn't pass, status: 0x%2.2x", status);
return ERROR_NAND_OPERATION_FAILED;
}
-
- return ERROR_OK;
+
+ return ERROR_OK;
}
int handle_nand_list_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
nand_device_t *p;
- int i = 0;
-
+ int i;
+
if (!nand_devices)
{
command_print(cmd_ctx, "no NAND flash devices configured");
return ERROR_OK;
}
-
- for (p = nand_devices; p; p = p->next)
+
+ for (p = nand_devices, i = 0; p; p = p->next, i++)
{
if (p->device)
command_print(cmd_ctx, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
- i++, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size);
+ i, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size);
else
- command_print(cmd_ctx, "#%i: not probed");
+ command_print(cmd_ctx, "#%i: not probed", i);
}
-
+
return ERROR_OK;
}
-int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
nand_device_t *p;
int i = 0;
int j = 0;
int first = -1;
int last = -1;
-
- if ((argc < 1) || (argc > 3))
- {
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- if (argc == 2)
- {
+ switch (argc) {
+ default:
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ case 1:
+ first = 0;
+ last = INT32_MAX;
+ break;
+ case 2:
first = last = strtoul(args[1], NULL, 0);
- }
- else if (argc == 3)
- {
+ break;
+ case 3:
first = strtoul(args[1], NULL, 0);
last = strtoul(args[2], NULL, 0);
+ break;
}
-
+
p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
if (p)
{
{
if (first >= p->num_blocks)
first = p->num_blocks - 1;
-
+
if (last >= p->num_blocks)
last = p->num_blocks - 1;
-
+
command_print(cmd_ctx, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
i++, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size);
-
+
for (j = first; j <= last; j++)
{
char *erase_state, *bad_state;
-
+
if (p->blocks[j].is_erased == 0)
erase_state = "not erased";
else if (p->blocks[j].is_erased == 1)
erase_state = "erased";
else
erase_state = "erase state unknown";
-
+
if (p->blocks[j].is_bad == 0)
bad_state = "";
else if (p->blocks[j].is_bad == 1)
else
bad_state = " (block condition unknown)";
- command_print(cmd_ctx, "\t#%i: 0x%8.8x (0x%xkB) %s%s",
+ command_print(cmd_ctx, "\t#%i: 0x%8.8x (%dkB) %s%s",
j, p->blocks[j].offset, p->blocks[j].size / 1024,
erase_state, bad_state);
}
}
else
{
- command_print(cmd_ctx, "#%i: not probed");
+ command_print(cmd_ctx, "#%s: not probed", args[0]);
}
}
-
+
return ERROR_OK;
}
-int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
nand_device_t *p;
int retval;
-
+
if (argc != 1)
{
return ERROR_COMMAND_SYNTAX_ERROR;
}
-
+
p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
if (p)
{
{
command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
}
-
+
return ERROR_OK;
}
-int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
nand_device_t *p;
int retval;
-
+
if (argc != 3)
{
return ERROR_COMMAND_SYNTAX_ERROR;
}
-
+
p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
if (p)
{
- int first = strtoul(args[1], NULL, 0);
- int last = strtoul(args[2], NULL, 0);
-
- if ((retval = nand_erase(p, first, last)) == ERROR_OK)
+ char *cp;
+ unsigned long offset;
+ unsigned long length;
+
+ offset = strtoul(args[1], &cp, 0);
+ if (*cp || offset == ULONG_MAX || offset % p->erase_size)
+ {
+ return ERROR_INVALID_ARGUMENTS;
+ }
+ offset /= p->erase_size;
+
+ length = strtoul(args[2], &cp, 0);
+ if (*cp || length == ULONG_MAX || length % p->erase_size)
+ {
+ return ERROR_INVALID_ARGUMENTS;
+ }
+ length -= 1;
+ length /= p->erase_size;
+
+ retval = nand_erase(p, offset, offset + length);
+ if (retval == ERROR_OK)
{
- command_print(cmd_ctx, "successfully erased blocks %i to %i on NAND flash device '%s'", first, last, p->device->name);
+ command_print(cmd_ctx, "successfully erased blocks "
+ "%lu to %lu on NAND flash device '%s'",
+ offset, offset + length, p->device->name);
}
else if (retval == ERROR_NAND_OPERATION_FAILED)
{
{
command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
}
-
+
return ERROR_OK;
}
int retval;
int first = -1;
int last = -1;
-
+
if ((argc < 1) || (argc > 3) || (argc == 2))
{
return ERROR_COMMAND_SYNTAX_ERROR;
}
-
- if (argc == 3)
- {
- first = strtoul(args[1], NULL, 0);
- last = strtoul(args[2], NULL, 0);
- }
-
+
p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
- if (p)
+ if (!p) {
+ command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds",
+ args[0]);
+ return ERROR_INVALID_ARGUMENTS;
+ }
+
+ if (argc == 3)
{
- if ((retval = nand_build_bbt(p, first, last)) == ERROR_OK)
- {
- command_print(cmd_ctx, "checked NAND flash device for bad blocks, use \"nand info\" command to list blocks", p->device->name);
- }
- else if (retval == ERROR_NAND_OPERATION_FAILED)
+ char *cp;
+ unsigned long offset;
+ unsigned long length;
+
+ offset = strtoul(args[1], &cp, 0);
+ if (*cp || offset == ULONG_MAX || offset % p->erase_size)
{
- command_print(cmd_ctx, "error when checking for bad blocks on NAND flash device");
+ return ERROR_INVALID_ARGUMENTS;
}
- else
+ offset /= p->erase_size;
+
+ length = strtoul(args[2], &cp, 0);
+ if (*cp || length == ULONG_MAX || length % p->erase_size)
{
- command_print(cmd_ctx, "unknown error when checking for bad blocks on NAND flash device");
+ return ERROR_INVALID_ARGUMENTS;
}
+ length -= 1;
+ length /= p->erase_size;
+
+ first = offset;
+ last = offset + length;
}
- else
- {
- command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
- }
-
- return ERROR_OK;
-}
-int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
-{
- nand_device_t *p;
-
- if (argc != 4)
+ retval = nand_build_bbt(p, first, last);
+ if (retval == ERROR_OK)
{
- return ERROR_COMMAND_SYNTAX_ERROR;
-
+ command_print(cmd_ctx, "checked NAND flash device for bad blocks, "
+ "use \"nand info\" command to list blocks");
}
-
- p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
- if (p)
+ else if (retval == ERROR_NAND_OPERATION_FAILED)
{
-
+ command_print(cmd_ctx, "error when checking for bad blocks on "
+ "NAND flash device");
}
else
{
- command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
+ command_print(cmd_ctx, "unknown error when checking for bad "
+ "blocks on NAND flash device");
}
-
+
return ERROR_OK;
}
-int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
u32 offset;
u32 binary_size;
u32 buf_cnt;
enum oob_formats oob_format = NAND_OOB_NONE;
-
+
fileio_t fileio;
-
+
duration_t duration;
char *duration_text;
-
+
nand_device_t *p;
-
+
if (argc < 3)
{
return ERROR_COMMAND_SYNTAX_ERROR;
}
-
+
p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
if (p)
{
- u8 *page = NULL;
+ uint8_t *page = NULL;
u32 page_size = 0;
- u8 *oob = NULL;
+ uint8_t *oob = NULL;
u32 oob_size = 0;
-
- duration_start_measure(&duration);
+ const int *eccpos = NULL;
+
offset = strtoul(args[2], NULL, 0);
-
+
if (argc > 3)
{
int i;
oob_format |= NAND_OOB_RAW;
else if (!strcmp(args[i], "oob_only"))
oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY;
+ else if (!strcmp(args[i], "oob_softecc"))
+ oob_format |= NAND_OOB_SW_ECC;
+ else if (!strcmp(args[i], "oob_softecc_kw"))
+ oob_format |= NAND_OOB_SW_ECC_KW;
else
{
command_print(cmd_ctx, "unknown option: %s", args[i]);
+ return ERROR_COMMAND_SYNTAX_ERROR;
}
}
}
-
+
+ duration_start_measure(&duration);
+
if (fileio_open(&fileio, args[1], FILEIO_READ, FILEIO_BINARY) != ERROR_OK)
{
return ERROR_OK;
}
-
+
buf_cnt = binary_size = fileio.size;
-
+
if (!(oob_format & NAND_OOB_ONLY))
{
page_size = p->page_size;
page = malloc(p->page_size);
}
- if (oob_format & NAND_OOB_RAW)
+ if (oob_format & (NAND_OOB_RAW | NAND_OOB_SW_ECC | NAND_OOB_SW_ECC_KW))
{
- if (p->page_size == 512)
+ if (p->page_size == 512) {
oob_size = 16;
- else if (p->page_size == 2048)
+ eccpos = nand_oob_16.eccpos;
+ } else if (p->page_size == 2048) {
oob_size = 64;
+ eccpos = nand_oob_64.eccpos;
+ }
oob = malloc(oob_size);
}
-
+
if (offset % p->page_size)
{
command_print(cmd_ctx, "only page size aligned offsets and sizes are supported");
free(page);
return ERROR_OK;
}
-
+
while (buf_cnt > 0)
{
u32 size_read;
-
+
if (NULL != page)
{
fileio_read(&fileio, page_size, page, &size_read);
memset(page + size_read, 0xff, page_size - size_read);
}
}
-
- if (NULL != oob)
+
+ if (oob_format & NAND_OOB_SW_ECC)
+ {
+ u32 i, j;
+ uint8_t ecc[3];
+ memset(oob, 0xff, oob_size);
+ for (i = 0, j = 0; i < page_size; i += 256) {
+ nand_calculate_ecc(p, page+i, ecc);
+ oob[eccpos[j++]] = ecc[0];
+ oob[eccpos[j++]] = ecc[1];
+ oob[eccpos[j++]] = ecc[2];
+ }
+ } else if (oob_format & NAND_OOB_SW_ECC_KW)
+ {
+ /*
+ * In this case eccpos is not used as
+ * the ECC data is always stored contigously
+ * at the end of the OOB area. It consists
+ * of 10 bytes per 512-byte data block.
+ */
+ u32 i;
+ uint8_t *ecc = oob + oob_size - page_size/512 * 10;
+ memset(oob, 0xff, oob_size);
+ for (i = 0; i < page_size; i += 512) {
+ nand_calculate_ecc_kw(p, page+i, ecc);
+ ecc += 10;
+ }
+ }
+ else if (NULL != oob)
{
fileio_read(&fileio, oob_size, oob, &size_read);
buf_cnt -= size_read;
memset(oob + size_read, 0xff, oob_size - size_read);
}
}
-
+
if (nand_write_page(p, offset / p->page_size, page, page_size, oob, oob_size) != ERROR_OK)
{
command_print(cmd_ctx, "failed writing file %s to NAND flash %s at offset 0x%8.8x",
oob = NULL;
page = NULL;
duration_stop_measure(&duration, &duration_text);
- command_print(cmd_ctx, "wrote file %s to NAND flash %s at offset 0x%8.8x in %s",
+ command_print(cmd_ctx, "wrote file %s to NAND flash %s up to offset 0x%8.8x in %s",
args[1], args[0], offset, duration_text);
free(duration_text);
duration_text = NULL;
{
command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
}
-
+
return ERROR_OK;
}
-int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
nand_device_t *p;
-
+
if (argc < 4)
{
return ERROR_COMMAND_SYNTAX_ERROR;
}
-
+
p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
if (p)
{
duration_t duration;
char *duration_text;
int retval;
-
- u8 *page = NULL;
+
+ uint8_t *page = NULL;
u32 page_size = 0;
- u8 *oob = NULL;
+ uint8_t *oob = NULL;
u32 oob_size = 0;
u32 address = strtoul(args[2], NULL, 0);
u32 size = strtoul(args[3], NULL, 0);
u32 bytes_done = 0;
enum oob_formats oob_format = NAND_OOB_NONE;
-
+
if (argc > 4)
{
int i;
else if (!strcmp(args[i], "oob_only"))
oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY;
else
- command_print(cmd_ctx, "unknown option: '%s'", args[i]);
+ command_print(cmd_ctx, "unknown option: '%s'", args[i]);
}
}
-
+
if ((address % p->page_size) || (size % p->page_size))
{
command_print(cmd_ctx, "only page size aligned addresses and sizes are supported");
return ERROR_OK;
}
-
+
if (!(oob_format & NAND_OOB_ONLY))
{
page_size = p->page_size;
oob_size = 64;
oob = malloc(oob_size);
}
-
+
if (fileio_open(&fileio, args[1], FILEIO_WRITE, FILEIO_BINARY) != ERROR_OK)
{
return ERROR_OK;
}
-
+
duration_start_measure(&duration);
-
+
while (size > 0)
{
u32 size_written;
{
command_print(cmd_ctx, "reading NAND flash page failed");
free(page);
- free(oob);
+ free(oob);
fileio_close(&fileio);
return ERROR_OK;
}
-
+
if (NULL != page)
{
fileio_write(&fileio, page_size, page, &size_written);
bytes_done += page_size;
}
-
+
if (NULL != oob)
{
fileio_write(&fileio, oob_size, oob, &size_written);
bytes_done += oob_size;
}
-
+
size -= p->page_size;
address += p->page_size;
}
-
+
free(page);
page = NULL;
free(oob);
fileio_close(&fileio);
duration_stop_measure(&duration, &duration_text);
- command_print(cmd_ctx, "dumped %"PRIi64" byte in %s", fileio.size, duration_text);
+ command_print(cmd_ctx, "dumped %lld byte in %s", fileio.size, duration_text);
free(duration_text);
duration_text = NULL;
}
else
{
- command_print(cmd_ctx, "#%i: not probed");
+ command_print(cmd_ctx, "#%s: not probed", args[0]);
}
}
else
{
command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
}
-
+
return ERROR_OK;
}
-int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
nand_device_t *p;
-
+
if ((argc < 1) || (argc > 2))
{
return ERROR_COMMAND_SYNTAX_ERROR;
}
-
+
p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
if (p)
{
return ERROR_COMMAND_SYNTAX_ERROR;
}
}
-
+
command_print(cmd_ctx, "raw access is %s", (p->use_raw) ? "enabled" : "disabled");
}
else
{
- command_print(cmd_ctx, "#%i: not probed");
+ command_print(cmd_ctx, "#%s: not probed", args[0]);
}
}
else
{
command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
}
-
+
return ERROR_OK;
}
projects / fw / openocd / blobdiff