#include "config.h"
#endif
+#include "imp.h"
#include "mx3.h"
+#include <target/target.h>
static const char target_not_halted_err_msg[] =
"target must be halted to use mx3 NAND flash controller";
"trying to access out of SRAM buffer bound (addr=0x%" PRIx32 ")";
static const char get_status_register_err_msg[] = "can't get NAND status";
static uint32_t in_sram_address;
-unsigned char sign_of_sequental_byte_read;
+static unsigned char sign_of_sequental_byte_read;
static int test_iomux_settings (struct target * target, uint32_t value,
uint32_t mask, const char *text);
static int imx31_command (struct nand_device *nand, uint8_t command);
static int imx31_address (struct nand_device *nand, uint8_t address);
-static int imx31_controller_ready (struct nand_device *nand, int tout);
NAND_DEVICE_COMMAND_HANDLER(imx31_nand_device_command)
{
nand->controller_priv = mx3_nf_info;
- mx3_nf_info->target = get_target (CMD_ARGV[1]);
- if (mx3_nf_info->target == NULL)
- {
- LOG_ERROR ("target '%s' not defined", CMD_ARGV[1]);
- return ERROR_FAIL;
- }
if (CMD_ARGC < 3)
{
- LOG_ERROR ("use \"nand device imx31 target noecc|hwecc\"");
- return ERROR_FAIL;
+ return ERROR_COMMAND_SYNTAX_ERROR;
}
/*
* check hwecc requirements
mx3_nf_info->optype = MX3_NF_DATAOUT_PAGE;
mx3_nf_info->fin = MX3_NF_FIN_NONE;
mx3_nf_info->flags.target_little_endian =
- (mx3_nf_info->target->endianness == TARGET_LITTLE_ENDIAN);
+ (nand->target->endianness == TARGET_LITTLE_ENDIAN);
/*
- * testing host endianess
+ * testing host endianness
*/
{
int x = 1;
static int imx31_init (struct nand_device *nand)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- struct target *target = mx3_nf_info->target;
+ struct target *target = nand->target;
{
/*
static int imx31_read_data (struct nand_device *nand, void *data)
{
- struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- struct target *target = mx3_nf_info->target;
+ struct target *target = nand->target;
{
/*
* validate target state
return ERROR_NAND_OPERATION_FAILED;
}
-static int imx31_nand_ready (struct nand_device *nand, int timeout)
-{
- return imx31_controller_ready (nand, timeout);
-}
-
static int imx31_reset (struct nand_device *nand)
{
/*
static int imx31_command (struct nand_device *nand, uint8_t command)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- struct target *target = mx3_nf_info->target;
+ struct target *target = nand->target;
{
/*
* validate target state
static int imx31_address (struct nand_device *nand, uint8_t address)
{
- struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- struct target *target = mx3_nf_info->target;
+ struct target *target = nand->target;
{
/*
* validate target state
return ERROR_OK;
}
-static int imx31_controller_ready (struct nand_device *nand, int tout)
+static int imx31_nand_ready (struct nand_device *nand, int tout)
{
uint16_t poll_complete_status;
- struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- struct target *target = mx3_nf_info->target;
+ struct target *target = nand->target;
{
/*
uint32_t oob_size)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- struct target *target = mx3_nf_info->target;
+ struct target *target = nand->target;
if (data_size % 2)
{
uint8_t * data, uint32_t data_size, uint8_t * oob,
uint32_t oob_size)
{
- struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- struct target *target = mx3_nf_info->target;
+ struct target *target = nand->target;
if (data_size % 2)
{
static int initialize_nf_controller (struct nand_device *nand)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- struct target *target = mx3_nf_info->target;
+ struct target *target = nand->target;
/*
* resets NAND flash controller in zero time ? I dont know.
*/
static int validate_target_state (struct nand_device *nand)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- struct target *target = mx3_nf_info->target;
+ struct target *target = nand->target;
if (target->state != TARGET_HALTED)
{
static int do_data_output (struct nand_device *nand)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- struct target *target = mx3_nf_info->target;
+ struct target *target = nand->target;
switch (mx3_nf_info->fin)
{
case MX3_NF_FIN_DATAOUT:
struct nand_flash_controller imx31_nand_flash_controller = {
.name = "imx31",
+ .usage = "nand device imx31 target noecc|hwecc",
.nand_device_command = &imx31_nand_device_command,
.init = &imx31_init,
.reset = &imx31_reset,
.read_data = &imx31_read_data,
.write_page = &imx31_write_page,
.read_page = &imx31_read_page,
- .controller_ready = &imx31_controller_ready,
.nand_ready = &imx31_nand_ready,
};