+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* Copyright (C) 2009 by Dean Glazeski
* dnglaze@gmail.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the
- * Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
#ifdef HAVE_CONFIG_H
#include "imp.h"
#include "arm_io.h"
-#define AT91C_PIOx_SODR (0x30) /**< Offset to PIO SODR. */
-#define AT91C_PIOx_CODR (0x34) /**< Offset to PIO CODR. */
-#define AT91C_PIOx_PDSR (0x3C) /**< Offset to PIO PDSR. */
-#define AT91C_ECCx_CR (0x00) /**< Offset to ECC CR. */
-#define AT91C_ECCx_SR (0x08) /**< Offset to ECC SR. */
-#define AT91C_ECCx_PR (0x0C) /**< Offset to ECC PR. */
-#define AT91C_ECCx_NPR (0x10) /**< Offset to ECC NPR. */
+#define AT91C_PIOX_SODR (0x30) /**< Offset to PIO SODR. */
+#define AT91C_PIOX_CODR (0x34) /**< Offset to PIO CODR. */
+#define AT91C_PIOX_PDSR (0x3C) /**< Offset to PIO PDSR. */
+#define AT91C_ECCX_CR (0x00) /**< Offset to ECC CR. */
+#define AT91C_ECCX_SR (0x08) /**< Offset to ECC SR. */
+#define AT91C_ECCX_PR (0x0C) /**< Offset to ECC PR. */
+#define AT91C_ECCX_NPR (0x10) /**< Offset to ECC NPR. */
/**
* Representation of a pin on an AT91SAM9 chip.
/**
* Enable NAND device attached to a controller.
*
- * @param info NAND controller information for controlling NAND device.
+ * @param nand NAND controller information for controlling NAND device.
* @return Success or failure of the enabling.
*/
static int at91sam9_enable(struct nand_device *nand)
struct at91sam9_nand *info = nand->controller_priv;
struct target *target = nand->target;
- return target_write_u32(target, info->ce.pioc + AT91C_PIOx_CODR, 1 << info->ce.num);
+ return target_write_u32(target, info->ce.pioc + AT91C_PIOX_CODR, 1 << info->ce.num);
}
/**
* Disable NAND device attached to a controller.
*
- * @param info NAND controller information for controlling NAND device.
+ * @param nand NAND controller information for controlling NAND device.
* @return Success or failure of the disabling.
*/
static int at91sam9_disable(struct nand_device *nand)
struct at91sam9_nand *info = nand->controller_priv;
struct target *target = nand->target;
- return target_write_u32(target, info->ce.pioc + AT91C_PIOx_SODR, 1 << info->ce.num);
+ return target_write_u32(target, info->ce.pioc + AT91C_PIOX_SODR, 1 << info->ce.num);
}
/**
return 0;
do {
- target_read_u32(target, info->busy.pioc + AT91C_PIOx_PDSR, &status);
+ target_read_u32(target, info->busy.pioc + AT91C_PIOX_PDSR, &status);
if (status & (1 << info->busy.num))
return 1;
}
/* reset ECC parity registers */
- return target_write_u32(target, info->ecc + AT91C_ECCx_CR, 1);
+ return target_write_u32(target, info->ecc + AT91C_ECCX_CR, 1);
}
/**
uint32_t status;
retval = at91sam9_ecc_init(target, info);
- if (ERROR_OK != retval)
+ if (retval != ERROR_OK)
return retval;
retval = nand_page_command(nand, page, NAND_CMD_READ0, !data);
- if (ERROR_OK != retval)
+ if (retval != ERROR_OK)
return retval;
if (data) {
retval = nand_read_data_page(nand, data, data_size);
- if (ERROR_OK != retval)
+ if (retval != ERROR_OK)
return retval;
}
oob_data = at91sam9_oob_init(nand, oob, &oob_size);
retval = nand_read_data_page(nand, oob_data, oob_size);
- if (ERROR_OK == retval && data) {
- target_read_u32(target, info->ecc + AT91C_ECCx_SR, &status);
+ if (retval == ERROR_OK && data) {
+ target_read_u32(target, info->ecc + AT91C_ECCX_SR, &status);
if (status & 1) {
LOG_ERROR("Error detected!");
if (status & 4)
uint32_t parity;
target_read_u32(target,
- info->ecc + AT91C_ECCx_PR,
+ info->ecc + AT91C_ECCX_PR,
&parity);
uint32_t word = (parity & 0x0000FFF0) >> 4;
uint32_t bit = parity & 0x0F;
uint32_t parity, nparity;
retval = at91sam9_ecc_init(target, info);
- if (ERROR_OK != retval)
+ if (retval != ERROR_OK)
return retval;
retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data);
- if (ERROR_OK != retval)
+ if (retval != ERROR_OK)
return retval;
if (data) {
retval = nand_write_data_page(nand, data, data_size);
- if (ERROR_OK != retval) {
+ if (retval != ERROR_OK) {
LOG_ERROR("Unable to write data to NAND device");
return retval;
}
if (!oob) {
/* no OOB given, so read in the ECC parity from the ECC controller */
- target_read_u32(target, info->ecc + AT91C_ECCx_PR, &parity);
- target_read_u32(target, info->ecc + AT91C_ECCx_NPR, &nparity);
+ target_read_u32(target, info->ecc + AT91C_ECCX_PR, &parity);
+ target_read_u32(target, info->ecc + AT91C_ECCX_NPR, &nparity);
oob_data[0] = (uint8_t) parity;
oob_data[1] = (uint8_t) (parity >> 8);
if (!oob)
free(oob_data);
- if (ERROR_OK != retval) {
+ if (retval != ERROR_OK) {
LOG_ERROR("Unable to write OOB data to NAND");
return retval;
}
unsigned num, address_line;
if (CMD_ARGC != 2) {
- command_print(CMD_CTX, "incorrect number of arguments for 'at91sam9 cle' command");
+ command_print(CMD, "incorrect number of arguments for 'at91sam9 cle' command");
return ERROR_OK;
}
COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
nand = get_nand_device_by_num(num);
if (!nand) {
- command_print(CMD_CTX, "invalid nand device number: %s", CMD_ARGV[0]);
+ command_print(CMD, "invalid nand device number: %s", CMD_ARGV[0]);
return ERROR_OK;
}
COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
nand = get_nand_device_by_num(num);
if (!nand) {
- command_print(CMD_CTX, "invalid nand device number: %s", CMD_ARGV[0]);
+ command_print(CMD, "invalid nand device number: %s", CMD_ARGV[0]);
return ERROR_COMMAND_ARGUMENT_INVALID;
}
COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
nand = get_nand_device_by_num(num);
if (!nand) {
- command_print(CMD_CTX, "invalid nand device number: %s", CMD_ARGV[0]);
+ command_print(CMD, "invalid nand device number: %s", CMD_ARGV[0]);
return ERROR_COMMAND_ARGUMENT_INVALID;
}
COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
nand = get_nand_device_by_num(num);
if (!nand) {
- command_print(CMD_CTX, "invalid nand device number: %s", CMD_ARGV[0]);
+ command_print(CMD, "invalid nand device number: %s", CMD_ARGV[0]);
return ERROR_COMMAND_ARGUMENT_INVALID;
}
projects / fw / openocd / blobdiff