* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the
- * Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
+#include "core.h"
#include "arm_io.h"
-#include <target/armv4_5.h>
+#include <helper/binarybuffer.h>
+#include <target/arm.h>
+#include <target/armv7m.h>
#include <target/algorithm.h>
/**
* @param area Pointer to a pointer to a working area to copy code to
* @return Success or failure of the operation
*/
-int arm_code_to_working_area(struct target *target,
- const uint32_t *code, unsigned code_size,
- unsigned additional, struct working_area **area)
+static int arm_code_to_working_area(struct target *target,
+ const uint32_t *code, unsigned code_size,
+ unsigned additional, struct working_area **area)
{
uint8_t code_buf[code_size];
- unsigned i;
int retval;
unsigned size = code_size + additional;
*/
/* make sure we have a working area */
- if (NULL == *area) {
+ if (!*area) {
retval = target_alloc_working_area(target, size, area);
if (retval != ERROR_OK) {
- LOG_DEBUG("%s: no %d byte buffer", __FUNCTION__, (int) size);
+ LOG_DEBUG("%s: no %d byte buffer", __func__, (int) size);
return ERROR_NAND_NO_BUFFER;
}
}
/* buffer code in target endianness */
- for (i = 0; i < code_size / 4; i++)
- target_buffer_set_u32(target, code_buf + i * 4, code[i]);
+ target_buffer_set_u32_array(target, code_buf, code_size / 4, code);
/* copy code to work area */
retval = target_write_memory(target, (*area)->address,
/**
* ARM-specific bulk write from buffer to address of 8-bit wide NAND.
- * For now this only supports ARMv4 and ARMv5 cores.
+ * For now this supports ARMv4,ARMv5 and ARMv7-M cores.
*
* Enhancements to target_run_algorithm() could enable:
* - ARMv6 and ARMv7 cores in ARM mode
*
* Different code fragments could handle:
- * - Thumb2 cores like Cortex-M (needs different byteswapping)
- * - 16-bit wide data (needs different setup too)
+ * - 16-bit wide data (needs different setup)
*
* @param nand Pointer to the arm_nand_data struct that defines the I/O
* @param data Pointer to the data to be copied to flash
*/
int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size)
{
- struct target *target = nand->target;
- struct arm_algorithm algo;
- struct arm *armv4_5 = target->arch_info;
- struct reg_param reg_params[3];
- uint32_t target_buf;
- uint32_t exit = 0;
- int retval;
+ struct target *target = nand->target;
+ struct arm_algorithm armv4_5_algo;
+ struct armv7m_algorithm armv7m_algo;
+ void *arm_algo;
+ struct arm *arm = target->arch_info;
+ struct reg_param reg_params[3];
+ uint32_t target_buf;
+ uint32_t exit_var = 0;
+ int retval;
/* Inputs:
* r0 NAND data address (byte wide)
* r1 buffer address
* r2 buffer length
*/
- static const uint32_t code[] = {
+ static const uint32_t code_armv4_5[] = {
0xe4d13001, /* s: ldrb r3, [r1], #1 */
0xe5c03000, /* strb r3, [r0] */
0xe2522001, /* subs r2, r2, #1 */
0xe1200070, /* e: bkpt #0 */
};
+ /* Inputs:
+ * r0 NAND data address (byte wide)
+ * r1 buffer address
+ * r2 buffer length
+ *
+ * see contrib/loaders/flash/armv7m_io.s for src
+ */
+ static const uint32_t code_armv7m[] = {
+ 0x3b01f811,
+ 0x3a017003,
+ 0xaffaf47f,
+ 0xbf00be00,
+ };
+
+ int target_code_size = 0;
+ const uint32_t *target_code_src = NULL;
+
+ /* set up algorithm */
+ if (is_armv7m(target_to_armv7m(target))) { /* armv7m target */
+ armv7m_algo.common_magic = ARMV7M_COMMON_MAGIC;
+ armv7m_algo.core_mode = ARM_MODE_THREAD;
+ arm_algo = &armv7m_algo;
+ target_code_size = sizeof(code_armv7m);
+ target_code_src = code_armv7m;
+ } else {
+ armv4_5_algo.common_magic = ARM_COMMON_MAGIC;
+ armv4_5_algo.core_mode = ARM_MODE_SVC;
+ armv4_5_algo.core_state = ARM_STATE_ARM;
+ arm_algo = &armv4_5_algo;
+ target_code_size = sizeof(code_armv4_5);
+ target_code_src = code_armv4_5;
+ }
+
if (nand->op != ARM_NAND_WRITE || !nand->copy_area) {
- retval = arm_code_to_working_area(target, code, sizeof(code),
+ retval = arm_code_to_working_area(target, target_code_src, target_code_size,
nand->chunk_size, &nand->copy_area);
- if (retval != ERROR_OK) {
+ if (retval != ERROR_OK)
return retval;
- }
}
nand->op = ARM_NAND_WRITE;
/* copy data to work area */
- target_buf = nand->copy_area->address + sizeof(code);
- retval = target_bulk_write_memory(target, target_buf, size / 4, data);
- if (retval == ERROR_OK && (size & 3) != 0)
- retval = target_write_memory(target,
- target_buf + (size & ~3),
- 1, size & 3, data + (size & ~3));
+ target_buf = nand->copy_area->address + target_code_size;
+ retval = target_write_buffer(target, target_buf, size, data);
if (retval != ERROR_OK)
return retval;
- /* set up algorithm and parameters */
- algo.common_magic = ARM_COMMON_MAGIC;
- algo.core_mode = ARM_MODE_SVC;
- algo.core_state = ARM_STATE_ARM;
-
+ /* set up parameters */
init_reg_param(®_params[0], "r0", 32, PARAM_IN);
init_reg_param(®_params[1], "r1", 32, PARAM_IN);
init_reg_param(®_params[2], "r2", 32, PARAM_IN);
buf_set_u32(reg_params[2].value, 0, 32, size);
/* armv4 must exit using a hardware breakpoint */
- if (armv4_5->is_armv4)
- exit = nand->copy_area->address + sizeof(code) - 4;
+ if (arm->arch == ARM_ARCH_V4)
+ exit_var = nand->copy_area->address + target_code_size - 4;
/* use alg to write data from work area to NAND chip */
retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
- nand->copy_area->address, exit, 1000, &algo);
+ nand->copy_area->address, exit_var, 1000, arm_algo);
if (retval != ERROR_OK)
LOG_ERROR("error executing hosted NAND write");
int arm_nandread(struct arm_nand_data *nand, uint8_t *data, uint32_t size)
{
struct target *target = nand->target;
- struct arm_algorithm algo;
- struct arm *armv4_5 = target->arch_info;
+ struct arm_algorithm armv4_5_algo;
+ struct armv7m_algorithm armv7m_algo;
+ void *arm_algo;
+ struct arm *arm = target->arch_info;
struct reg_param reg_params[3];
uint32_t target_buf;
- uint32_t exit = 0;
+ uint32_t exit_var = 0;
int retval;
/* Inputs:
* r1 NAND data address (byte wide)
* r2 buffer length
*/
- static const uint32_t code[] = {
+ static const uint32_t code_armv4_5[] = {
0xe5d13000, /* s: ldrb r3, [r1] */
0xe4c03001, /* strb r3, [r0], #1 */
0xe2522001, /* subs r2, r2, #1 */
0xe1200070, /* e: bkpt #0 */
};
+ /* Inputs:
+ * r0 buffer address
+ * r1 NAND data address (byte wide)
+ * r2 buffer length
+ *
+ * see contrib/loaders/flash/armv7m_io.s for src
+ */
+ static const uint32_t code_armv7m[] = {
+ 0xf800780b,
+ 0x3a013b01,
+ 0xaffaf47f,
+ 0xbf00be00,
+ };
+
+ int target_code_size = 0;
+ const uint32_t *target_code_src = NULL;
+
+ /* set up algorithm */
+ if (is_armv7m(target_to_armv7m(target))) { /* armv7m target */
+ armv7m_algo.common_magic = ARMV7M_COMMON_MAGIC;
+ armv7m_algo.core_mode = ARM_MODE_THREAD;
+ arm_algo = &armv7m_algo;
+ target_code_size = sizeof(code_armv7m);
+ target_code_src = code_armv7m;
+ } else {
+ armv4_5_algo.common_magic = ARM_COMMON_MAGIC;
+ armv4_5_algo.core_mode = ARM_MODE_SVC;
+ armv4_5_algo.core_state = ARM_STATE_ARM;
+ arm_algo = &armv4_5_algo;
+ target_code_size = sizeof(code_armv4_5);
+ target_code_src = code_armv4_5;
+ }
+
/* create the copy area if not yet available */
if (nand->op != ARM_NAND_READ || !nand->copy_area) {
- retval = arm_code_to_working_area(target, code, sizeof(code),
+ retval = arm_code_to_working_area(target, target_code_src, target_code_size,
nand->chunk_size, &nand->copy_area);
- if (retval != ERROR_OK) {
+ if (retval != ERROR_OK)
return retval;
- }
}
nand->op = ARM_NAND_READ;
- target_buf = nand->copy_area->address + sizeof(code);
-
- /* set up algorithm and parameters */
- algo.common_magic = ARM_COMMON_MAGIC;
- algo.core_mode = ARM_MODE_SVC;
- algo.core_state = ARM_STATE_ARM;
+ target_buf = nand->copy_area->address + target_code_size;
+ /* set up parameters */
init_reg_param(®_params[0], "r0", 32, PARAM_IN);
init_reg_param(®_params[1], "r1", 32, PARAM_IN);
init_reg_param(®_params[2], "r2", 32, PARAM_IN);
buf_set_u32(reg_params[2].value, 0, 32, size);
/* armv4 must exit using a hardware breakpoint */
- if (armv4_5->is_armv4)
- exit = nand->copy_area->address + sizeof(code) - 4;
+ if (arm->arch == ARM_ARCH_V4)
+ exit_var = nand->copy_area->address + target_code_size - 4;
/* use alg to write data from NAND chip to work area */
retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
- nand->copy_area->address, exit, 1000, &algo);
+ nand->copy_area->address, exit_var, 1000, arm_algo);
if (retval != ERROR_OK)
LOG_ERROR("error executing hosted NAND read");
return retval;
}
-
projects / fw / openocd / blobdiff