#define CFI_H
#include "flash.h"
-#include "target.h"
+
+#define CFI_STATUS_POLL_MASK_DQ5_DQ6_DQ7 0xE0 /* DQ5..DQ7 */
+#define CFI_STATUS_POLL_MASK_DQ6_DQ7 0xC0 /* DQ6..DQ7 */
typedef struct cfi_flash_bank_s
{
- struct target_s *target;
working_area_t *write_algorithm;
- working_area_t *erase_check_algorithm;
-
+
int x16_as_x8;
-
- u16 manufacturer;
- u16 device_id;
-
+ int jedec_probe;
+ int not_cfi;
+ int probed;
+
+ uint16_t manufacturer;
+ uint16_t device_id;
+
char qry[3];
-
+
/* identification string */
- u16 pri_id;
- u16 pri_addr;
- u16 alt_id;
- u16 alt_addr;
-
+ uint16_t pri_id;
+ uint16_t pri_addr;
+ uint16_t alt_id;
+ uint16_t alt_addr;
+
/* device-system interface */
- u8 vcc_min;
- u8 vcc_max;
- u8 vpp_min;
- u8 vpp_max;
- u8 word_write_timeout_typ;
- u8 buf_write_timeout_typ;
- u8 block_erase_timeout_typ;
- u8 chip_erase_timeout_typ;
- u8 word_write_timeout_max;
- u8 buf_write_timeout_max;
- u8 block_erase_timeout_max;
- u8 chip_erase_timeout_max;
-
+ uint8_t vcc_min;
+ uint8_t vcc_max;
+ uint8_t vpp_min;
+ uint8_t vpp_max;
+ uint8_t word_write_timeout_typ;
+ uint8_t buf_write_timeout_typ;
+ uint8_t block_erase_timeout_typ;
+ uint8_t chip_erase_timeout_typ;
+ uint8_t word_write_timeout_max;
+ uint8_t buf_write_timeout_max;
+ uint8_t block_erase_timeout_max;
+ uint8_t chip_erase_timeout_max;
+
+ uint8_t status_poll_mask;
+
/* flash geometry */
- u8 dev_size;
- u16 interface_desc;
- u16 max_buf_write_size;
- u8 num_erase_regions;
- u32 *erase_region_info;
-
+ uint32_t dev_size;
+ uint16_t interface_desc;
+ uint16_t max_buf_write_size;
+ uint8_t num_erase_regions;
+ uint32_t *erase_region_info;
+
void *pri_ext;
void *alt_ext;
} cfi_flash_bank_t;
-/* Intel primary extended query table
+/* Intel primary extended query table
* as defined for the Advanced+ Boot Block Flash Memory (C3)
* and used by the linux kernel cfi driver (as of 2.6.14)
*/
typedef struct cfi_intel_pri_ext_s
{
char pri[3];
- u8 major_version;
- u8 minor_version;
- u32 feature_support;
- u8 suspend_cmd_support;
- u16 blk_status_reg_mask;
- u8 vcc_optimal;
- u8 vpp_optimal;
- u8 num_protection_fields;
- u16 prot_reg_addr;
- u8 fact_prot_reg_size;
- u8 user_prot_reg_size;
- u8 extra[0];
+ uint8_t major_version;
+ uint8_t minor_version;
+ uint32_t feature_support;
+ uint8_t suspend_cmd_support;
+ uint16_t blk_status_reg_mask;
+ uint8_t vcc_optimal;
+ uint8_t vpp_optimal;
+ uint8_t num_protection_fields;
+ uint16_t prot_reg_addr;
+ uint8_t fact_prot_reg_size;
+ uint8_t user_prot_reg_size;
+ uint8_t extra[0];
} cfi_intel_pri_ext_t;
/* Spansion primary extended query table as defined for and used by
*/
typedef struct cfi_spansion_pri_ext_s
{
- u8 pri[3];
- u8 major_version;
- u8 minor_version;
- u8 SiliconRevision; /* bits 1-0: Address Sensitive Unlock */
- u8 EraseSuspend;
- u8 BlkProt;
- u8 TmpBlkUnprotect;
- u8 BlkProtUnprot;
- u8 SimultaneousOps;
- u8 BurstMode;
- u8 PageMode;
- u8 VppMin;
- u8 VppMax;
- u8 TopBottom;
+ uint8_t pri[3];
+ uint8_t major_version;
+ uint8_t minor_version;
+ uint8_t SiliconRevision; /* bits 1-0: Address Sensitive Unlock */
+ uint8_t EraseSuspend;
+ uint8_t BlkProt;
+ uint8_t TmpBlkUnprotect;
+ uint8_t BlkProtUnprot;
+ uint8_t SimultaneousOps;
+ uint8_t BurstMode;
+ uint8_t PageMode;
+ uint8_t VppMin;
+ uint8_t VppMax;
+ uint8_t TopBottom;
int _reversed_geometry;
+ uint32_t _unlock1;
+ uint32_t _unlock2;
} cfi_spansion_pri_ext_t;
/* Atmel primary extended query table as defined for and used by
*/
typedef struct cfi_atmel_pri_ext_s
{
- u8 pri[3];
- u8 major_version;
- u8 minor_version;
- u8 features;
- u8 bottom_boot;
- u8 burst_mode;
- u8 page_mode;
+ uint8_t pri[3];
+ uint8_t major_version;
+ uint8_t minor_version;
+ uint8_t features;
+ uint8_t bottom_boot;
+ uint8_t burst_mode;
+ uint8_t page_mode;
} cfi_atmel_pri_ext_t;
+enum {
+ CFI_UNLOCK_555_2AA,
+ CFI_UNLOCK_5555_2AAA,
+};
+
+typedef struct cfi_unlock_addresses_s
+{
+ uint32_t unlock1;
+ uint32_t unlock2;
+} cfi_unlock_addresses_t;
+
typedef struct cfi_fixup_s
{
- u16 mfr;
- u16 id;
+ uint16_t mfr;
+ uint16_t id;
void (*fixup)(flash_bank_t *flash, void *param);
void *param;
} cfi_fixup_t;
#define CFI_MFR_AMD 0x0001
+#define CFI_MFR_FUJITSU 0x0004
#define CFI_MFR_ATMEL 0x001F
#define CFI_MFR_ST 0x0020 /* STMicroelectronics */
+#define CFI_MFR_AMIC 0x0037
+#define CFI_MFR_SST 0x00BF
+#define CFI_MFR_MX 0x00C2
#define CFI_MFR_ANY 0xffff
#define CFI_ID_ANY 0xffff