/***************************************************************************
* Copyright (C) 2005, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
+ * Copyright (C) 2009 Michael Schwingen *
+ * michael@schwingen.org *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
#include <string.h>
#include <unistd.h>
-int cfi_register_commands(struct command_context_s *cmd_ctx);
-int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
-int cfi_erase(struct flash_bank_s *bank, int first, int last);
-int cfi_protect(struct flash_bank_s *bank, int set, int first, int last);
-int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
-int cfi_probe(struct flash_bank_s *bank);
-int cfi_auto_probe(struct flash_bank_s *bank);
-int cfi_protect_check(struct flash_bank_s *bank);
-int cfi_info(struct flash_bank_s *bank, char *buf, int buf_size);
+static int cfi_register_commands(struct command_context_s *cmd_ctx);
+static int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
+static int cfi_erase(struct flash_bank_s *bank, int first, int last);
+static int cfi_protect(struct flash_bank_s *bank, int set, int first, int last);
+static int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
+static int cfi_probe(struct flash_bank_s *bank);
+static int cfi_auto_probe(struct flash_bank_s *bank);
+static int cfi_protect_check(struct flash_bank_s *bank);
+static int cfi_info(struct flash_bank_s *bank, char *buf, int buf_size);
-int cfi_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+//static int cfi_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
#define CFI_MAX_BUS_WIDTH 4
#define CFI_MAX_CHIP_WIDTH 4
.info = cfi_info
};
-cfi_unlock_addresses_t cfi_unlock_addresses[] =
+static cfi_unlock_addresses_t cfi_unlock_addresses[] =
{
[CFI_UNLOCK_555_2AA] = { .unlock1 = 0x555, .unlock2 = 0x2aa },
[CFI_UNLOCK_5555_2AAA] = { .unlock1 = 0x5555, .unlock2 = 0x2aaa },
};
/* CFI fixups foward declarations */
-void cfi_fixup_0002_erase_regions(flash_bank_t *flash, void *param);
-void cfi_fixup_0002_unlock_addresses(flash_bank_t *flash, void *param);
-void cfi_fixup_atmel_reversed_erase_regions(flash_bank_t *flash, void *param);
-
-/* fixup after identifying JEDEC manufactuer and ID */
-cfi_fixup_t cfi_jedec_fixups[] = {
- {CFI_MFR_SST, 0x00D4, cfi_fixup_non_cfi, NULL},
- {CFI_MFR_SST, 0x00D5, cfi_fixup_non_cfi, NULL},
- {CFI_MFR_SST, 0x00D6, cfi_fixup_non_cfi, NULL},
- {CFI_MFR_SST, 0x00D7, cfi_fixup_non_cfi, NULL},
- {CFI_MFR_SST, 0x2780, cfi_fixup_non_cfi, NULL},
- {CFI_MFR_ST, 0x00D5, cfi_fixup_non_cfi, NULL},
- {CFI_MFR_ST, 0x00D6, cfi_fixup_non_cfi, NULL},
- {CFI_MFR_AMD, 0x2223, cfi_fixup_non_cfi, NULL},
- {CFI_MFR_AMD, 0x22ab, cfi_fixup_non_cfi, NULL},
- {CFI_MFR_FUJITSU, 0x226b, cfi_fixup_non_cfi, NULL},
- {CFI_MFR_AMIC, 0xb31a, cfi_fixup_non_cfi, NULL},
- {CFI_MFR_MX, 0x225b, cfi_fixup_non_cfi, NULL},
- {CFI_MFR_AMD, 0x225b, cfi_fixup_non_cfi, NULL},
- {0, 0, NULL, NULL}
-};
+static void cfi_fixup_0002_erase_regions(flash_bank_t *flash, void *param);
+static void cfi_fixup_0002_unlock_addresses(flash_bank_t *flash, void *param);
+static void cfi_fixup_atmel_reversed_erase_regions(flash_bank_t *flash, void *param);
/* fixup after reading cmdset 0002 primary query table */
-cfi_fixup_t cfi_0002_fixups[] = {
+static cfi_fixup_t cfi_0002_fixups[] = {
{CFI_MFR_SST, 0x00D4, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]},
{CFI_MFR_SST, 0x00D5, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]},
{CFI_MFR_SST, 0x00D6, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]},
};
/* fixup after reading cmdset 0001 primary query table */
-cfi_fixup_t cfi_0001_fixups[] = {
+static cfi_fixup_t cfi_0001_fixups[] = {
{0, 0, NULL, NULL}
};
-void cfi_fixup(flash_bank_t *bank, cfi_fixup_t *fixups)
+static void cfi_fixup(flash_bank_t *bank, cfi_fixup_t *fixups)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
cfi_fixup_t *f;
}
-void cfi_command(flash_bank_t *bank, u8 cmd, u8 *cmd_buf)
+static void cfi_command(flash_bank_t *bank, u8 cmd, u8 *cmd_buf)
{
int i;
* flash banks are expected to be made of similar chips
* the query result should be the same for all
*/
-u8 cfi_query_u8(flash_bank_t *bank, int sector, u32 offset)
+static u8 cfi_query_u8(flash_bank_t *bank, int sector, u32 offset)
{
target_t *target = bank->target;
u8 data[CFI_MAX_BUS_WIDTH];
* in case of a bank made of multiple chips,
* the individual values are ORed
*/
-u8 cfi_get_u8(flash_bank_t *bank, int sector, u32 offset)
+static u8 cfi_get_u8(flash_bank_t *bank, int sector, u32 offset)
{
target_t *target = bank->target;
u8 data[CFI_MAX_BUS_WIDTH];
}
}
-u16 cfi_query_u16(flash_bank_t *bank, int sector, u32 offset)
+static u16 cfi_query_u16(flash_bank_t *bank, int sector, u32 offset)
{
target_t *target = bank->target;
u8 data[CFI_MAX_BUS_WIDTH * 2];
return data[bank->bus_width - 1] | data[(2 * bank->bus_width) - 1] << 8;
}
-u32 cfi_query_u32(flash_bank_t *bank, int sector, u32 offset)
+static u32 cfi_query_u32(flash_bank_t *bank, int sector, u32 offset)
{
target_t *target = bank->target;
u8 data[CFI_MAX_BUS_WIDTH * 4];
data[(3 * bank->bus_width) - 1] << 16 | data[(4 * bank->bus_width) - 1] << 24;
}
-void cfi_intel_clear_status_register(flash_bank_t *bank)
+static void cfi_intel_clear_status_register(flash_bank_t *bank)
{
target_t *target = bank->target;
u8 command[8];
int cfi_spansion_wait_status_busy(flash_bank_t *bank, int timeout)
{
u8 status, oldstatus;
+ cfi_flash_bank_t *cfi_info = bank->driver_priv;
oldstatus = cfi_get_u8(bank, 0, 0x0);
do {
status = cfi_get_u8(bank, 0, 0x0);
if ((status ^ oldstatus) & 0x40) {
- if (status & 0x20) {
+ if (status & cfi_info->status_poll_mask & 0x20) {
oldstatus = cfi_get_u8(bank, 0, 0x0);
status = cfi_get_u8(bank, 0, 0x0);
if ((status ^ oldstatus) & 0x40) {
return(ERROR_OK);
}
}
- } else {
+ } else { /* no toggle: finished, OK */
LOG_DEBUG("status: 0x%x", status);
return(ERROR_OK);
}
return(ERROR_FLASH_BUSY);
}
-int cfi_read_intel_pri_ext(flash_bank_t *bank)
+static int cfi_read_intel_pri_ext(flash_bank_t *bank)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
return ERROR_OK;
}
-int cfi_read_spansion_pri_ext(flash_bank_t *bank)
+static int cfi_read_spansion_pri_ext(flash_bank_t *bank)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
return ERROR_OK;
}
-int cfi_read_atmel_pri_ext(flash_bank_t *bank)
+static int cfi_read_atmel_pri_ext(flash_bank_t *bank)
{
int retval;
cfi_atmel_pri_ext_t atmel_pri_ext;
return ERROR_OK;
}
-int cfi_read_0002_pri_ext(flash_bank_t *bank)
+static int cfi_read_0002_pri_ext(flash_bank_t *bank)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
}
}
-int cfi_spansion_info(struct flash_bank_s *bank, char *buf, int buf_size)
+static int cfi_spansion_info(struct flash_bank_s *bank, char *buf, int buf_size)
{
int printed;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
return ERROR_OK;
}
-int cfi_intel_info(struct flash_bank_s *bank, char *buf, int buf_size)
+static int cfi_intel_info(struct flash_bank_s *bank, char *buf, int buf_size)
{
int printed;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
return ERROR_OK;
}
-int cfi_register_commands(struct command_context_s *cmd_ctx)
+static int cfi_register_commands(struct command_context_s *cmd_ctx)
{
/*command_t *cfi_cmd = */
register_command(cmd_ctx, NULL, "cfi", NULL, COMMAND_ANY, "flash bank cfi <base> <size> <chip_width> <bus_width> <targetNum> [jedec_probe/x16_as_x8]");
/* flash_bank cfi <base> <size> <chip_width> <bus_width> <target#> [options]
*/
-int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
+static int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
{
cfi_flash_bank_t *cfi_info;
int i;
+ (void) cmd_ctx;
+ (void) cmd;
if (argc < 6)
{
return ERROR_OK;
}
-int cfi_intel_erase(struct flash_bank_s *bank, int first, int last)
+static int cfi_intel_erase(struct flash_bank_s *bank, int first, int last)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
}
-int cfi_spansion_erase(struct flash_bank_s *bank, int first, int last)
+static int cfi_spansion_erase(struct flash_bank_s *bank, int first, int last)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
}
-int cfi_erase(struct flash_bank_s *bank, int first, int last)
+static int cfi_erase(struct flash_bank_s *bank, int first, int last)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
return ERROR_OK;
}
-int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int last)
+static int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int last)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
}
-int cfi_protect(struct flash_bank_s *bank, int set, int first, int last)
+static int cfi_protect(struct flash_bank_s *bank, int set, int first, int last)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
cfi_intel_protect(bank, set, first, last);
break;
default:
- LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
+ LOG_ERROR("protect: cfi primary command set %i unsupported", cfi_info->pri_id);
break;
}
}
}
-u32 cfi_command_val(flash_bank_t *bank, u8 cmd)
+static u32 cfi_command_val(flash_bank_t *bank, u8 cmd)
{
target_t *target = bank->target;
}
}
-int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u32 count)
+static int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u32 count)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
target_t *target = bank->target;
};
u8 target_code[4*CFI_MAX_INTEL_CODESIZE];
const u32 *target_code_src;
- int target_code_size;
+ u32 target_code_size;
int retval = ERROR_OK;
return retval;
}
-int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u32 count)
+static int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u32 count)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext;
return exit_code;
}
-int cfi_intel_write_word(struct flash_bank_s *bank, u8 *word, u32 address)
+static int cfi_intel_write_word(struct flash_bank_s *bank, u8 *word, u32 address)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
return ERROR_OK;
}
-int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address)
+static int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
u8 command[8];
/* Calculate buffer size and boundary mask */
- u32 buffersize = 1UL << cfi_info->max_buf_write_size;
+ u32 buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width);
u32 buffermask = buffersize-1;
u32 bufferwsize;
return ERROR_FLASH_OPERATION_FAILED;
}
+ bufferwsize/=(bank->bus_width / bank->chip_width);
+
+
/* Check for valid size */
if (wordcount > bufferwsize)
{
return ERROR_OK;
}
-int cfi_spansion_write_word(struct flash_bank_s *bank, u8 *word, u32 address)
+static int cfi_spansion_write_word(struct flash_bank_s *bank, u8 *word, u32 address)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
return ERROR_OK;
}
-int cfi_spansion_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address)
+static int cfi_spansion_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext;
/* Calculate buffer size and boundary mask */
- u32 buffersize = 1UL << cfi_info->max_buf_write_size;
+ u32 buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width);
u32 buffermask = buffersize-1;
u32 bufferwsize;
return ERROR_FLASH_OPERATION_FAILED;
}
+ bufferwsize/=(bank->bus_width / bank->chip_width);
+
/* Check for valid size */
if (wordcount > bufferwsize)
{
return ERROR_OK;
}
-int cfi_write_word(struct flash_bank_s *bank, u8 *word, u32 address)
+static int cfi_write_word(struct flash_bank_s *bank, u8 *word, u32 address)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
return ERROR_FLASH_OPERATION_FAILED;
}
-int cfi_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address)
+static int cfi_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
return cfi_intel_write_words(bank, word, wordcount, address);
break;
case 2:
- return cfi_spansion_write_words(bank, word, wordcount, address);
+ return cfi_spansion_write_words(bank, word, wordcount, address);
break;
default:
LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
{
if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE)
{
- u32 buffersize = 1UL << cfi_info->max_buf_write_size;
+ //adjust buffersize for chip width
+ u32 buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width);
u32 buffermask = buffersize-1;
u32 bufferwsize;
return ERROR_FLASH_OPERATION_FAILED;
}
+ bufferwsize/=(bank->bus_width / bank->chip_width);
+
/* fall back to memory writes */
- while (count >= bank->bus_width)
+ while (count >= (u32)bank->bus_width)
{
int fallback;
if ((write_p & 0xff) == 0)
return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word);
}
-void cfi_fixup_atmel_reversed_erase_regions(flash_bank_t *bank, void *param)
+static void cfi_fixup_atmel_reversed_erase_regions(flash_bank_t *bank, void *param)
{
+ (void) param;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext;
pri_ext->_reversed_geometry = 1;
}
-void cfi_fixup_0002_erase_regions(flash_bank_t *bank, void *param)
+static void cfi_fixup_0002_erase_regions(flash_bank_t *bank, void *param)
{
int i;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext;
+ (void) param;
if ((pri_ext->_reversed_geometry) || (pri_ext->TopBottom == 3))
{
}
}
-void cfi_fixup_0002_unlock_addresses(flash_bank_t *bank, void *param)
+static void cfi_fixup_0002_unlock_addresses(flash_bank_t *bank, void *param)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext;
pri_ext->_unlock2 = unlock_addresses->unlock2;
}
-int cfi_probe(struct flash_bank_s *bank)
+static int cfi_probe(struct flash_bank_s *bank)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
target_t *target = bank->target;
int num_sectors = 0;
int i;
int sector = 0;
- u32 offset = 0;
u32 unlock1 = 0x555;
u32 unlock2 = 0x2aa;
int retval;
}
}
+ LOG_INFO("Flash Manufacturer/Device: 0x%04x 0x%04x", cfi_info->manufacturer, cfi_info->device_id);
/* switch back to read array mode */
cfi_command(bank, 0xf0, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command)) != ERROR_OK)
return retval;
}
- cfi_fixup(bank, cfi_jedec_fixups);
+ /* check device/manufacturer ID for known non-CFI flashes. */
+ cfi_fixup_non_cfi(bank);
/* query only if this is a CFI compatible flash,
* otherwise the relevant info has already been filled in
{
return retval;
}
- LOG_ERROR("Could not probe bank");
+ LOG_ERROR("Could not probe bank: no QRY");
return ERROR_FLASH_BANK_INVALID;
}
(1 << cfi_info->block_erase_timeout_max) * (1 << cfi_info->block_erase_timeout_typ),
(1 << cfi_info->chip_erase_timeout_max) * (1 << cfi_info->chip_erase_timeout_typ));
- cfi_info->dev_size = cfi_query_u8(bank, 0, 0x27);
+ cfi_info->dev_size = 1<<cfi_query_u8(bank, 0, 0x27);
cfi_info->interface_desc = cfi_query_u16(bank, 0, 0x28);
cfi_info->max_buf_write_size = cfi_query_u16(bank, 0, 0x2a);
cfi_info->num_erase_regions = cfi_query_u8(bank, 0, 0x2c);
- LOG_DEBUG("size: 0x%x, interface desc: %i, max buffer write size: %x", 1 << cfi_info->dev_size, cfi_info->interface_desc, (1 << cfi_info->max_buf_write_size));
-
- if (((1 << cfi_info->dev_size) * bank->bus_width / bank->chip_width) != bank->size)
- {
- LOG_WARNING("configuration specifies 0x%x size, but a 0x%x size flash was found", bank->size, 1 << cfi_info->dev_size);
- }
+ LOG_DEBUG("size: 0x%x, interface desc: %i, max buffer write size: %x", cfi_info->dev_size, cfi_info->interface_desc, (1 << cfi_info->max_buf_write_size));
if (cfi_info->num_erase_regions)
{
break;
/* AMD/Spansion, Atmel, ... command set */
case 0x0002:
+ cfi_info->status_poll_mask = CFI_STATUS_POLL_MASK_DQ5_DQ6_DQ7; /* default for all CFI flashs */
cfi_read_0002_pri_ext(bank);
break;
default:
{
return retval;
}
- }
+ } /* end CFI case */
/* apply fixups depending on the primary command set */
switch(cfi_info->pri_id)
break;
}
+ if ((cfi_info->dev_size * bank->bus_width / bank->chip_width) != bank->size)
+ {
+ LOG_WARNING("configuration specifies 0x%x size, but a 0x%x size flash was found", bank->size, cfi_info->dev_size);
+ }
+
if (cfi_info->num_erase_regions == 0)
{
/* a device might have only one erase block, spanning the whole device */
}
else
{
+ u32 offset = 0;
+
for (i = 0; i < cfi_info->num_erase_regions; i++)
{
num_sectors += (cfi_info->erase_region_info[i] & 0xffff) + 1;
for (i = 0; i < cfi_info->num_erase_regions; i++)
{
- int j;
+ u32 j;
for (j = 0; j < (cfi_info->erase_region_info[i] & 0xffff) + 1; j++)
{
bank->sectors[sector].offset = offset;
sector++;
}
}
+ if (offset != cfi_info->dev_size)
+ {
+ LOG_WARNING("CFI size is 0x%x, but total sector size is 0x%x", cfi_info->dev_size, offset);
+ }
}
-
+
cfi_info->probed = 1;
return ERROR_OK;
}
-int cfi_auto_probe(struct flash_bank_s *bank)
+static int cfi_auto_probe(struct flash_bank_s *bank)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
if (cfi_info->probed)
}
-int cfi_intel_protect_check(struct flash_bank_s *bank)
+static int cfi_intel_protect_check(struct flash_bank_s *bank)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
}
-int cfi_spansion_protect_check(struct flash_bank_s *bank)
+static int cfi_spansion_protect_check(struct flash_bank_s *bank)
{
int retval;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
}
-int cfi_protect_check(struct flash_bank_s *bank)
+static int cfi_protect_check(struct flash_bank_s *bank)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
return ERROR_OK;
}
-int cfi_info(struct flash_bank_s *bank, char *buf, int buf_size)
+static int cfi_info(struct flash_bank_s *bank, char *buf, int buf_size)
{
int printed;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
}
if (cfi_info->not_cfi == 0)
- printed = snprintf(buf, buf_size, "\ncfi information:\n");
+ printed = snprintf(buf, buf_size, "\ncfi information:\n");
else
printed = snprintf(buf, buf_size, "\nnon-cfi flash:\n");
buf += printed;
buf_size -= printed;
printed = snprintf(buf, buf_size, "size: 0x%x, interface desc: %i, max buffer write size: %x\n",
- 1 << cfi_info->dev_size,
+ cfi_info->dev_size,
cfi_info->interface_desc,
1 << cfi_info->max_buf_write_size);
buf += printed;
projects / fw / openocd / blobdiff