fix overlapping sloc problem

[fw/sdcc] / src / ds390 / ralloc.c

diff --git a/src/ds390/ralloc.c b/src/ds390/ralloc.c
index 9d5fbc769324699d5e780093c65b9c40ff99f0c9..3fab7c2dc497c4f3e161e0c9d050642ee650a617 100644 (file)
--- a/src/ds390/ralloc.c
+++ b/src/ds390/ralloc.c
@@ -380,13 +380,11 @@ noOverLap (set * itmpStack, symbol * fsym)
 {
   symbol *sym;
 
-
   for (sym = setFirstItem (itmpStack); sym;
        sym = setNextItem (itmpStack))
     {
-      if (sym->liveTo > fsym->liveFrom)
+      if (sym->liveTo >= fsym->liveFrom)
        return 0;
-
     }
 
   return 1;
@@ -1149,19 +1147,21 @@ serialRegAssign (eBBlock ** ebbs, int count)
 
              /* if it has a spillocation & is used less than
                 all other live ranges then spill this */
-             if (willCS && sym->usl.spillLoc)
-               {
-
-                 symbol *leastUsed =
-                 leastUsedLR (liveRangesWith (spillable,
-                                              allLRs,
-                                              ebbs[i],
-                                              ic));
-                 if (leastUsed &&
-                     leastUsed->used > sym->used)
-                   {
-                     spillThis (sym);
-                     continue;
+               if (willCS) {
+                   if (sym->usl.spillLoc) {
+                       symbol *leastUsed = leastUsedLR (liveRangesWith (spillable,
+                                                                        allLRs, ebbs[i], ic));
+                       if (leastUsed && leastUsed->used > sym->used) {
+                           spillThis (sym);
+                           continue;
+                       }
+                   } else {
+                       /* if none of the liveRanges have a spillLocation then better
+                          to spill this one than anything else already assigned to registers */
+                       if (liveRangesWith(spillable,noSpilLoc,ebbs[i],ic)) {
+                           spillThis (sym);
+                           continue;
+                       }
                    }
                }
 
@@ -2021,22 +2021,22 @@ static bool
 isBitwiseOptimizable (iCode * ic)
 {
   sym_link *ltype = getSpec (operandType (IC_LEFT (ic)));
-  // jwk sym_link *rtype = getSpec (operandType (IC_RIGHT (ic)));
+  sym_link *rtype = getSpec (operandType (IC_RIGHT (ic)));
 
   /* bitwise operations are considered optimizable
      under the following conditions (Jean-Louis VERN) 
 
-     x & lit   <== jwk: should be x && lit
+     x & lit
      bit & bit
      bit & x
      bit ^ bit
      bit ^ x
-     x   ^ lit <== jwk: should be x ^^ lit
-     x   | lit <== jwk: should be x || lit
+     x   ^ lit
+     x   | lit
      bit | bit
      bit | x
    */
-  if ( /* jwk IS_LITERAL (rtype) || */
+  if ( IS_LITERAL (rtype) ||
       (IS_BITVAR (ltype) && IN_BITSPACE (SPEC_OCLS (ltype))))
     return TRUE;
   else
@@ -2208,7 +2208,10 @@ packForPush (iCode * ic, eBBlock * ebp)
   for (lic = ic; lic != dic ; lic = lic->prev) {
          if (bitVectBitValue(dbv,lic->key)) return ;
   }
-
+  /* extend the live range of replaced operand if needed */
+  if (OP_SYMBOL(IC_RIGHT(dic))->liveTo < ic->seq) {
+         OP_SYMBOL(IC_RIGHT(dic))->liveTo = ic->seq;
+  }
   /* we now we know that it has one & only one def & use
      and the that the definition is an assignment */
   IC_LEFT (ic) = IC_RIGHT (dic);
@@ -2329,6 +2332,7 @@ packRegisters (eBBlock * ebp)
            }
        }
 
+#if 0
       /* if the condition of an if instruction
          is defined in the previous instruction then
          mark the itemp as a conditional */
@@ -2342,6 +2346,22 @@ packRegisters (eBBlock * ebp)
          OP_SYMBOL (IC_RESULT (ic))->regType = REG_CND;
          continue;
        }
+#else
+      /* if the condition of an if instruction
+         is defined in the previous instruction and
+        this is the only usage then
+         mark the itemp as a conditional */
+      if ((IS_CONDITIONAL (ic) ||
+          (IS_BITWISE_OP(ic) && isBitwiseOptimizable (ic))) &&
+         ic->next && ic->next->op == IFX &&
+         bitVectnBitsOn (OP_USES(IC_RESULT(ic)))==1 &&
+         isOperandEqual (IC_RESULT (ic), IC_COND (ic->next)) &&
+         OP_SYMBOL (IC_RESULT (ic))->liveTo <= ic->next->seq)
+       {
+         OP_SYMBOL (IC_RESULT (ic))->regType = REG_CND;
+         continue;
+       }
+#endif
 
       /* reduce for support function calls */
       if (ic->supportRtn || ic->op == '+' || ic->op == '-')