Fixed bug #483124

[fw/sdcc] / src / ds390 / peeph.def

diff --git a/src/ds390/peeph.def b/src/ds390/peeph.def
index 71b5cd29361949b5c34f516c3a2f22009204ce3d..c9175e3984de372f6668120e5afd599f504d7ec7 100644 (file)
--- a/src/ds390/peeph.def
+++ b/src/ds390/peeph.def
@@ -1004,13 +1004,14 @@ replace {
         mov  %1,@r%2
 }
 
-replace {
-        mov  %1,%2
-        mov  %2,%1
-} by {
-        ; Peephole 177   removed redundant mov
-        mov  %1,%2
-}
+// this one will screw assignes to volatile/sfr's
+//replace {
+//        mov  %1,%2
+//        mov  %2,%1
+//} by {
+//        ; Peephole 177   removed redundant mov
+//        mov  %1,%2
+//}
 
 replace {
         mov  a,%1
@@ -1059,6 +1060,15 @@ replace {
         mov  dptr,#0x0000
 }
 
+replace {
+       mov dpl,#%1
+       mov dph,#(%1 >> 8)
+       mov dpx,#(%1 >> 16)
+} by {
+       ; Peephole 182b used 24 bit load of DPTR
+       mov dptr,#%1
+}
+
 // saves 2 bytes, ?? cycles.
 replace {
         mov  dpl,#%1
@@ -1882,3 +1892,59 @@ replace {
        mov     dptr, %2
 ; Peephole 224: DPS usage re-arranged.
 }
+
+replace {
+       mov     dps, #0x01
+       mov     dptr, %1
+       mov     dps, #0x00
+} by {
+       mov     dps, #0x01
+       mov     dptr, %1
+       dec     dps
+}
+
+replace {
+       xch     a, ap
+       add     a, ap
+} by {
+       add     a, ap
+}
+
+replace {
+       xch     a, ap
+       addc    a, ap
+} by {
+       addc    a, ap
+}
+
+replace {
+       inc     dps
+       mov     dps, #0x%1
+} by {
+       mov     dps, #0x%1
+}
+
+replace {
+       dec     dps
+       mov     dps, #0x%1
+} by {
+       mov     dps, #0x%1
+}
+
+
+replace {
+       add     a,#%2
+       mov     dpl,a
+       clr  a
+       addc    a,#(%2 >> 8)
+       mov     dph,a
+       clr  a
+       addc    a,#(%2 >> 16)
+       mov     dpx,a
+       clr     a
+       movc    a,@a+dptr
+} by {
+       ; Peephole 227.a movc optimize
+       mov     dptr,#%2
+       movc    a,@a+dptr
+}