/* if the registers have been saved already then
do nothing */
- if (ic->regsSaved || IFFUNC_ISNAKED(OP_SYM_TYPE(IC_LEFT(ic)))) return ;
+ if (ic->regsSaved ||
+ (IS_SYMOP(IC_LEFT(ic)) && IFFUNC_ISNAKED(OP_SYM_TYPE(IC_LEFT(ic)))))
+ return ;
/* special case if DPTR alive across a function call then must save it
even though callee saves */
- if (IFFUNC_CALLEESAVES(OP_SYMBOL (IC_LEFT (ic))->type)) {
+ if (IS_SYMOP(IC_LEFT(ic)) &&
+ IFFUNC_CALLEESAVES(OP_SYMBOL (IC_LEFT (ic))->type)) {
int i;
rsave = newBitVect(ic->rMask->size);
for (i = DPL_IDX ; i <= B_IDX ; i++ ) {
}
}
}
- // jwk: this needs a closer look
+ // TODO: this needs a closer look
SPEC_ISR_SAVED_BANKS(currFunc->etype) = banksToSave;
}
}
* Restore any register banks saved by genFunction
* in reverse order.
*/
- // jwk: this needs a closer look
unsigned savedBanks = SPEC_ISR_SAVED_BANKS(currFunc->etype);
int ix;
AOP_TYPE (right) == AOP_CRY)
{
emitcode ("mov", "c,%s", AOP (right)->aopu.aop_dir);
- emitcode ("anl", "c,/%s", AOP (left)->aopu.aop_dir);
+ emitcode ("anl", "c,%s", AOP (left)->aopu.aop_dir);
}
else
{
if (offset) {
switch (offset) {
case 1:
- tsprintf(s, sizeof(s), "!his",sym->rname);
+ tsprintf(s, sizeof(s), "#!his",sym->rname);
break;
case 2:
- tsprintf(s, sizeof(s), "!hihis",sym->rname);
+ tsprintf(s, sizeof(s), "#!hihis",sym->rname);
break;
case 3:
- tsprintf(s, sizeof(s), "!hihihis",sym->rname);
+ tsprintf(s, sizeof(s), "#!hihihis",sym->rname);
break;
default: /* should not need this (just in case) */
SNPRINTF (s, sizeof(s), "#(%s >> %d)",
}
#if 1
/* print the allocation information */
- if (allocInfo)
+ if (allocInfo && currFunc)
printAllocInfo (currFunc, codeOutFile);
#endif
/* if debug information required */
if (options.debug && currFunc)
{
- cdbSymbol (currFunc, cdbFile, FALSE, TRUE);
+ debugFile->writeFunction(currFunc);
_G.debugLine = 1;
if (IS_STATIC (currFunc->etype))
emitcode ("", "F%s$%s$0$0 ==.", moduleName, currFunc->name);