#define DATA_NAME port->mem.data_name
#define IDATA_NAME port->mem.idata_name
#define XDATA_NAME port->mem.xdata_name
+#define XIDATA_NAME port->mem.xidata_name
+#define XINIT_NAME port->mem.xinit_name
#define BIT_NAME port->mem.bit_name
#define REG_NAME port->mem.reg_name
#define STATIC_NAME port->mem.static_name
extern memmap *code; /* code segment */
extern memmap *data; /* internal data upto 128 */
extern memmap *xdata; /* external data */
+extern memmap *xidata; /* the initialized xdata */
+extern memmap *xinit; /* the initializers for xidata */
extern memmap *idata; /* internal data upto 256 */
extern memmap *bit; /* bit addressable space */
extern memmap *statsg; /* static code segment */