Many changes. Started a second pass to the register allocator & true 10bit stack

[fw/sdcc] / src / SDCCicode.c

diff --git a/src/SDCCicode.c b/src/SDCCicode.c
index b7b7841cf16bad7cf5c51c178753d679420c06f2..ee41b1c2ec355a91c3ca15c488a305877e621fcf 100644 (file)
--- a/src/SDCCicode.c
+++ b/src/SDCCicode.c
@@ -222,12 +222,13 @@ printOperand (operand * op, FILE * file)
     case SYMBOL:
 #define REGA 1
 #ifdef REGA
-      fprintf (file, "%s [k%d lr%d:%d so:%d]{ ia%d re%d rm%d nos%d}",          /*{ar%d rm%d ru%d p%d a%d u%d i%d au%d k%d ks%d}"  , */
+      fprintf (file, "%s [k%d lr%d:%d so:%d]{ ia%d re%d rm%d nos%d ru%d}",             /*{ar%d rm%d ru%d p%d a%d u%d i%d au%d k%d ks%d}"  , */
               (OP_SYMBOL (op)->rname[0] ? OP_SYMBOL (op)->rname : OP_SYMBOL (op)->name),
               op->key,
               OP_LIVEFROM (op), OP_LIVETO (op),
               OP_SYMBOL (op)->stack,
-              op->isaddr, OP_SYMBOL (op)->isreqv, OP_SYMBOL (op)->remat,OP_SYMBOL(op)->noSpilLoc
+              op->isaddr, OP_SYMBOL (op)->isreqv, OP_SYMBOL (op)->remat,OP_SYMBOL(op)->noSpilLoc,
+              OP_SYMBOL(op)->ruonly
        );
       {
        fprintf (file, "{");
@@ -2291,10 +2292,6 @@ geniCodeBitwise (operand * left, operand * right,
 {
   iCode *ic;
 
-  // bitwise operations must be done unsigned
-  // WHY ? causes very bad things to happen with CSE
-  //  SPEC_USIGN(resType)=1;
-
   left = geniCodeCast (resType, left, TRUE);
   right = geniCodeCast (resType, right, TRUE);
 
@@ -2568,7 +2565,7 @@ geniCodeConditional (ast * tree,int lvl)
   true = ast2iCode (tree->right->left,lvl+1);
 
   /* move the value to a new Operand */
-  result = newiTempOperand (operandType (true), 0);
+  result = newiTempOperand (tree->right->ftype, 0);
   geniCodeAssign (result, geniCodeRValue (true, FALSE), 0);
 
   /* generate an unconditional goto */