case SYMBOL:
#define REGA 1
#ifdef REGA
- fprintf (file, "%s [k%d lr%d:%d so:%d]{ ia%d re%d rm%d}", /*{ar%d rm%d ru%d p%d a%d u%d i%d au%d k%d ks%d}" , */
+ fprintf (file, "%s [k%d lr%d:%d so:%d]{ ia%d re%d rm%d nos%d}", /*{ar%d rm%d ru%d p%d a%d u%d i%d au%d k%d ks%d}" , */
(OP_SYMBOL (op)->rname[0] ? OP_SYMBOL (op)->rname : OP_SYMBOL (op)->name),
op->key,
OP_LIVEFROM (op), OP_LIVETO (op),
OP_SYMBOL (op)->stack,
- op->isaddr, OP_SYMBOL (op)->isreqv, OP_SYMBOL (op)->remat
+ op->isaddr, OP_SYMBOL (op)->isreqv, OP_SYMBOL (op)->remat,OP_SYMBOL(op)->noSpilLoc
);
{
fprintf (file, "{");
nop->isvolatile = op->isvolatile;
nop->isGlobal = op->isGlobal;
nop->isLiteral = op->isLiteral;
- nop->noSpilLoc = op->noSpilLoc;
nop->usesDefs = op->usesDefs;
nop->isParm = op->isParm;
return nop;
nop->isvolatile = op->isvolatile;
nop->isGlobal = op->isGlobal;
nop->isLiteral = op->isLiteral;
- nop->noSpilLoc = op->noSpilLoc;
nop->usesDefs = op->usesDefs;
nop->isParm = op->isParm;
if port has 1 byte muldiv */
if (p2 && !IS_FLOAT (letype) &&
!((resultIsInt) && (getSize (resType) != getSize (ltype)) &&
- (port->muldiv.native_below == 1)))
+ (port->support.muldiv == 1)))
{
if ((resultIsInt) && (getSize (resType) != getSize (ltype)))
{
}
rOp = newiTempOperand (rvtype, 0);
- rOp->noSpilLoc = 1;
+ OP_SYMBOL(rOp)->noSpilLoc = 1;
if (IS_ITEMP (rv))
- rv->noSpilLoc = 1;
+ OP_SYMBOL(rv)->noSpilLoc = 1;
geniCodeAssign (rOp, rv, 0);
}
rOp = newiTempOperand (rvtype, 0);
- rOp->noSpilLoc = 1;
+ OP_SYMBOL(rOp)->noSpilLoc = 1;
if (IS_ITEMP (rv))
- rv->noSpilLoc = 1;
+ OP_SYMBOL(rv)->noSpilLoc = 1;
geniCodeAssign (rOp, rv, 0);
int nbits = bitsForType (ltype);
long v = (long) operandLitValue (right);
- if (v > ((LONG_LONG) 1 << nbits) && v > 0)
+ if (v >= ((LONG_LONG) 1 << nbits) && v > 0)
werror (W_CONST_RANGE, " compare operation ");
}
int nbits = bitsForType (ltype);
long v = (long) operandLitValue (right);
- if (v > ((LONG_LONG) 1 << nbits) && v > 0)
+ if (v >= ((LONG_LONG) 1 << nbits) && v > 0)
werror (W_CONST_RANGE, " = operation");
}