void printIval (symbol *, sym_link *, initList *, FILE *);
set *publics = NULL; /* public variables */
-set *externs = NULL; /* Varibles that are declared as extern */
+set *externs = NULL; /* Variables that are declared as extern */
-/* TODO: this should be configurable (DS803C90 uses more than 6) */
-unsigned maxInterrupts = 6;
+unsigned maxInterrupts = 0;
int allocInfo = 1;
symbol *mainf;
set *pipeSet = NULL; /* set of pipes */
int ret;
if (name) {
- ret = unlink (name);
+ ret = remove (name);
assert(ret == 0);
Safe_free (name);
}
/* if it has an initial value then do it only if
it is a global variable */
if (sym->ival && sym->level == 0) {
- if (SPEC_OCLS(sym->etype)==xidata) {
+ if ((SPEC_OCLS(sym->etype)==xidata) && !SPEC_ABSA (sym->etype)) {
/* create a new "XINIT (CODE)" symbol, that will be emitted later
in the static seg */
newSym=copySymbol (sym);
printIval (sym, sym->type, sym->ival, tmpFile);
noAlloc--;
}
-
- sym->ival=NULL;
} else {
if (IS_AGGREGATE (sym->type)) {
ival = initAggregates (sym, sym->ival, NULL);
sym->name);
}
ival = newNode ('=', newAst_VALUE (symbolVal (sym)),
- decorateType (resolveSymbols (list2expr (sym->ival)), RESULT_CHECK));
+ decorateType (resolveSymbols (list2expr (sym->ival)), RESULT_TYPE_NONE));
}
codeOutFile = statsg->oFile;
allocInfo = 1;
}
}
- sym->ival = NULL;
}
/* if it has an absolute address then generate
an equate for this no need to allocate space */
- if (SPEC_ABSA (sym->etype))
+ if (SPEC_ABSA (sym->etype) && !sym->ival)
{
char *equ="=";
if (options.debug) {
sym->rname, equ,
SPEC_ADDR (sym->etype));
}
- else {
- int size = getAllocSize (sym->type);
- if (size==0) {
- werrorfl (sym->fileDef, sym->lineDef, E_UNKNOWN_SIZE, sym->name);
- }
- /* allocate space */
- if (options.debug) {
- fprintf (map->oFile, "==.\n");
+ else
+ {
+ int size = getSize (sym->type) + sym->flexArrayLength;
+ if (size==0) {
+ werrorfl (sym->fileDef, sym->lineDef, E_UNKNOWN_SIZE, sym->name);
+ }
+ /* allocate space */
+ if (options.debug) {
+ fprintf (map->oFile, "==.\n");
+ }
+ if (SPEC_ABSA (sym->etype))
+ {
+ tfprintf (map->oFile, "\t!org\n", SPEC_ADDR (sym->etype));
+ }
+ if (IS_STATIC (sym->etype) || sym->level)
+ tfprintf (map->oFile, "!slabeldef\n", sym->rname);
+ else
+ tfprintf (map->oFile, "!labeldef\n", sym->rname);
+ tfprintf (map->oFile, "\t!ds\n", (unsigned int) size & 0xffff);
}
- if (IS_STATIC (sym->etype))
- tfprintf (map->oFile, "!slabeldef\n", sym->rname);
- else
- tfprintf (map->oFile, "!labeldef\n", sym->rname);
- tfprintf (map->oFile, "\t!ds\n",
- (unsigned int) size & 0xffff);
- }
+ sym->ival = NULL;
}
}
if (IS_AST_OP (expr) && expr->opval.op == '&') {
/* address of symbol */
if (IS_AST_SYM_VALUE (expr->left)) {
- val = copyValue (AST_VALUE (expr->left));
+ val = AST_VALUE (expr->left);
val->type = newLink (DECLARATOR);
if (SPEC_SCLS (expr->left->etype) == S_CODE) {
DCL_TYPE (val->type) = CPOINTER;
iloop = ilist->init.deep;
}
- for (; sflds; sflds = sflds->next, iloop = (iloop ? iloop->next : NULL)) {
- if (IS_BITFIELD(sflds->type)) {
- printIvalBitFields(&sflds,&iloop,oFile);
- } else {
- printIval (sym, sflds->type, iloop, oFile);
+ if (SPEC_STRUCT (type)->type == UNION) {
+ printIval (sym, sflds->type, iloop, oFile);
+ iloop = iloop->next;
+ } else {
+ for (; sflds; sflds = sflds->next, iloop = (iloop ? iloop->next : NULL)) {
+ if (IS_BITFIELD(sflds->type)) {
+ printIvalBitFields(&sflds,&iloop,oFile);
+ } else {
+ printIval (sym, sflds->type, iloop, oFile);
+ }
}
}
if (iloop) {
/* printIvalChar - generates initital value for character array */
/*-----------------------------------------------------------------*/
int
-printIvalChar (sym_link * type, initList * ilist, FILE * oFile, char *s)
+printIvalChar (symbol * sym, sym_link * type, initList * ilist, FILE * oFile, char *s)
{
value *val;
+ unsigned int size = DCL_ELEM (type);
if (!s)
{
-
val = list2val (ilist);
/* if the value is a character string */
if (IS_ARRAY (val->type) && IS_CHAR (val->etype))
{
- if (!DCL_ELEM (type))
- DCL_ELEM (type) = strlen (SPEC_CVAL (val->etype).v_char) + 1;
+ if (!size)
+ {
+ /* we have not been given a size, but now we know it */
+ size = strlen (SPEC_CVAL (val->etype).v_char) + 1;
+ /* but first check, if it's a flexible array */
+ if (sym && IS_STRUCT (sym->type))
+ sym->flexArrayLength = size;
+ else
+ DCL_ELEM (type) = size;
+ }
- printChar (oFile, SPEC_CVAL (val->etype).v_char, DCL_ELEM (type));
+ printChar (oFile, SPEC_CVAL (val->etype).v_char, size);
return 1;
}
printIvalArray (symbol * sym, sym_link * type, initList * ilist,
FILE * oFile)
{
+ value *val;
initList *iloop;
unsigned int size = 0;
/* array of characters can be init */
/* by a string */
if (IS_CHAR (type->next)) {
- if (!IS_LITERAL(list2val(ilist)->etype)) {
+ val = list2val(ilist);
+ if (!val) {
+ werrorfl (ilist->filename, ilist->lineno, E_INIT_STRUCT, sym->name);
+ return;
+ }
+ if (!IS_LITERAL(val->etype)) {
werrorfl (ilist->filename, ilist->lineno, E_CONST_EXPECTED);
return;
}
- if (printIvalChar (type,
+ if (printIvalChar (sym, type,
(ilist->type == INIT_DEEP ? ilist->init.deep : ilist),
oFile, SPEC_CVAL (sym->etype).v_char))
return;
}
}
} else {
- // we have not been given a size, but we now know it
- DCL_ELEM (type) = size;
+ /* we have not been given a size, but now we know it */
+ /* but first check, if it's a flexible array */
+ if (IS_STRUCT (sym->type))
+ sym->flexArrayLength = size * getSize (type->next);
+ else
+ DCL_ELEM (type) = size;
}
return;
if (IS_EXTERN (sym->etype))
continue;
- /* if it is not static add it to the public
- table */
+ /* if it is not static add it to the public table */
if (!IS_STATIC (sym->etype))
{
addSetHead (&publics, sym);
fprintf (out, "%s$%d$%d", sym->name, sym->level, sym->block);
}
- /* if it has an absolute address */
- if (SPEC_ABSA (sym->etype))
+ /* if it has an absolute address and no initializer */
+ if (SPEC_ABSA (sym->etype) && !sym->ival)
{
if (options.debug)
fprintf (out, " == 0x%04x\n", SPEC_ADDR (sym->etype));
/* if it has an initial value */
if (sym->ival)
{
+ if (SPEC_ABSA (sym->etype))
+ {
+ tfprintf (out, "\t!org\n", SPEC_ADDR (sym->etype));
+ }
fprintf (out, "%s:\n", sym->rname);
noAlloc++;
resolveIvalSym (sym->ival, sym->type);
data, idata & bit & xdata */
emitRegularMap (data, TRUE, TRUE);
emitRegularMap (idata, TRUE, TRUE);
- emitRegularMap (bit, TRUE, FALSE);
+ emitRegularMap (d_abs, TRUE, TRUE);
+ emitRegularMap (i_abs, TRUE, TRUE);
+ emitRegularMap (bit, TRUE, TRUE);
+ emitRegularMap (pdata, TRUE, TRUE);
emitRegularMap (xdata, TRUE, TRUE);
if (port->genXINIT) {
emitRegularMap (xidata, TRUE, TRUE);
emitRegularMap (home, TRUE, FALSE);
emitRegularMap (code, TRUE, FALSE);
+ if (options.const_seg) {
+ tfprintf (code->oFile, "\t!area\n", options.const_seg);
+ }
emitStaticSeg (statsg, code->oFile);
if (port->genXINIT) {
tfprintf (code->oFile, "\t!area\n", xinit->sname);
emitStaticSeg (xinit, code->oFile);
}
+ tfprintf (code->oFile, "\t!area\n", c_abs->sname);
+ emitStaticSeg (c_abs, code->oFile);
inInitMode--;
}
void
createInterruptVect (FILE * vFile)
{
- unsigned i = 0;
mainf = newSymbol ("main", 0);
mainf->block = 0;
return;
}
- tfprintf (vFile, "\t!areacode\n", CODE_NAME);
+ tfprintf (vFile, "\t!areacode\n", HOME_NAME);
fprintf (vFile, "__interrupt_vect:\n");
if (!port->genIVT || !(port->genIVT (vFile, interrupts, maxInterrupts)))
{
- /* "generic" interrupt table header (if port doesn't specify one).
- * Look suspiciously like 8051 code to me...
- */
-
- fprintf (vFile, "\tljmp\t__sdcc_gsinit_startup\n");
-
- /* now for the other interrupts */
- for (; i < maxInterrupts; i++)
- {
- if (interrupts[i])
- {
- fprintf (vFile, "\tljmp\t%s\n", interrupts[i]->rname);
- if ( i != maxInterrupts - 1 )
- fprintf (vFile, "\t.ds\t5\n");
- }
- else
- {
- fprintf (vFile, "\treti\n");
- if ( i != maxInterrupts - 1 )
- fprintf (vFile, "\t.ds\t7\n");
- }
- }
+ /* There's no such thing as a "generic" interrupt table header. */
+ wassert(0);
}
}
--len;
for (p = dest, i = 0; *src != '\0' && i < len; ++src, ++i) {
- *p++ = isspace(*src) ? '_' : *src;
+ *p++ = isspace((unsigned char)*src) ? '_' : *src;
}
*p = '\0';
cdbStructBlock (0);
vFile = tempfile ();
- /* PENDING: this isnt the best place but it will do */
+ /* PENDING: this isn't the best place but it will do */
if (port->general.glue_up_main)
{
/* create the interrupt vector table */
{
/* copy the sbit segment */
fprintf (asmFile, "%s", iComments2);
- fprintf (asmFile, "; special function bits \n");
+ fprintf (asmFile, "; special function bits\n");
fprintf (asmFile, "%s", iComments2);
copyFile (asmFile, sfrbit->oFile);
if(RegBankUsed[0]||RegBankUsed[1]||RegBankUsed[2]||RegBankUsed[3])
{
fprintf (asmFile, "%s", iComments2);
- fprintf (asmFile, "; overlayable register banks \n");
+ fprintf (asmFile, "; overlayable register banks\n");
fprintf (asmFile, "%s", iComments2);
if(RegBankUsed[0])
- fprintf (asmFile, "\t.area REG_BANK_0\t(REL,OVR,DATA)\n\t.ds 8\n");
+ fprintf (asmFile, "\t.area REG_BANK_0\t(REL,OVR,DATA)\n\t.ds 8\n");
if(RegBankUsed[1]||options.parms_in_bank1)
- fprintf (asmFile, "\t.area REG_BANK_1\t(REL,OVR,DATA)\n\t.ds 8\n");
+ fprintf (asmFile, "\t.area REG_BANK_1\t(REL,OVR,DATA)\n\t.ds 8\n");
if(RegBankUsed[2])
- fprintf (asmFile, "\t.area REG_BANK_2\t(REL,OVR,DATA)\n\t.ds 8\n");
+ fprintf (asmFile, "\t.area REG_BANK_2\t(REL,OVR,DATA)\n\t.ds 8\n");
if(RegBankUsed[3])
- fprintf (asmFile, "\t.area REG_BANK_3\t(REL,OVR,DATA)\n\t.ds 8\n");
+ fprintf (asmFile, "\t.area REG_BANK_3\t(REL,OVR,DATA)\n\t.ds 8\n");
+ }
+ if(BitBankUsed)
+ {
+ fprintf (asmFile, "%s", iComments2);
+ fprintf (asmFile, "; overlayable bit register bank\n");
+ fprintf (asmFile, "%s", iComments2);
+ fprintf (asmFile, "\t.area BIT_BANK\t(REL,OVR,DATA)\n");
+ fprintf (asmFile, "bits:\n\t.ds 1\n");
+ fprintf (asmFile, "\tb0 = bits[0]\n");
+ fprintf (asmFile, "\tb1 = bits[1]\n");
+ fprintf (asmFile, "\tb2 = bits[2]\n");
+ fprintf (asmFile, "\tb3 = bits[3]\n");
+ fprintf (asmFile, "\tb4 = bits[4]\n");
+ fprintf (asmFile, "\tb5 = bits[5]\n");
+ fprintf (asmFile, "\tb6 = bits[6]\n");
+ fprintf (asmFile, "\tb7 = bits[7]\n");
}
}
copyFile (asmFile, idata->oFile);
}
+ /* create the absolute idata/data segment */
+ if ( (i_abs) && (mcs51_like) ) {
+ fprintf (asmFile, "%s", iComments2);
+ fprintf (asmFile, "; absolute internal ram data\n");
+ fprintf (asmFile, "%s", iComments2);
+ copyFile (asmFile, d_abs->oFile);
+ copyFile (asmFile, i_abs->oFile);
+ }
+
/* copy the bit segment */
if (mcs51_like) {
fprintf (asmFile, "%s", iComments2);
copyFile (asmFile, bit->oFile);
}
- /* if external stack then reserve space of it */
+ /* copy paged external ram data */
+ if (mcs51_like)
+ {
+ fprintf (asmFile, "%s", iComments2);
+ fprintf (asmFile, "; paged external ram data\n");
+ fprintf (asmFile, "%s", iComments2);
+ copyFile (asmFile, pdata->oFile);
+ }
+
+ /* if external stack then reserve space for it */
if (mainf && IFFUNC_HASBODY(mainf->type) && options.useXstack)
{
fprintf (asmFile, "%s", iComments2);
fprintf (asmFile, "; external stack \n");
fprintf (asmFile, "%s", iComments2);
- fprintf (asmFile, "\t.area XSEG (XDATA)\n"); /* MOF */
- fprintf (asmFile, "\t.ds 256\n");
+ fprintf (asmFile, "\t.area XSTK (PAG,XDATA)\n"
+ "__start__xstack:\n\t.ds\t1\n\n");
}
-
- /* copy xtern ram data */
+ /* copy external ram data */
if (mcs51_like) {
fprintf (asmFile, "%s", iComments2);
fprintf (asmFile, "; external ram data\n");
copyFile (asmFile, xdata->oFile);
}
- /* copy xternal initialized ram data */
+ /* copy external initialized ram data */
fprintf (asmFile, "%s", iComments2);
fprintf (asmFile, "; external initialized ram data\n");
fprintf (asmFile, "%s", iComments2);
* the post_static_name area will immediately follow the static_name
* area.
*/
+ tfprintf (asmFile, "\t!area\n", port->mem.home_name);
tfprintf (asmFile, "\t!area\n", port->mem.static_name); /* MOF */
tfprintf (asmFile, "\t!area\n", port->mem.post_static_name);
tfprintf (asmFile, "\t!area\n", port->mem.static_name);
tfprintf (asmFile, "\t!areahome\n", HOME_NAME);
copyFile (asmFile, home->oFile);
- /* copy over code */
- fprintf (asmFile, "%s", iComments2);
- fprintf (asmFile, "; code\n");
- fprintf (asmFile, "%s", iComments2);
- tfprintf (asmFile, "\t!areacode\n", CODE_NAME);
if (mainf && IFFUNC_HASBODY(mainf->type))
{
-
- /* entry point @ start of CSEG */
+ /* entry point @ start of HOME */
fprintf (asmFile, "__sdcc_program_startup:\n");
/* put in jump or call to main */
fprintf (asmFile, "\tsjmp .\n");
}
}
+ /* copy over code */
+ fprintf (asmFile, "%s", iComments2);
+ fprintf (asmFile, "; code\n");
+ fprintf (asmFile, "%s", iComments2);
+ tfprintf (asmFile, "\t!areacode\n", options.code_seg);
copyFile (asmFile, code->oFile);
if (port->genAssemblerEnd) {
/** Creates a temporary file with unique file name
Scans, in order:
- - TMP, TEMP, TMPDIR env. varibles
- - if Un*x system: /usr/tmp and /tmp
- - root directory using mkstemp() if avaliable
+ - TMP, TEMP, TMPDIR env. variables
+ - if Un*x system: /tmp and /var/tmp
+ - root directory using mkstemp() if available
- default location using tempnam()
*/
static int
}
#else
{
- /* try with /usr/tmp and /tmp on Un*x systems */
+ /* try with /tmp and /var/tmp on Un*x systems */
struct stat statbuf;
if (tmpdir == NULL) {
- if (stat("/usr/tmp", &statbuf) != -1)
- tmpdir = "/usr/tmp";
- else if (stat("/tmp", &statbuf) != -1)
+ if (stat("/tmp", &statbuf) != -1)
tmpdir = "/tmp";
+ else if (stat("/var/tmp", &statbuf) != -1)
+ tmpdir = "/var/tmp";
}
}
#endif