void printIval (symbol *, sym_link *, initList *, FILE *);
set *publics = NULL; /* public variables */
-set *externs = NULL; /* Varibles that are declared as extern */
+set *externs = NULL; /* Variables that are declared as extern */
-/* TODO: this should be configurable (DS803C90 uses more than 6) */
-unsigned maxInterrupts = 6;
+unsigned maxInterrupts = 0;
int allocInfo = 1;
symbol *mainf;
set *pipeSet = NULL; /* set of pipes */
sym->name);
}
ival = newNode ('=', newAst_VALUE (symbolVal (sym)),
- decorateType (resolveSymbols (list2expr (sym->ival)), RESULT_CHECK));
+ decorateType (resolveSymbols (list2expr (sym->ival)), RESULT_TYPE_NONE));
}
codeOutFile = statsg->oFile;
printChar (FILE * ofile, char *s, int plen)
{
int i;
- int len = strlen (s);
+ int len = plen;
int pplen = 0;
char buf[100];
char *p = buf;
FILE * oFile)
{
initList *iloop;
- int size = 0;
+ unsigned int size = 0;
if (ilist) {
/* take care of the special case */
}
for (iloop=ilist->init.deep; iloop; iloop=iloop->next) {
- printIval (sym, type->next, iloop, oFile);
-
if ((++size > DCL_ELEM(type)) && DCL_ELEM(type)) {
werrorfl (sym->fileDef, sym->lineDef, W_EXCESS_INITIALIZERS, "array", sym->name);
break;
}
+ printIval (sym, type->next, iloop, oFile);
}
}
data, idata & bit & xdata */
emitRegularMap (data, TRUE, TRUE);
emitRegularMap (idata, TRUE, TRUE);
- emitRegularMap (bit, TRUE, FALSE);
+ emitRegularMap (bit, TRUE, TRUE);
+ emitRegularMap (pdata, TRUE, TRUE);
emitRegularMap (xdata, TRUE, TRUE);
if (port->genXINIT) {
emitRegularMap (xidata, TRUE, TRUE);
emitRegularMap (home, TRUE, FALSE);
emitRegularMap (code, TRUE, FALSE);
+ if (options.const_seg) {
+ tfprintf (code->oFile, "\t!area\n", options.const_seg);
+ }
emitStaticSeg (statsg, code->oFile);
if (port->genXINIT) {
tfprintf (code->oFile, "\t!area\n", xinit->sname);
void
createInterruptVect (FILE * vFile)
{
- unsigned i = 0;
mainf = newSymbol ("main", 0);
mainf->block = 0;
return;
}
- tfprintf (vFile, "\t!areacode\n", CODE_NAME);
+ tfprintf (vFile, "\t!areacode\n", HOME_NAME);
fprintf (vFile, "__interrupt_vect:\n");
if (!port->genIVT || !(port->genIVT (vFile, interrupts, maxInterrupts)))
{
- /* "generic" interrupt table header (if port doesn't specify one).
- * Look suspiciously like 8051 code to me...
- */
-
- fprintf (vFile, "\tljmp\t__sdcc_gsinit_startup\n");
-
- /* now for the other interrupts */
- for (; i < maxInterrupts; i++)
- {
- if (interrupts[i])
- {
- fprintf (vFile, "\tljmp\t%s\n", interrupts[i]->rname);
- if ( i != maxInterrupts - 1 )
- fprintf (vFile, "\t.ds\t5\n");
- }
- else
- {
- fprintf (vFile, "\treti\n");
- if ( i != maxInterrupts - 1 )
- fprintf (vFile, "\t.ds\t7\n");
- }
- }
+ /* There's no such thing as a "generic" interrupt table header. */
+ wassert(0);
}
}
time_t t;
time (&t);
fprintf (afile, "%s", iComments1);
- fprintf (afile, "; Version " SDCC_VERSION_STR " (%s)\n", __DATE__);
+ fprintf (afile, "; Version " SDCC_VERSION_STR " #%s (%s)\n", getBuildNumber(), __DATE__);
fprintf (afile, "; This file generated %s", asctime (localtime (&t)));
fprintf (afile, "%s", iComments2);
}
static char *
spacesToUnderscores (char *dest, const char *src, size_t len)
{
- int i;
+ unsigned int i;
char *p;
assert(dest != NULL);
--len;
for (p = dest, i = 0; *src != '\0' && i < len; ++src, ++i) {
- *p++ = isspace(*src) ? '_' : *src;
+ *p++ = isspace((unsigned char)*src) ? '_' : *src;
}
*p = '\0';
cdbStructBlock (0);
vFile = tempfile ();
- /* PENDING: this isnt the best place but it will do */
+ /* PENDING: this isn't the best place but it will do */
if (port->general.glue_up_main)
{
/* create the interrupt vector table */
{
/* copy the sbit segment */
fprintf (asmFile, "%s", iComments2);
- fprintf (asmFile, "; special function bits \n");
+ fprintf (asmFile, "; special function bits\n");
fprintf (asmFile, "%s", iComments2);
copyFile (asmFile, sfrbit->oFile);
if(RegBankUsed[0]||RegBankUsed[1]||RegBankUsed[2]||RegBankUsed[3])
{
fprintf (asmFile, "%s", iComments2);
- fprintf (asmFile, "; overlayable register banks \n");
+ fprintf (asmFile, "; overlayable register banks\n");
fprintf (asmFile, "%s", iComments2);
if(RegBankUsed[0])
- fprintf (asmFile, "\t.area REG_BANK_0\t(REL,OVR,DATA)\n\t.ds 8\n");
+ fprintf (asmFile, "\t.area REG_BANK_0\t(REL,OVR,DATA)\n\t.ds 8\n");
if(RegBankUsed[1]||options.parms_in_bank1)
- fprintf (asmFile, "\t.area REG_BANK_1\t(REL,OVR,DATA)\n\t.ds 8\n");
+ fprintf (asmFile, "\t.area REG_BANK_1\t(REL,OVR,DATA)\n\t.ds 8\n");
if(RegBankUsed[2])
- fprintf (asmFile, "\t.area REG_BANK_2\t(REL,OVR,DATA)\n\t.ds 8\n");
+ fprintf (asmFile, "\t.area REG_BANK_2\t(REL,OVR,DATA)\n\t.ds 8\n");
if(RegBankUsed[3])
- fprintf (asmFile, "\t.area REG_BANK_3\t(REL,OVR,DATA)\n\t.ds 8\n");
+ fprintf (asmFile, "\t.area REG_BANK_3\t(REL,OVR,DATA)\n\t.ds 8\n");
+ }
+ if(BitBankUsed)
+ {
+ fprintf (asmFile, "%s", iComments2);
+ fprintf (asmFile, "; overlayable bit register bank\n");
+ fprintf (asmFile, "%s", iComments2);
+ fprintf (asmFile, "\t.area BIT_BANK\t(REL,OVR,DATA)\n");
+ fprintf (asmFile, "bits:\n\t.ds 1\n");
+ fprintf (asmFile, "\tb0 = bits[0]\n");
+ fprintf (asmFile, "\tb1 = bits[1]\n");
+ fprintf (asmFile, "\tb2 = bits[2]\n");
+ fprintf (asmFile, "\tb3 = bits[3]\n");
+ fprintf (asmFile, "\tb4 = bits[4]\n");
+ fprintf (asmFile, "\tb5 = bits[5]\n");
+ fprintf (asmFile, "\tb6 = bits[6]\n");
+ fprintf (asmFile, "\tb7 = bits[7]\n");
}
}
copyFile (asmFile, bit->oFile);
}
- /* if external stack then reserve space of it */
+ /* copy paged external ram data */
+ if (mcs51_like)
+ {
+ fprintf (asmFile, "%s", iComments2);
+ fprintf (asmFile, "; paged external ram data\n");
+ fprintf (asmFile, "%s", iComments2);
+ copyFile (asmFile, pdata->oFile);
+ }
+
+ /* if external stack then reserve space for it */
if (mainf && IFFUNC_HASBODY(mainf->type) && options.useXstack)
{
fprintf (asmFile, "%s", iComments2);
fprintf (asmFile, "; external stack \n");
fprintf (asmFile, "%s", iComments2);
- fprintf (asmFile, "\t.area XSEG (XDATA)\n"); /* MOF */
- fprintf (asmFile, "\t.ds 256\n");
+ fprintf (asmFile, "\t.area XSTK (PAG,XDATA)\n"
+ "__start__xstack:\n\t.ds\t1\n\n");
}
-
- /* copy xtern ram data */
+ /* copy external ram data */
if (mcs51_like) {
fprintf (asmFile, "%s", iComments2);
fprintf (asmFile, "; external ram data\n");
copyFile (asmFile, xdata->oFile);
}
- /* copy xternal initialized ram data */
+ /* copy external initialized ram data */
fprintf (asmFile, "%s", iComments2);
fprintf (asmFile, "; external initialized ram data\n");
fprintf (asmFile, "%s", iComments2);
* the post_static_name area will immediately follow the static_name
* area.
*/
+ tfprintf (asmFile, "\t!area\n", port->mem.home_name);
tfprintf (asmFile, "\t!area\n", port->mem.static_name); /* MOF */
tfprintf (asmFile, "\t!area\n", port->mem.post_static_name);
tfprintf (asmFile, "\t!area\n", port->mem.static_name);
tfprintf (asmFile, "\t!areahome\n", HOME_NAME);
copyFile (asmFile, home->oFile);
- /* copy over code */
- fprintf (asmFile, "%s", iComments2);
- fprintf (asmFile, "; code\n");
- fprintf (asmFile, "%s", iComments2);
- tfprintf (asmFile, "\t!areacode\n", CODE_NAME);
if (mainf && IFFUNC_HASBODY(mainf->type))
{
- /* entry point @ start of CSEG */
+ /* entry point @ start of HOME */
fprintf (asmFile, "__sdcc_program_startup:\n");
/* put in jump or call to main */
fprintf (asmFile, "\tsjmp .\n");
}
}
+ /* copy over code */
+ fprintf (asmFile, "%s", iComments2);
+ fprintf (asmFile, "; code\n");
+ fprintf (asmFile, "%s", iComments2);
+ tfprintf (asmFile, "\t!areacode\n", options.code_seg);
copyFile (asmFile, code->oFile);
if (port->genAssemblerEnd) {
/** Creates a temporary file with unique file name
Scans, in order:
- - TMP, TEMP, TMPDIR env. varibles
+ - TMP, TEMP, TMPDIR env. variables
- if Un*x system: /usr/tmp and /tmp
- - root directory using mkstemp() if avaliable
+ - root directory using mkstemp() if available
- default location using tempnam()
*/
static int
projects / fw / sdcc / blobdiff