/*
* Simulator of microcontrollers (regsxa.h)
*
- * Copyright (C) 1999,99 Drotos Daniel, Talker Bt.
+ * Copyright (C) 1999,2002 Drotos Daniel, Talker Bt.
*
- * Written by Karl Bongers karl@turbobit.com
- *
* To contact author send email to drdani@mazsola.iit.uni-miskolc.hu
+ * Other contributors include:
+ * Karl Bongers karl@turbobit.com,
+ * Johan Knol
*
*/
02111-1307, USA. */
/*@1@*/
+#define REGS_OFFSET 0
+//#define REGS_OFFSET 0x400
+
#ifndef REGSAVR_HEADER
#define REGSAVR_HEADER
*/
/* direct is a special code space for built-in ram and SFR, 1K size */
-#ifdef WORDS_BIGENDIAN
#define set_word_direct(_index, _value) { \
- mem_direct[(_index)] = (_value >> 8); \
+ mem_direct[(_index)+1] = (_value >> 8); \
mem_direct[(_index)] = (_value & 0xff); }
#define get_word_direct(_index) \
- ( (mem_direct[(_index)] << 8) | mem_direct[(_index)+1] )
-#else
-#define set_word_direct(_index, _value) { \
- wmem_direct[(_index) >> 1] = _value; }
-#define get_word_direct(_index) (wmem_direct[(_index) >> 1] )
-#endif
+ ( (mem_direct[(_index+1)] << 8) | mem_direct[(_index)] )
+#define set_byte_direct(_index, _value) (mem_direct[_index] = _value)
#define get_byte_direct(_index) (mem_direct[_index])
/* store to ram */
-#define store2(addr, val) { ram->set((t_addr) (addr), val & 0xff); \
- ram->set((t_addr) (addr+1), (val >> 8) & 0xff); }
+#define store2(addr, val) { ram->set((t_addr) (addr), (val) & 0xff); \
+ ram->set((t_addr) (addr+1), ((val) >> 8) & 0xff); }
#define store1(addr, val) ram->set((t_addr) (addr), val)
/* get from ram */
#define get1(addr) ram->get((t_addr) (addr))
#define get2(addr) (ram->get((t_addr) (addr)) | (ram->get((t_addr) (addr+1)) << 8) )
+/* get from code */
+#define getcode1(addr) rom->get((t_addr) (addr))
+#define getcode2(addr) (rom->get((t_addr) (addr)) | (rom->get((t_addr) (addr+1)) << 8) )
+
/* fetch from opcode code space */
#define fetch2() ((fetch() << 8) | fetch())
#define fetch1() fetch()
/* get a 1 or 2 byte register */
-#define reg2(_index) get_reg(1, (_index))
+#define reg2(_index) get_reg(1, (_index<<1)) /* function in inst.cc */
#define reg1(_index) (unsigned char)get_reg(0, (_index))
-#define set_byte_direct(_index, _value) { \
- mem_direct[_index] = _value; \
-}
-
#define set_reg1(_index, _value) { \
if ((_index) < 3) { /* banked */ \
- mem_direct[0x400+(_index)] = _value; \
+ mem_direct[REGS_OFFSET+(_index)] = _value; \
} else { /* non-banked */ \
- mem_direct[0x400+(_index)] = _value; \
+ mem_direct[REGS_OFFSET+(_index)] = _value; \
} \
}
#define set_reg2(_index, _value) { \
if ((_index) < 3) { /* banked */ \
- set_word_direct((0x400+_index), _value); \
+ set_word_direct((REGS_OFFSET+(_index<<1)), _value); \
} else { /* non-banked */ \
- set_word_direct((0x400+_index), _value); \
+ set_word_direct((REGS_OFFSET+(_index<<1)), _value); \
} \
}
{ set_reg1((_index), _value) } \
}
- /* R7 mirrors 1 of 2 real SP's */
+/* R7 mirrors 1 of 2 real SP's */
#define set_sp(_value) { \
- { set_word_direct(0x400+(7*2), _value); } \
+ { set_word_direct(REGS_OFFSET+(7*2), _value); } \
}
-#define get_sp() ((TYPE_UWORD)(get_word_direct(0x400+(7*2))))
+#define get_sp() ((TYPE_UWORD)(get_word_direct(REGS_OFFSET+(7*2))))
+
+/* the program status word */
+#define PSW 0x400
+#define get_psw() ((TYPE_UWORD)(get_word_direct(PSW)))
+#define set_psw(_flags) set_word_direct(PSW, _flags)
+
+/* the system configuration register */
+#define SCR 0x440
+#define get_scr() get_byte_direct(SCR)
+#define set_scr(scr) set_byte_direct(SCR, scr)
+
+// PSW bits...
+#define BIT_C 0x80
+#define BIT_AC 0x40
+#define BIT_V 0x04
+#define BIT_N 0x02
+#define BIT_Z 0x01
+#define BIT_ALL (BIT_C | BIT_AC | BIT_V | BIT_N | BIT_Z)
-// fixme: I don't know where the psw is kept, just want to compile...
-#define get_psw() ((TYPE_UWORD)(get_word_direct(0x400+(0x80*2))))
-#define set_psw(_flags) set_word_direct(0x400+(0x80*2), _flags)
#if 0
--------------------------------------------------------------------
-Notes:
- Register layout:
+Developer Notes.
+
+This user guide has got the detailed information on the XA chip.
+
+http://www.semiconductors.philips.com/acrobat/various/XA_USER_GUIDE_1.pdf
+
f: {unused slot(word accessable only) for R8-R15}
e: R7h,R7l Stack pointer, ptr to USP(PSW.SM=0), or SSP(PSW.SM=1)
Stack ptr is pre-decremented, followed by load(word operation),
default SPs are set to 100H. So first PUSH would go to FEH-FFH.
-
+--------------------------------------------------------------------
#endif
-// PSW bits...
-#define BIT_C 0x80
-#define BIT_AC 0x40
-#define BIT_V 0x04
-#define BIT_N 0x02
-#define BIT_Z 0x01
-#define BIT_ALL (BIT_C | BIT_AC | BIT_V | BIT_N | BIT_Z)
-
#endif
/* End of xa.src/regsxa.h */