xa 51, work in progress

[fw/sdcc] / sim / ucsim / xa.src / regsxa.h

diff --git a/sim/ucsim/xa.src/regsxa.h b/sim/ucsim/xa.src/regsxa.h
index 160e1cb18609811a8dcb4b29fcc5f8d2b74305fe..1334fcb429b74162be344222412e749cba865077 100644 (file)
--- a/sim/ucsim/xa.src/regsxa.h
+++ b/sim/ucsim/xa.src/regsxa.h
@@ -28,6 +28,9 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
 02111-1307, USA. */
 /*@1@*/
 
+#define REGS_OFFSET 0
+//#define REGS_OFFSET 0x400
+
 #ifndef REGSAVR_HEADER
 #define REGSAVR_HEADER
 
@@ -43,24 +46,19 @@ struct t_regs
 */
 
 /* direct is a special code space for built-in ram and SFR, 1K size */
-#ifdef WORDS_BIGENDIAN
 #define set_word_direct(_index, _value) { \
-      mem_direct[(_index)] = (_value >> 8); \
+      mem_direct[(_index)+1] = (_value >> 8); \
       mem_direct[(_index)] = (_value & 0xff); }
 
 #define get_word_direct(_index) \
-      ( (mem_direct[(_index)] << 8) | mem_direct[(_index)+1] )
-#else
-#define set_word_direct(_index, _value) { \
-      wmem_direct[(_index) >> 1] = _value; }
-#define get_word_direct(_index) (wmem_direct[(_index) >> 1] )
-#endif
+      ( (mem_direct[(_index+1)] << 8) | mem_direct[(_index)] )
 
+#define set_byte_direct(_index, _value) (mem_direct[_index] = _value)
 #define get_byte_direct(_index) (mem_direct[_index])
 
 /* store to ram */
-#define store2(addr, val) { ram->set((t_addr) (addr), val & 0xff); \
-                            ram->set((t_addr) (addr+1), (val >> 8) & 0xff); }
+#define store2(addr, val) { ram->set((t_addr) (addr), (val) & 0xff); \
+                            ram->set((t_addr) (addr+1), ((val) >> 8) & 0xff); }
 #define store1(addr, val) ram->set((t_addr) (addr), val)
 
 /* get from ram */
@@ -76,26 +74,22 @@ struct t_regs
 #define fetch1() fetch()
 
 /* get a 1 or 2 byte register */
-#define reg2(_index) get_reg(1, (_index))
+#define reg2(_index) get_reg(1, (_index<<1)) /* function in inst.cc */
 #define reg1(_index) (unsigned char)get_reg(0, (_index))
 
-#define set_byte_direct(_index, _value) { \
-   mem_direct[_index] = _value; \
-}
-
 #define set_reg1(_index, _value) { \
   if ((_index) < 3) { /* banked */ \
-      mem_direct[0x400+(_index)] = _value; \
+      mem_direct[REGS_OFFSET+(_index)] = _value; \
   } else { /* non-banked */ \
-      mem_direct[0x400+(_index)] = _value; \
+      mem_direct[REGS_OFFSET+(_index)] = _value; \
   } \
 }
 
 #define set_reg2(_index, _value) { \
   if ((_index) < 3) { /* banked */ \
-     set_word_direct((0x400+_index), _value); \
+     set_word_direct((REGS_OFFSET+(_index<<1)), _value); \
   } else { /* non-banked */ \
-     set_word_direct((0x400+_index), _value); \
+     set_word_direct((REGS_OFFSET+(_index<<1)), _value); \
   } \
 }
 
@@ -106,25 +100,40 @@ struct t_regs
     { set_reg1((_index), _value) } \
 }
 
-// fixme: implement
-#define get_bit(x) (x)
-#define set_bit(x,y)
-
 /* R7 mirrors 1 of 2 real SP's */
 #define set_sp(_value) { \
-  { set_word_direct(0x400+(7*2), _value); } \
+  { set_word_direct(REGS_OFFSET+(7*2), _value); } \
 }
 
-#define get_sp() ((TYPE_UWORD)(get_word_direct(0x400+(7*2))))
+#define get_sp() ((TYPE_UWORD)(get_word_direct(REGS_OFFSET+(7*2))))
+
+/* the program status word */
+#define PSW 0x400
+#define get_psw() ((TYPE_UWORD)(get_word_direct(PSW)))
+#define set_psw(_flags) set_word_direct(PSW, _flags)
+
+/* the system configuration register */
+#define SCR 0x440
+#define get_scr() get_byte_direct(SCR)
+#define set_scr(scr) set_byte_direct(SCR, scr)
+
+// PSW bits...
+#define BIT_C  0x80
+#define BIT_AC 0x40
+#define BIT_V  0x04
+#define BIT_N  0x02
+#define BIT_Z  0x01
+#define BIT_ALL (BIT_C | BIT_AC | BIT_V | BIT_N | BIT_Z)
 
-// fixme: I don't know where the psw is kept, just want to compile...
-#define get_psw() ((TYPE_UWORD)(get_word_direct(0x400+(0x80*2))))
-#define set_psw(_flags) set_word_direct(0x400+(0x80*2), _flags)
 
 #if 0
 --------------------------------------------------------------------
-Notes:
- Register layout:
+Developer Notes.
+
+This user guide has got the detailed information on the XA chip. 
+
+http://www.semiconductors.philips.com/acrobat/various/XA_USER_GUIDE_1.pdf
+
 
 f: {unused slot(word accessable only) for R8-R15}
 e: R7h,R7l  Stack pointer, ptr to USP(PSW.SM=0), or SSP(PSW.SM=1)
@@ -133,7 +142,7 @@ a: R5h,R5l
 8: R4h,R4l
 below are the banked registers which mirror(B0..B3) depending on
 PSW.(RS0,RS1)
-6: R3h,R3l                  \a
+6: R3h,R3l
 4: R2h,R2l
 2: R1h,R1l
 0: R0h,R0l
@@ -184,17 +193,9 @@ PSW Flags: Carry(C), Aux Carry(AC), Overflow(V), Negative(N), Zero(Z).
 
 Stack ptr is pre-decremented, followed by load(word operation),
 default SPs are set to 100H.  So first PUSH would go to FEH-FFH.
-
+--------------------------------------------------------------------
 #endif
 
 
-// PSW bits...
-#define BIT_C  0x80
-#define BIT_AC 0x40
-#define BIT_V  0x04
-#define BIT_N  0x02
-#define BIT_Z  0x01
-#define BIT_ALL (BIT_C | BIT_AC | BIT_V | BIT_N | BIT_Z)
-
 #endif
 /* End of xa.src/regsxa.h */