technology= Itech;
debug= asim->get_iarg('V', 0);
- stop_at_it= FALSE;
+ stop_at_it= DD_FALSE;
options->add(new cl_bool_opt(&debug, "verbose", "Verbose flag."));
options->add(new cl_bool_opt(&stop_at_it, "stopit",
"Stop if interrupt accepted."));
result= resGO;
- was_reti= FALSE;
+ was_reti= DD_FALSE;
s_tr_t1 = 0;
s_rec_t1 = 0;
s_rec_tick = 0;
s_in = 0;
s_out = 0;
- s_sending = FALSE;
- s_receiving= FALSE;
+ s_sending = DD_FALSE;
+ s_receiving= DD_FALSE;
s_rec_bit = 0;
s_tr_bit = 0;
}
if (addr == &((sfr->umem8)[SBUF]))
{
s_out= sfr->get(SBUF);
- s_sending= TRUE;
+ s_sending= DD_TRUE;
s_tr_bit = 0;
s_tr_tick= 0;
s_tr_t1 = 0;
}
if (addr == &((sfr->umem8)[IE]))
- was_reti= TRUE;
+ was_reti= DD_TRUE;
}
void
step--;
if (state == stGO)
{
- was_reti= FALSE;
+ was_reti= DD_FALSE;
pre_inst();
result= exec_inst();
post_inst();
int i;
uchar uc;
- p = FALSE;
+ p = DD_FALSE;
uc= sfr->get(ACC);
for (i= 0; i < 8; i++)
{
if (s_sending &&
(s_tr_bit >= bits))
{
- s_sending= FALSE;
+ s_sending= DD_FALSE;
sfr->set_bit1(SCON, bmTI);
if (serial_out)
{
if (i > 0 &&
FD_ISSET(fileno(serial_in), &set))
{
- s_receiving= TRUE;
+ s_receiving= DD_TRUE;
s_rec_bit= 0;
s_rec_tick= s_rec_t1= 0;
}
sfr->set(SBUF, s_in);
received(c);
}
- s_receiving= FALSE;
+ s_receiving= DD_FALSE;
s_rec_bit-= bits;
}
return(resGO);
if (was_reti)
{
- was_reti= FALSE;
+ was_reti= DD_FALSE;
return(resGO);
}
if (!((ie= sfr->get(IE)) & bmEA))