02111-1307, USA. */
/*@1@*/
-
// Bernhard's ToDo list:
-// - add sfr-descriptions to s51.src/glob.cc
// - implement math accelerator
// - consider ACON bits
-// - proc_write_sp (*aof_SP); insert this at the appropriate places
// - buy some memory to run s51 with 2*4 Meg ROM/XRAM
+// strcpy (mem(MEM_ROM) ->addr_format, "0x%06x");
+// strcpy (mem(MEM_XRAM)->addr_format, "0x%06x");
+
#include "ddconfig.h"
#include <stdio.h>
#include "glob.h"
#include "uc390cl.h"
#include "regs51.h"
+#include "uc390hwcl.h"
+
+
+#include "uc52cl.h"
+#include "regs51.h"
+#include "timer2cl.h"
/*
* Names of instructions
{
if (Itype == CPU_DS390F)
{
- printf ("FLAT24 MODE SET, warning: experimental code\n");
+ printf ("24-bit flat mode, warning: lots of sfr-functions not implemented!\n> ");
flat24_flag = 1;
}
+ // todo: add interrupt sources
+}
+
+void
+t_uc390::mk_hw_elements (void)
+{
+ class cl_hw *h;
+
+ t_uc52::mk_hw_elements();
+ hws->add (h = new cl_uc390_hw (this));
+ h->init();
}
- // strcpy (mem(MEM_ROM) ->addr_format, "0x%06x");
- // strcpy (mem(MEM_XRAM)->addr_format, "0x%06x");
+/*
+ * Setting up SFR area to reset value
+ */
+
+void
+t_uc390::clear_sfr(void)
+{
+ int i;
+
+ for (i = 0; i < SFR_SIZE; i++)
+ sfr->set(i, 0);
+ /* SFR value */
+ sfr->set(0x80, 0xff); /* P4 */
+ sfr->set(0x81, 0x07); /* SP */
+ sfr->set(0x86, 0x04); /* DPS */
+ sfr->set(0x90, 0xff); /* P1 */
+ sfr->set(0x92, 0xbf); /* P4CNT */
+ sfr->set(0x9b, 0xfc); /* ESP */
+ if (flat24_flag)
+ sfr->set(ACON, 0xfa); /* ACON; AM1 set: 24-bit flat */
+ else
+ sfr->set(ACON, 0xf8); /* ACON */
+ sfr->set(0xa0, 0xff); /* P2 */
+ sfr->set(0xa1, 0xff); /* P5 */
+ sfr->set(0xa3, 0x09); /* COC */
+ sfr->set(0xb0, 0xff); /* P3 */
+ sfr->set(0xb8, 0x80); /* IP */
+ sfr->set(0xc5, 0x10); /* STATUS */
+ sfr->set(0xc6, 0x10); /* MCON */
+ sfr->set(0xc7, 0xff); /* TA */
+ sfr->set(0xc9, 0xe4); /* T2MOD */
+ sfr->set(0xd2, 0x2f); /* MCNT1 */
+ sfr->set(0xe3, 0x09); /* C1C */
+
+ sfr->/*set*/write(P0, 0xff);
+ sfr->/*set*/write(P1, 0xff);
+ sfr->/*set*/write(P2, 0xff);
+ sfr->/*set*/write(P3, 0xff);
+ sfr->/*set*/write(SP, 7);
+ prev_p1 = sfr->/*get*/read(P1);
+ prev_p3 = sfr->/*get*/read(P3);
+}
t_addr
t_uc390::get_mem_size (enum mem_class type)
{
- //if ((sfr->get (ACON) & 0x3) == 2)
- if (!flat24_flag)
- return t_uc52::get_mem_size (type);
switch (type)
{
case MEM_ROM:
- return 128*1024; // 4*1024*1024; 4 Meg possible
+ return 128*1024; // 128 kByte; 4 MByte possible
case MEM_XRAM:
- return 128*1024; // 4*1024*1024; 4 Meg possible
+ /* tinibios copies 128 bytes of the Interrupt Vector Table
+ to 0x100000. This is exactly the minimum of memory to run ucSim
+ without any error. */
+ return 1*1024*1024 + 128; // 1 MByte + 128 bytes; 4 Mbytes possible
case MEM_IRAM:
return 256;
case MEM_SFR:
return 0;
}
-ulong
-t_uc390::read_mem(enum mem_class type, t_mem addr)
+t_mem
+t_uc390::read_mem(enum mem_class type, t_addr addr)
{
- //if ((sfr->get (ACON) & 0x3) == 2)
if (type == MEM_XRAM &&
- flat24_flag &&
- addr >= 0x400000)
+ addr >= 0x400000 &&
+ (sfr->get (ACON) & 0x02)) /* AM1 set: 24-bit flat? */
{
addr -= 0x400000;
type = MEM_IXRAM;
}
- return t_uc51::read_mem (type, addr);
+ return t_uc51::read_mem (type, addr); /* 24 bit */
}
-ulong
+t_mem
t_uc390::get_mem (enum mem_class type, t_addr addr)
{
if (type == MEM_XRAM &&
- flat24_flag &&
- addr >= 0x400000)
+ addr >= 0x400000 &&
+ (sfr->get (ACON) & 0x02)) /* AM1 set: 24-bit flat? */
{
addr -= 0x400000;
type = MEM_IXRAM;
t_uc390::write_mem (enum mem_class type, t_addr addr, t_mem val)
{
if (type == MEM_XRAM &&
- flat24_flag &&
- addr >= 0x400000)
+ addr >= 0x400000 &&
+ (sfr->get (ACON) & 0x02)) /* AM1 set: 24-bit flat? */
{
addr -= 0x400000;
type = MEM_IXRAM;
t_uc390::set_mem (enum mem_class type, t_addr addr, t_mem val)
{
if (type == MEM_XRAM &&
- flat24_flag &&
- addr >= 0x400000)
+ addr >= 0x400000 &&
+ (sfr->get (ACON) & 0x02)) /* AM1 set: 24-bit flat? */
{
addr -= 0x400000;
type = MEM_IXRAM;
*____________________________________________________________________________
*/
-int
-t_uc390::push_byte (uchar uc)
+void
+t_uc390::push_byte (t_mem uc)
{
- int res;
+ t_addr sp;
- sfr->add (SP, 1);
+ sp = sfr->wadd (SP, 1);
if (sfr->get (ACON) & 0x04) /* SA: 10 bit stack */
{
- uint sp10;
-
- if (get_mem (MEM_SFR, SP) == 0x00) /* overflow SP */
- sfr->add (ESP, 1);
- sp10 = (get_mem (MEM_SFR, ESP) & 0x3) * 256 +
- get_mem (MEM_SFR, SP);
- write_mem (MEM_IXRAM, sp10, uc);
- res = 0;
+ if (sp == 0) /* overflow SP */
+ sfr->wadd (ESP, 1);
+ sp += (sfr->read (ESP) & 0x3) * 256;
+ write_mem (MEM_IXRAM, sp, uc); // fixme
}
else
{
- uchar *sp;
+ class cl_cell *stck;
- sp = get_indirect (sfr->get (SP), &res);
- if (res != resGO)
- res = resSTACK_OV;
- *sp = uc;
+ stck = iram->get_cell (sp);
+ stck->write (uc);
}
- return res;
}
-uchar
-t_uc390::pop_byte (int *Pres)
+t_mem
+t_uc390::pop_byte (void)
{
- uchar uc;
+ t_mem temp;
+ t_addr sp;
if (sfr->get (ACON) & 0x04) /* SA: 10 bit stack */
{
- uint sp10;
-
- sp10 = (get_mem (MEM_SFR, ESP) & 0x3) * 256 +
- get_mem (MEM_SFR, SP);
- sfr->add (SP, -1);
- if (get_mem (MEM_SFR, SP) == 0xff) /* underflow SP */
- sfr->add (ESP, -1);
- uc = get_mem (MEM_IXRAM, sp10);
- *Pres = 0;
+ sp = sfr->read (SP);
+ sp += (sfr->read (ESP) & 0x3) * 256;
+ temp = read_mem (MEM_IXRAM, sp); // fixme
+ sp = sfr->wadd (SP, -1);
+ if (sp == 0xff) /* underflow SP */
+ sfr->wadd (ESP, -1);
+ return temp;
}
else
{
- uchar *sp;
+ class cl_cell *stck;
- sp = get_indirect (get_mem (MEM_SFR, SP), Pres);
- if (*Pres != resGO)
- *Pres = resSTACK_OV;
- sfr->add (SP, -1);
- uc = *sp;
+ stck = iram->get_cell (sfr->get (SP));
+ temp = stck->read();
+ sp = sfr->wadd (SP, -1);
+ return temp;
}
- return uc;
-}
-
-/*
- * 0x05 2 12 INC addr
- *____________________________________________________________________________
- *
- */
-int
-t_uc390::inst_inc_addr (uchar code)
-{
- uchar *addr;
-
- addr = get_direct (fetch (), &event_at.wi, &event_at.ws);
-
- /* mask off the 2Hex bit adjacent to the 1H bit which selects
- which DPTR we use. This is a feature of 80C390.
- You can do INC DPS and it only effects bit 1. */
- if (code == DPS)
- (*addr) ^= 1; /* just toggle */
- else
- (*addr)++;
-
- proc_write (addr);
- return resGO;
}
/*
uchar pl, ph, px, dps;
dps = sfr->get (DPS);
- if (dps & 1)
+ if (dps & 0x01)
{
pl = DPL1;
ph = DPH1;
px = DPX;
}
- dptr = sfr->get (ph) * 256 + sfr->get (pl);
- //if ((sfr->get (ACON) & 0x3) == 2)
- if (flat24_flag)
- dptr += sfr->get (px) *256*256;
+ dptr = sfr->read (ph) * 256 + sfr->read (pl);
+ if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */
+ dptr += sfr->read (px) *256*256;
if (dps & 0x80) /* decr set */
dptr--;
else
dptr++;
- //if ((sfr->get (ACON) & 0x3) == 2)
- if (flat24_flag)
- sfr->set (px, (dptr >> 16) & 0xff);
- sfr->set (event_at.ws = ph, (dptr >> 8) & 0xff);
- sfr->set (pl, dptr & 0xff);
+ if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */
+ sfr->write (px, (dptr >> 16) & 0xff);
+ sfr->write (ph, (dptr >> 8) & 0xff);
+ sfr->write (pl, dptr & 0xff);
if (dps & 0x20) /* auto-switch dptr */
- sfr->set (DPS, (dps ^ 1)); /* toggle dual-dptr switch */
+ sfr->write (DPS, dps ^ 1); /* toggle dual-dptr switch */
tick (1);
return resGO;
}
*/
int
-t_uc390::inst_jmp_$a_dptr (uchar code)
+t_uc390::inst_jmp_Sa_dptr (uchar code)
{
uchar pl, ph, px, dps;
dps = sfr->get (DPS);
- if (dps & 1)
+ if (dps & 0x01)
{
pl = DPL1;
ph = DPH1;
px = DPX;
}
- PC = (sfr->get (ph) * 256 + sfr->get (pl) +
- read_mem (MEM_SFR, ACC)) &
- (EROM_SIZE - 1);
- //if ((sfr->get (ACON) & 0x3) == 2)
- if (flat24_flag)
- PC += sfr->get (px) * 256*256;
+ PC = (sfr->read (ph) * 256 + sfr->read (pl) + acc->read()) &
+ (EROM_SIZE - 1);
+ if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */
+ PC += sfr->read (px) * 256*256;
tick (1);
return resGO;
*/
int
-t_uc390::inst_mov_dptr_$data (uchar code)
+t_uc390::inst_mov_dptr_Sdata (uchar code)
{
uchar pl, ph, px, dps;
dps = sfr->get (DPS);
- if (dps & 1)
+ if (dps & 0x01)
{
pl = DPL1;
ph = DPH1;
px = DPX;
}
- //if ((sfr->get (ACON) & 0x3) == 2)
- if (flat24_flag)
- sfr->set (px, fetch ());
- sfr->set (event_at.ws = ph, fetch ());
- sfr->set (pl, fetch ());
+ if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */
+ sfr->write (px, fetch ());
+ sfr->write (ph, fetch ());
+ sfr->write (pl, fetch ());
if (dps & 0x20) /* auto-switch dptr */
- sfr->set (DPS, (dps ^ 1)); /* toggle dual-dptr switch */
+ sfr->write (DPS, dps ^ 1); /* toggle dual-dptr switch */
tick (1);
return resGO;
*/
int
-t_uc390::inst_movc_a_$a_dptr (uchar code)
+t_uc390::inst_movc_a_Sa_dptr (uchar code)
{
uchar pl, ph, px, dps;
dps = sfr->get (DPS);
- if (dps & 1)
+ if (dps & 0x01)
{
pl = DPL1;
ph = DPH1;
px = DPX;
}
- //if ((sfr->get (ACON) & 0x3) == 2)
- if (flat24_flag)
- sfr->set (ACC, get_mem (MEM_ROM,
- event_at.rc =
- (sfr->get (px) * 256*256 + sfr->get (ph) * 256 + sfr->get (pl) +
- sfr->get (ACC)) & (EROM_SIZE-1)));
+ if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */
+ acc->write (read_mem (MEM_ROM,
+ (sfr->read (px) * 256*256 + sfr->read (ph) * 256 + sfr->read (pl) +
+ acc->read())));
else
- sfr->set (ACC, get_mem (MEM_ROM, event_at.rc =
- (sfr->get (ph) * 256 + sfr->get (pl) +
- sfr->get (ACC)) & (EROM_SIZE-1)));
+ acc->write (read_mem (MEM_ROM,
+ (sfr->read (ph) * 256 + sfr->read (pl) +
+ acc->read())));
if (dps & 0x20) /* auto-switch dptr */
- sfr->set (DPS, (dps ^ 1)); /* toggle dual-dptr switch */
+ sfr->write (DPS, dps ^ 1); /* toggle dual-dptr switch */
tick (1);
return resGO;
int
t_uc390::inst_push (uchar code)
{
- uchar *addr;
- int res;
+ class cl_cell *cell;
- addr = get_direct (fetch (), &event_at.wi, &event_at.ws);
- res = push_byte (read (addr));
+ cell = get_direct(fetch());
+ push_byte (cell->read());
tick (1);
- return res;
+ return resGO;
}
int
t_uc390::inst_pop (uchar code)
{
- uchar *addr;
- int res;
+ class cl_cell *cell;
- addr = get_direct (fetch (), &event_at.wi, &event_at.ws);
- *addr = pop_byte (&res);
- proc_write (addr);
+ cell = get_direct (fetch());
+ cell->write (pop_byte());
tick (1);
- return res;
+ return resGO;
}
*/
int
-t_uc390::inst_movx_a_$dptr (uchar code)
+t_uc390::inst_movx_a_Sdptr (uchar code)
{
uchar pl, ph, px, dps;
dps = sfr->get (DPS);
- if (dps & 1)
+ if (dps & 0x01)
{
pl = DPL1;
ph = DPH1;
px = DPX;
}
- //if ((sfr->get (ACON) & 0x3) == 2)
- if (flat24_flag)
- sfr->set (event_at.ws = ACC,
- get_mem (MEM_XRAM,
- event_at.rx = sfr->get (px) * 256*256 + sfr->get (ph) * 256 + sfr->get (pl)));
+ if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */
+ acc->write (read_mem (MEM_XRAM,
+ sfr->read (px) * 256*256 + sfr->read (ph) * 256 + sfr->read (pl)));
else
- sfr->set (event_at.ws = ACC,
- get_mem (MEM_XRAM,
- event_at.rx = sfr->get (ph) * 256 + sfr->get (pl)));
+ acc->write (read_mem (MEM_XRAM,
+ sfr->read (ph) * 256 + sfr->read (pl)));
if (dps & 0x20) /* auto-switch dptr */
- sfr->set (DPS, (dps ^ 1)); /* toggle dual-dptr switch */
+ sfr->write (DPS, dps ^ 1); /* toggle dual-dptr switch */
tick (1);
return resGO;
*/
int
-t_uc390::inst_movx_$dptr_a (uchar code)
+t_uc390::inst_movx_Sdptr_a (uchar code)
{
uchar pl, ph, px, dps;
dps = sfr->get (DPS);
- if (dps & 1)
+ if (dps & 0x01)
{
pl = DPL1;
ph = DPH1;
px = DPX;
}
- //if ((sfr->get (ACON) & 0x3) == 2)
- if (flat24_flag)
- set_mem (MEM_XRAM,
- event_at.wx = sfr->get (px) * 256*256 + sfr->get (ph) * 256 + sfr->get (pl),
- sfr->get (event_at.rs = ACC));
+ if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */
+ write_mem (MEM_XRAM,
+ sfr->read (px) * 256*256 + sfr->read (ph) * 256 + sfr->read (pl),
+ acc->read());
else
- set_mem (MEM_XRAM,
- event_at.wx = sfr->get (ph) * 256 + sfr->get (pl),
- sfr->get (event_at.rs = ACC));
+ write_mem (MEM_XRAM,
+ sfr->read (ph) * 256 + sfr->read (pl),
+ acc->read());
if (dps & 0x20) /* auto-switch dptr */
- sfr->set (DPS, (dps ^ 1)); /* toggle dual-dptr switch */
+ sfr->write (DPS, dps ^ 1); /* toggle dual-dptr switch */
tick (1);
return resGO;
{
uchar x, h, l;
- //if ((sfr->get (ACON) & 0x3) == 2)
- if (flat24_flag)
+ if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */
{
x = (code >> 5) & 0x07;
h = fetch ();
{
uchar x, h, l;
- //if ((sfr->get (ACON) & 0x3) == 2)
- if (flat24_flag)
+ if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */
{
x = fetch ();
h = fetch ();
int
t_uc390::inst_acall_addr (uchar code)
{
- uchar x, h, l, *sp, *aof_SP;
- int res;
+ uchar x, h, l;
- //if ((sfr->get (ACON) & 0x3) == 2)
- if (flat24_flag)
+ if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */
{
x = (code >> 5) & 0x07;
h = fetch ();
l = fetch ();
- res = push_byte ( PC & 0xff); /* push low byte */
- res = push_byte ((PC >> 8) & 0xff); /* push high byte */
- res = push_byte ((PC >> 16) & 0xff); /* push x byte */
+ push_byte ( PC & 0xff); /* push low byte */
+ push_byte ((PC >> 8) & 0xff); /* push high byte */
+ push_byte ((PC >> 16) & 0xff); /* push x byte */
PC = (PC & 0xf800) | (x * 256*256 + h * 256 + l);
}
else
{
/* stock mcs51 mode */
- h = (code >> 5) & 0x07;
- l = fetch ();
- aof_SP = &((sfr->umem8)[SP]);
-
- //MEM(MEM_SFR)[SP]++;
- (*aof_SP)++;
- proc_write_sp (*aof_SP);
- sp = get_indirect (*aof_SP/*sfr->get (SP)*/, &res);
- if (res != resGO)
- res = resSTACK_OV;
- *sp = PC & 0xff; // push low byte
-
- //MEM(MEM_SFR)[SP]++;
- (*aof_SP)++;
- proc_write_sp (*aof_SP);
- sp = get_indirect (*aof_SP/*sfr->get (SP)*/, &res);
- if (res != resGO)
- res = resSTACK_OV;
- *sp = (PC >> 8) & 0xff; // push high byte
+ class cl_cell *stck;
+ t_mem sp;
- PC = (PC & 0xf800) | (h * 256 + l);
+ h = (code >> 5) & 0x07;
+ l = fetch();
+ sp = sfr->wadd (SP, 1);
+ stck = iram->get_cell (sp);
+ stck->write (PC & 0xff); // push low byte
+
+ sp = sfr->wadd (SP, 1);
+ stck = iram->get_cell (sp);
+ stck->write ((PC >> 8) & 0xff); // push high byte
+ PC = (PC & 0xf800) | (h*256 + l);
}
tick (1);
- return res;
+ return resGO;
}
t_uc390::inst_lcall (uchar code, uint addr)
{
uchar x = 0, h = 0, l = 0;
- int res;
if (!addr)
{ /* this is a normal lcall */
- //if ((sfr->get (ACON) & 0x3) == 2)
- if (flat24_flag)
+ if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */
x = fetch ();
h = fetch ();
l = fetch ();
}
/* else, this is interrupt processing */
- res = push_byte ( PC & 0xff); /* push low byte */
- res = push_byte ((PC >> 8) & 0xff); /* push high byte */
+ push_byte ( PC & 0xff); /* push low byte */
+ push_byte ((PC >> 8) & 0xff); /* push high byte */
- //if ((sfr->get (ACON) & 0x3) == 2)
- if (flat24_flag)
+ if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */
{
- res = push_byte ((PC >> 16) & 0xff); /* push x byte */
+ push_byte ((PC >> 16) & 0xff); /* push x byte */
if (addr)
PC = addr & 0xfffful; /* if interrupt: x-Byte is 0 */
else
else
PC = h * 256 + l;
}
- return res;
+ return resGO;
}
/*
t_uc390::inst_ret (uchar code)
{
uchar x = 0, h, l;
- int res;
- //if ((sfr->get (ACON) & 0x3) == 2)
- if (flat24_flag)
- x = pop_byte (&res);
- h = pop_byte (&res);
- l = pop_byte (&res);
+ if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */
+ x = pop_byte ();
+ h = pop_byte ();
+ l = pop_byte ();
tick (1);
- //if ((sfr->get (ACON) & 0x3) == 2)
- if (flat24_flag)
+ if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */
{
tick (1);
PC = x * 256*256 + h * 256 + l;
else
PC = h * 256 + l;
- return res;
+ return resGO;
}
/*
t_uc390::inst_reti (uchar code)
{
uchar x = 0, h, l;
- int res;
- //if ((sfr->get (ACON) & 0x3) == 2)
- if (flat24_flag)
- if (flat24_flag)
- x = pop_byte (&res);
- h = pop_byte (&res);
- l = pop_byte (&res);
+ if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */
+ x = pop_byte ();
+ h = pop_byte ();
+ l = pop_byte ();
tick (1);
- //if ((sfr->get (ACON) & 0x3) == 2)
- if (flat24_flag)
+ if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */
{
tick (1);
PC = x * 256*256 + h * 256 + l;
else
PC = h * 256 + l;
- was_reti = DD_TRUE;
+ interrupt->was_reti = DD_TRUE;
class it_level *il = (class it_level *) (it_levels->top ());
if (il &&
il->level >= 0)
delete il;
}
- return res;
+ return resGO;
}
+
/*
* Disassembling an instruction
*/
struct dis_entry *
t_uc390::dis_tbl (void)
{
- //if ((sfr->get (ACON) & 0x3) == 2)
- if (!flat24_flag)
+ if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */
+ return disass_390f;
+ else
return disass_51;
//t_uc51::dis_tbl ();
- return disass_390f;
}
char *
char *buf, *p, *b, *t;
t_mem code;
- //if ((sfr->get (ACON) & 0x3) == 2)
- if (!flat24_flag)
+ if (! (sfr->get (ACON) & 0x02)) /* AM1 set: 24-bit flat? */
return t_uc51::disass (addr, sep);
code = get_mem (MEM_ROM, addr);
p = work;
- b = dis_tbl ()[code].mnemonic;
+ b = dis_tbl()[code].mnemonic;
while (*b)
{
if (*b == '%')
// get_mem (MEM_ROM, addr + 1)));
sprintf (temp, "%06lx",
- (addr & 0xf80000) |
+ (addr & 0xf80000L) |
(((code >> 5) & 0x07) * (256 * 256) +
(get_mem (MEM_ROM, addr + 1) * 256) +
get_mem (MEM_ROM, addr + 2)));
break;
case 'l': // long address
sprintf (temp, "%06lx",
- get_mem (MEM_ROM, addr + 1) * (256*256) +
+ get_mem (MEM_ROM, addr + 1) * (256*256L) +
get_mem (MEM_ROM, addr + 2) * 256 +
get_mem (MEM_ROM, addr + 3));
// get_mem (MEM_ROM, addr + 1) * 256 + get_mem (MEM_ROM, addr + 2));
break;
case 'a': // addr8 (direct address) at 2nd byte
if (!get_name (get_mem (MEM_ROM, addr + 1), sfr_tbl (), temp))
- sprintf (temp, "%02lx", get_mem (MEM_ROM, addr + 1));
+ sprintf (temp, "%02"_M_"x", get_mem (MEM_ROM, addr + 1));
break;
case '8': // addr8 (direct address) at 3rd byte
if (!get_name (get_mem (MEM_ROM, addr + 2), sfr_tbl (), temp))
- sprintf (temp, "%02lx", get_mem (MEM_ROM, addr + 1));
- sprintf (temp, "%02lx", get_mem (MEM_ROM, addr + 2));
+ sprintf (temp, "%02"_M_"x", get_mem (MEM_ROM, addr + 2));
break;
case 'b': // bitaddr at 2nd byte
- if (get_name (get_mem (MEM_ROM, addr + 1), bit_tbl (), temp))
- break;
- if (get_name (get_bitidx (get_mem (MEM_ROM, addr + 1)),
- sfr_tbl (), temp))
- {
- strcat (temp, ".");
- sprintf (c, "%1ld", get_mem (MEM_ROM, addr + 1) & 0x07);
- strcat (temp, c);
- break;
- }
- sprintf (temp, "%02x.%ld",
- get_bitidx (get_mem (MEM_ROM, addr + 1)),
- get_mem (MEM_ROM, addr + 1) & 0x07);
- break;
+ {
+ t_addr ba = get_mem (MEM_ROM, addr+1);
+ if (get_name (ba, bit_tbl(), temp))
+ break;
+ if (get_name ((ba<128) ? ((ba/8)+32) : (ba&0xf8), sfr_tbl(), temp))
+ {
+ strcat (temp, ".");
+ sprintf (c, "%1"_M_"d", ba & 0x07);
+ strcat (temp, c);
+ break;
+ }
+ sprintf (temp, "%02x.%"_M_"d", (ba<128) ? ((ba/8)+32) : (ba&0xf8),
+ ba & 0x07);
+ break;
+ }
case 'r': // rel8 address at 2nd byte
- sprintf (temp, "%04lx",
- addr + 2 + (signed char) (get_mem (MEM_ROM, addr + 1)));
+ sprintf (temp, "%04"_A_"x",
+ t_addr (addr + 2 + (signed char) (get_mem (MEM_ROM, addr + 1))));
break;
case 'R': // rel8 address at 3rd byte
- sprintf (temp, "%04lx",
- addr + 3 + (signed char) (get_mem (MEM_ROM, addr + 2)));
+ sprintf (temp, "%04"_A_"x",
+ t_addr (addr + 3 + (signed char) (get_mem (MEM_ROM, addr + 2))));
break;
case 'd': // data8 at 2nd byte
- sprintf (temp, "%02lx", get_mem (MEM_ROM, addr + 1));
+ sprintf (temp, "%02"_M_"x", get_mem (MEM_ROM, addr + 1));
break;
case 'D': // data8 at 3rd byte
- sprintf (temp, "%02lx", get_mem (MEM_ROM, addr + 2));
+ sprintf (temp, "%02"_M_"x", get_mem (MEM_ROM, addr + 2));
break;
default:
strcpy (temp, "?");
}
void
-t_uc390::print_regs(class cl_console *con)
+t_uc390::print_regs (class cl_console *con)
{
t_addr start;
- uchar data;
+ t_mem data;
- //if ((sfr->get (ACON) & 0x3) == 2)
- if (!flat24_flag)
+ if (! (sfr->get (ACON) & 0x02)) /* AM1 set: 24-bit flat? */
{
t_uc51::print_regs (con);
return;
iram->dump (start, start + 7, 8, con);
start = sfr->get (PSW) & 0x18;
data = iram->get (iram->get (start));
- con->printf ("%06x %02x %c",
- iram->get (start), data, isprint (data) ? data : '.');
- con->printf (" ACC= 0x%02x %3d %c B= 0x%02x",
- sfr->get (ACC), sfr->get (ACC),
- isprint (sfr->get (ACC)) ? (sfr->get (ACC)) : '.', sfr->get (B));
+ con->dd_printf("%06x %02x %c",
+ iram->get (start), data, isprint (data) ? data : '.');
+ con->dd_printf(" ACC= 0x%02x %3d %c B= 0x%02x",
+ sfr->get (ACC), sfr->get (ACC),
+ isprint (sfr->get (ACC)) ?
+ (sfr->get (ACC)) : '.', sfr->get (B));
eram2xram ();
data = get_mem (MEM_XRAM,
sfr->get (DPX) * 256*256 + sfr->get (DPH) * 256 + sfr->get (DPL));
- con->printf (" DPTR= 0x%02x%02x%02x @DPTR= 0x%02x %3d %c\n",
- sfr->get (DPX), sfr->get (DPH), sfr->get (DPL),
- data, data, isprint (data) ? data : '.');
+ con->dd_printf (" DPTR= 0x%02x%02x%02x @DPTR= 0x%02x %3d %c\n",
+ sfr->get (DPX), sfr->get (DPH), sfr->get (DPL),
+ data, data, isprint (data) ? data : '.');
data = iram->get (iram->get (start + 1));
- con->printf ("%06x %02x %c", iram->get (start + 1), data,
- isprint (data) ? data : '.');
+ con->dd_printf ("%06x %02x %c", iram->get (start + 1), data,
+ isprint (data) ? data : '.');
data= sfr->get (PSW);
- con->printf (" PSW= 0x%02x CY=%c AC=%c OV=%c P=%c ",
- data,
- (data & bmCY) ? '1' : '0', (data & bmAC) ? '1' : '0',
- (data & bmOV) ? '1' : '0', (data & bmP ) ? '1' : '0'
- );
+ con->dd_printf (" PSW= 0x%02x CY=%c AC=%c OV=%c P=%c ",
+ data,
+ (data & bmCY) ? '1' : '0', (data & bmAC) ? '1' : '0',
+ (data & bmOV) ? '1' : '0', (data & bmP ) ? '1' : '0'
+ );
/* show stack pointer */
if (sfr->get (ACON) & 0x04)
/* SA: 10 bit stack */
- con->printf ("SP10 0x%03x %3d\n",
- (sfr->get (ESP) & 3) * 256 + sfr->get (SP),
- get_mem (MEM_IXRAM, (sfr->get (ESP) & 3) * 256 + sfr->get (SP))
- );
+ con->dd_printf ("SP10 0x%03x %3d\n",
+ (sfr->get (ESP) & 3) * 256 + sfr->get (SP),
+ get_mem (MEM_IXRAM, (sfr->get (ESP) & 3) * 256 + sfr->get (SP))
+ );
else
- con->printf ("SP 0x%02x %3d\n",
- sfr->get (SP),
- iram->get (sfr->get (SP))
- );
+ con->dd_printf ("SP 0x%02x %3d\n",
+ sfr->get (SP),
+ iram->get (sfr->get (SP))
+ );
print_disass (PC, con);
}
/* End of s51.src/uc390.cc */
projects / fw / sdcc / blobdiff