*/
int
-t_uc51::inst_orl_addr_a(uchar code)
+cl_51core::inst_orl_addr_a(uchar code)
{
- class cl_cell *cell;
+ class cl_memory_cell *cell;
cell= get_direct(fetch());
cell->write(cell->read(HW_PORT) | acc->read());
*/
int
-t_uc51::inst_orl_addr_Sdata(uchar code)
+cl_51core::inst_orl_addr_Sdata(uchar code)
{
- class cl_cell *cell;
+ class cl_memory_cell *cell;
int res= resGO;
cell= get_direct(fetch());
*/
int
-t_uc51::inst_orl_a_Sdata(uchar code)
+cl_51core::inst_orl_a_Sdata(uchar code)
{
uchar d;
*/
int
-t_uc51::inst_orl_a_addr(uchar code)
+cl_51core::inst_orl_a_addr(uchar code)
{
t_mem d;
- class cl_cell *cell;
+ class cl_memory_cell *cell;
cell= get_direct(fetch());
d= acc->read();
*/
int
-t_uc51::inst_orl_a_Sri(uchar code)
+cl_51core::inst_orl_a_Sri(uchar code)
{
t_mem d;
- class cl_cell *cell;
+ class cl_memory_cell *cell;
cell= iram->get_cell(get_reg(code & 0x01)->read());
d= acc->read();
*/
int
-t_uc51::inst_orl_a_rn(uchar code)
+cl_51core::inst_orl_a_rn(uchar code)
{
t_mem d;
*/
int
-t_uc51::inst_anl_addr_a(uchar code)
+cl_51core::inst_anl_addr_a(uchar code)
{
- class cl_cell *cell;
+ class cl_memory_cell *cell;
cell= get_direct(fetch());
cell->write(cell->read(HW_PORT) & acc->read());
*/
int
-t_uc51::inst_anl_addr_Sdata(uchar code)
+cl_51core::inst_anl_addr_Sdata(uchar code)
{
- class cl_cell *cell;
+ class cl_memory_cell *cell;
t_mem d;
cell= get_direct(fetch());
*/
int
-t_uc51::inst_anl_a_Sdata(uchar code)
+cl_51core::inst_anl_a_Sdata(uchar code)
{
uchar d;
*/
int
-t_uc51::inst_anl_a_addr(uchar code)
+cl_51core::inst_anl_a_addr(uchar code)
{
t_mem d;
- class cl_cell *cell;
+ class cl_memory_cell *cell;
cell= get_direct(fetch());
d= acc->read();
*/
int
-t_uc51::inst_anl_a_Sri(uchar code)
+cl_51core::inst_anl_a_Sri(uchar code)
{
t_mem d;
- class cl_cell *cell;
+ class cl_memory_cell *cell;
cell= iram->get_cell(get_reg(code & 0x01)->read());
d= acc->read();
*/
int
-t_uc51::inst_anl_a_rn(uchar code)
+cl_51core::inst_anl_a_rn(uchar code)
{
uchar d;
*/
int
-t_uc51::inst_xrl_addr_a(uchar code)
+cl_51core::inst_xrl_addr_a(uchar code)
{
- class cl_cell *cell;
+ class cl_memory_cell *cell;
cell= get_direct(fetch());
cell->write(cell->read(HW_PORT) ^ acc->read());
*/
int
-t_uc51::inst_xrl_addr_Sdata(uchar code)
+cl_51core::inst_xrl_addr_Sdata(uchar code)
{
- class cl_cell *cell;
+ class cl_memory_cell *cell;
cell= get_direct(fetch());
cell->write(cell->read(HW_PORT) ^ fetch());
*/
int
-t_uc51::inst_xrl_a_Sdata(uchar code)
+cl_51core::inst_xrl_a_Sdata(uchar code)
{
uchar d;
*/
int
-t_uc51::inst_xrl_a_addr(uchar code)
+cl_51core::inst_xrl_a_addr(uchar code)
{
t_mem d;
- class cl_cell *cell;
+ class cl_memory_cell *cell;
cell= get_direct(fetch());
d= acc->read();
*/
int
-t_uc51::inst_xrl_a_Sri(uchar code)
+cl_51core::inst_xrl_a_Sri(uchar code)
{
t_mem d;
- class cl_cell *cell;
+ class cl_memory_cell *cell;
cell= iram->get_cell(get_reg(code & 0x01)->read());
d= acc->read();
*/
int
-t_uc51::inst_xrl_a_rn(uchar code)
+cl_51core::inst_xrl_a_rn(uchar code)
{
t_mem d;
*/
int
-t_uc51::inst_cpl_a(uchar code)
+cl_51core::inst_cpl_a(uchar code)
{
acc->write(~(acc->read()));
return(resGO);