Merge branch ucsim-034-pre3 to main trunk; new version 0.4

[fw/sdcc] / sim / ucsim / s51.src / interrupt.cc

diff --git a/sim/ucsim/s51.src/interrupt.cc b/sim/ucsim/s51.src/interrupt.cc
index 6cded08259572a98a51dcb7cd07d45ea7cee71be..5f9c8631fdef6391fa99c71a8b9f19952f30a7d4 100644 (file)
--- a/sim/ucsim/s51.src/interrupt.cc
+++ b/sim/ucsim/s51.src/interrupt.cc
@@ -31,18 +31,101 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
 // local
 #include "interruptcl.h"
 #include "regs51.h"
+//#include "uc51cl.h"
+#include "types51.h"
 
 
 cl_interrupt::cl_interrupt(class cl_uc *auc):
   cl_hw(auc, HW_INTERRUPT, 0, "irq")
-{}
+{
+  was_reti= DD_FALSE;
+}
 
-/*int
+int
 cl_interrupt::init(void)
 {
+  class cl_mem *sfr;
+
+  sfr= uc->mem(MEM_SFR);
+  if (sfr)
+    {
+      //sfr->register_hw(IE, this, 0);
+      register_cell(sfr, IE, 0, wtd_restore);
+      register_cell(sfr, TCON, &cell_tcon, wtd_restore_write);
+      bit_INT0= sfr->read(P3) & bm_INT0;
+      bit_INT1= sfr->read(P3) & bm_INT1;
+    }
   return(0);
+}
+
+void
+cl_interrupt::added_to_uc(void)
+{
+  uc->it_sources->add(new cl_it_src(bmEX0, TCON, bmIE0, 0x0003, true,
+                                   "external #0", 1));
+  uc->it_sources->add(new cl_it_src(bmEX1, TCON, bmIE1, 0x0013, true,
+                                   "external #1", 3));
+}
+
+void
+cl_interrupt::write(class cl_cell *cell, t_mem *val)
+{
+  if (cell == cell_tcon)
+    {
+      bit_IT0= *val & bmIT0;
+      bit_IT1= *val & bmIT1;
+    }
+  else
+    // IE register
+    was_reti= DD_TRUE;
+}
+
+/*void
+cl_interrupt::mem_cell_changed(class cl_mem *mem, t_addr addr)
+{
 }*/
 
+int
+cl_interrupt::tick(int cycles)
+{
+  if (!bit_IT0 && !bit_INT0)
+    cell_tcon->set_bit1(bmIE0);
+  if (!bit_IT1 && !bit_INT1)
+    cell_tcon->set_bit1(bmIE1);
+  return(resGO);
+}
+
+void
+cl_interrupt::reset(void)
+{
+  was_reti= DD_FALSE;
+}
+
+void
+cl_interrupt::happen(class cl_hw *where, enum hw_event he, void *params)
+{
+  struct ev_port_changed *ep= (struct ev_port_changed *)params;
+
+  if (where->cathegory == HW_PORT &&
+      he == EV_PORT_CHANGED &&
+      ep->id == 3)
+    {
+      t_mem p3n= ep->new_pins & ep->new_value;
+      t_mem p3o= ep->pins & ep->prev_value;
+      if (bit_IT0 &&
+         !(p3n & bm_INT0) &&
+         (p3o & bm_INT0))
+       cell_tcon->set_bit1(bmIE0);
+      if (bit_IT1 &&
+         !(p3n & bm_INT1) &&
+         (p3o & bm_INT1))
+       cell_tcon->set_bit1(bmIE1);
+      bit_INT0= p3n & bm_INT0;
+      bit_INT1= p3n & bm_INT1;
+    }
+}
+
+
 void
 cl_interrupt::print_info(class cl_console *con)
 {