cl_avr::sec(t_mem code)
{
t_mem d= BIT_C | ram->read(SREG);
- ram->write(SREG, &d);
+ ram->write(SREG, d);
return(resGO);
}
cl_avr::sen(t_mem code)
{
t_mem d= BIT_N | ram->read(SREG);
- ram->write(SREG, &d);
+ ram->write(SREG, d);
return(resGO);
}
cl_avr::sez(t_mem code)
{
t_mem d= BIT_Z | ram->read(SREG);
- ram->write(SREG, &d);
+ ram->write(SREG, d);
return(resGO);
}
cl_avr::sei(t_mem code)
{
t_mem d= BIT_I | ram->read(SREG);
- ram->write(SREG, &d);
+ ram->write(SREG, d);
return(resGO);
}
cl_avr::ses(t_mem code)
{
t_mem d= BIT_S | ram->read(SREG);
- ram->write(SREG, &d);
+ ram->write(SREG, d);
return(resGO);
}
cl_avr::sev(t_mem code)
{
t_mem d= BIT_V | ram->read(SREG);
- ram->write(SREG, &d);
+ ram->write(SREG, d);
return(resGO);
}
cl_avr::set(t_mem code)
{
t_mem d= BIT_T | ram->read(SREG);
- ram->write(SREG, &d);
+ ram->write(SREG, d);
return(resGO);
}
cl_avr::seh(t_mem code)
{
t_mem d= BIT_H | ram->read(SREG);
- ram->write(SREG, &d);
+ ram->write(SREG, d);
return(resGO);
}
cl_avr::clc(t_mem code)
{
t_mem d= ~BIT_C & ram->read(SREG);
- ram->write(SREG, &d);
+ ram->write(SREG, d);
return(resGO);
}
cl_avr::cln(t_mem code)
{
t_mem d= ~BIT_N & ram->read(SREG);
- ram->write(SREG, &d);
+ ram->write(SREG, d);
return(resGO);
}
cl_avr::clz(t_mem code)
{
t_mem d= ~BIT_Z & ram->read(SREG);
- ram->write(SREG, &d);
+ ram->write(SREG, d);
return(resGO);
}
cl_avr::cli(t_mem code)
{
t_mem d= ~BIT_I & ram->read(SREG);
- ram->write(SREG, &d);
+ ram->write(SREG, d);
return(resGO);
}
cl_avr::cls(t_mem code)
{
t_mem d= ~BIT_S & ram->read(SREG);
- ram->write(SREG, &d);
+ ram->write(SREG, d);
return(resGO);
}
cl_avr::clv(t_mem code)
{
t_mem d= ~BIT_V & ram->read(SREG);
- ram->write(SREG, &d);
+ ram->write(SREG, d);
return(resGO);
}
cl_avr::clt(t_mem code)
{
t_mem d= ~BIT_T & ram->read(SREG);
- ram->write(SREG, &d);
+ ram->write(SREG, d);
return(resGO);
}
cl_avr::clh(t_mem code)
{
t_mem d= ~BIT_H & ram->read(SREG);
- ram->write(SREG, &d);
+ ram->write(SREG, d);
return(resGO);
}
addr= ((code&0xf8)>>3)+0x20;
mask= 1 << (code&7);
d= ~mask & ram->read(addr);
- ram->write(addr, &d);
+ ram->write(addr, d);
tick(1);
return(resGO);
}
addr= ((code&0xf8)>>3)+0x20;
mask= 1 << (code&7);
t_mem d= mask | ram->read(addr);
- ram->write(addr, &d);
+ ram->write(addr, d);
tick(1);
return(resGO);
}
data= ram->read(d) | mask;
else
data= ram->read(d) & ~mask;
- ram->write(d, &data);
+ ram->write(d, data);
return(resGO);
}