*/
#ifdef HAVE_CONFIG_H
-#include "config.h"
+#include <config.h>
#endif
#include <usrp2_source_base.h>
// NOP
}
+bool
+usrp2_source_base::set_antenna(int ant)
+{
+ return d_u2->set_rx_antenna(ant);
+}
+
bool
usrp2_source_base::set_gain(double gain)
{
return d_u2->set_rx_gain(gain);
}
+bool
+usrp2_source_base::set_lo_offset(double frequency)
+{
+ return d_u2->set_rx_lo_offset(frequency);
+}
+
bool
usrp2_source_base::set_center_freq(double frequency, usrp2::tune_result *tr)
{
return d_u2->set_rx_decim(decimation_factor);
}
+bool
+usrp2_source_base::set_scale_iq(int scale_i, int scale_q)
+{
+ return d_u2->set_rx_scale_iq(scale_i, scale_q);
+}
+
+int
+usrp2_source_base::decim()
+{
+ return d_u2->rx_decim();
+}
+
+bool
+usrp2_source_base::adc_rate(long *rate)
+{
+ return d_u2->adc_rate(rate);
+}
+
+double
+usrp2_source_base::gain_min()
+{
+ return d_u2->rx_gain_min();
+}
+
+double
+usrp2_source_base::gain_max()
+{
+ return d_u2->rx_gain_max();
+}
+
+double
+usrp2_source_base::gain_db_per_step()
+{
+ return d_u2->rx_gain_db_per_step();
+}
+
+double
+usrp2_source_base::freq_min()
+{
+ return d_u2->rx_freq_min();
+}
+
+double
+usrp2_source_base::freq_max()
+{
+ return d_u2->rx_freq_max();
+}
+
+bool
+usrp2_source_base::daughterboard_id(int *dbid)
+{
+ return d_u2->rx_daughterboard_id(dbid);
+}
+
+unsigned int
+usrp2_source_base::overruns()
+{
+ return d_u2->rx_overruns();
+}
+
+unsigned int
+usrp2_source_base::missing()
+{
+ return d_u2->rx_missing();
+}
+
bool
usrp2_source_base::start()
{
{
return d_u2->stop_rx_streaming(0); // FIXME: someday sources will have channel #s
}
+
+bool
+usrp2_source_base::set_gpio_ddr(uint16_t value, uint16_t mask)
+{
+ return d_u2->set_gpio_ddr(usrp2::GPIO_RX_BANK, value, mask);
+}
+
+bool
+usrp2_source_base::set_gpio_sels(std::string sels)
+{
+ return d_u2->set_gpio_sels(usrp2::GPIO_RX_BANK, sels);
+}
+
+bool
+usrp2_source_base::write_gpio(uint16_t value, uint16_t mask)
+{
+ return d_u2->write_gpio(usrp2::GPIO_RX_BANK, value, mask);
+}
+
+bool
+usrp2_source_base::read_gpio(uint16_t *value)
+{
+ return d_u2->read_gpio(usrp2::GPIO_RX_BANK, value);
+}
+
+bool
+usrp2_source_base::enable_gpio_streaming(int enable)
+{
+ return d_u2->enable_gpio_streaming(usrp2::GPIO_RX_BANK, enable);
+}