rearrange includes to always be: internal GR, external, with GR.

[debian/gnuradio] / gr-usrp2 / src / usrp2_sink_base.cc

diff --git a/gr-usrp2/src/usrp2_sink_base.cc b/gr-usrp2/src/usrp2_sink_base.cc
index 0034dd4e9c11ead4084c4a6e8ddeadb3d9adc1a1..c9b34a54a93669974226ec79abba05bc87f7a132 100644 (file)
--- a/gr-usrp2/src/usrp2_sink_base.cc
+++ b/gr-usrp2/src/usrp2_sink_base.cc
@@ -1,6 +1,6 @@
 /* -*- c++ -*- */
 /*
- * Copyright 2008 Free Software Foundation, Inc.
+ * Copyright 2008,2010 Free Software Foundation, Inc.
  * 
  * This file is part of GNU Radio
  * 
@@ -36,7 +36,9 @@ usrp2_sink_base::usrp2_sink_base(const char *name,
   : usrp2_base(name,
                input_signature,
               gr_make_io_signature(0, 0, 0),
-              ifc, mac)
+              ifc, mac),
+    d_should_wait(false),
+    d_tx_time(0)
 {
   // NOP
 }
@@ -46,12 +48,24 @@ usrp2_sink_base::~usrp2_sink_base ()
   // NOP
 }
 
+bool
+usrp2_sink_base::set_antenna(int ant)
+{
+  return d_u2->set_tx_antenna(ant);
+}
+
 bool
 usrp2_sink_base::set_gain(double gain)
 {
   return d_u2->set_tx_gain(gain);
 }
 
+bool
+usrp2_sink_base::set_lo_offset(double frequency)
+{
+  return d_u2->set_tx_lo_offset(frequency);
+}
+
 bool
 usrp2_sink_base::set_center_freq(double frequency, usrp2::tune_result *tr)
 {
@@ -63,3 +77,90 @@ usrp2_sink_base::set_interp(int interp_factor)
 {
   return d_u2->set_tx_interp(interp_factor);
 }
+
+void
+usrp2_sink_base::default_scale_iq(int interp_factor, int *scale_i, int *scale_q)
+{
+  return d_u2->default_tx_scale_iq(interp_factor, scale_i, scale_q);
+}
+
+bool 
+usrp2_sink_base::set_scale_iq(int scale_i, int scale_q)
+{
+  return d_u2->set_tx_scale_iq(scale_i, scale_q);
+}
+
+int
+usrp2_sink_base::interp()
+{
+  return d_u2->tx_interp();
+}
+
+bool
+usrp2_sink_base::dac_rate(long *rate)
+{
+  return d_u2->dac_rate(rate);
+}
+
+double
+usrp2_sink_base::gain_min()
+{
+  return d_u2->tx_gain_min();
+}
+
+double
+usrp2_sink_base::gain_max()
+{
+  return d_u2->tx_gain_max();
+}
+
+double
+usrp2_sink_base::gain_db_per_step()
+{
+  return d_u2->tx_gain_db_per_step();
+}
+  
+double
+usrp2_sink_base::freq_min()
+{
+  return d_u2->tx_freq_min();
+}
+
+double
+usrp2_sink_base::freq_max()
+{
+  return d_u2->tx_freq_max();
+}
+
+bool
+usrp2_sink_base::daughterboard_id(int *dbid)
+{
+  return d_u2->tx_daughterboard_id(dbid);
+}
+
+bool usrp2_sink_base::set_gpio_ddr(uint16_t value, uint16_t mask)
+{
+  return d_u2->set_gpio_ddr(usrp2::GPIO_TX_BANK, value, mask);
+}
+
+bool usrp2_sink_base::set_gpio_sels(std::string sels)
+{
+  return d_u2->set_gpio_sels(usrp2::GPIO_TX_BANK, sels);
+}
+
+bool usrp2_sink_base::write_gpio(uint16_t value, uint16_t mask)
+{
+  return d_u2->write_gpio(usrp2::GPIO_TX_BANK, value, mask);
+}
+
+bool usrp2_sink_base::read_gpio(uint16_t *value)
+{
+  return d_u2->read_gpio(usrp2::GPIO_TX_BANK, value);
+}
+
+bool usrp2_sink_base::start_streaming_at(usrp2::fpga_timestamp time)
+{
+  d_should_wait = true;
+  d_tx_time = time;
+  return true;
+}