module radar(clk_i,saddr_i,sdata_i,s_strobe_i,
tx_side_o,tx_strobe_o,tx_dac_i_o,tx_dac_q_o,
rx_adc_i_i,rx_adc_q_i,
- rx_strobe_o,rx_ech_i_o,rx_ech_q_o,auto_tr_o);
+ rx_strobe_o,rx_ech_i_o,rx_ech_q_o,io_tx_ena_o);
// System interface
input clk_i; // Master clock @ 64 MHz
output tx_strobe_o; // Generate an transmitter output sample
output [13:0] tx_dac_i_o; // I channel transmitter output to DAC
output [13:0] tx_dac_q_o; // Q channel transmitter output to DAC
- output auto_tr_o; // Transmit/Receive switching
+ output io_tx_ena_o; // Transmit/Receive switching
// Receive subsystem
input [15:0] rx_adc_i_i; // I channel input from ADC
(.clk_i(clk_i),.saddr_i(saddr_i),.sdata_i(sdata_i),.s_strobe_i(s_strobe_i),
.reset_o(reset),.tx_side_o(tx_side_o),.dbg_o(debug_enabled),
.tx_strobe_o(tx_strobe_o),.tx_ctrl_o(tx_ctrl),.rx_ctrl_o(rx_ctrl),
- .ampl_o(ampl),.fstart_o(fstart),.fincr_o(fincr),.pulse_num_o(pulse_num));
- assign auto_tr_o = tx_ctrl;
+ .ampl_o(ampl),.fstart_o(fstart),.fincr_o(fincr),.pulse_num_o(pulse_num),
+ .io_tx_ena_o(io_tx_ena_o));
radar_tx transmitter
( .clk_i(clk_i),.rst_i(reset),.ena_i(tx_ctrl),.strobe_i(tx_strobe_o),