+++ /dev/null
-/**\r
- ******************************************************************************\r
- * @file stm32l1xx_wwdg.c\r
- * @author MCD Application Team\r
- * @version V1.0.0\r
- * @date 31-December-2010\r
- * @brief This file provides firmware functions to manage the following \r
- * functionalities of the Window watchdog (WWDG) peripheral: \r
- * - Prescaler, Refresh window and Counter configuration\r
- * - WWDG activation\r
- * - Interrupts and flags management\r
- * \r
- * @verbatim\r
- * \r
- * ===================================================================\r
- * WWDG features\r
- * ===================================================================\r
- * \r
- * Once enabled the WWDG generates a system reset on expiry of a programmed\r
- * time period, unless the program refreshes the counter (downcounter) \r
- * before to reach 0x3F value (i.e. a reset is generated when the counter\r
- * value rolls over from 0x40 to 0x3F). \r
- * An MCU reset is also generated if the counter value is refreshed\r
- * before the counter has reached the refresh window value. This \r
- * implies that the counter must be refreshed in a limited window.\r
- * \r
- * Once enabled the WWDG cannot be disabled except by a system reset. \r
- * \r
- * WWDGRST flag in RCC_CSR register can be used to inform when a WWDG\r
- * reset occurs.\r
- * \r
- * The WWDG counter input clock is derived from the APB clock divided \r
- * by a programmable prescaler.\r
- * \r
- * WWDG counter clock = PCLK1 / Prescaler\r
- * WWDG timeout = (WWDG counter clock) * (counter value)\r
- * \r
- * Min-max timeout value @32MHz (PCLK1): ~128us / ~65.6ms\r
- * \r
- * ===================================================================\r
- * How to use this driver\r
- * =================================================================== \r
- * 1. Enable WWDG clock using RCC_APB1PeriphClockCmd(RCC_APB1Periph_WWDG, ENABLE) function\r
- * \r
- * 2. Configure the WWDG prescaler using WWDG_SetPrescaler() function\r
- * \r
- * 3. Configure the WWDG refresh window using WWDG_SetWindowValue() function\r
- * \r
- * 4. Set the WWDG counter value and start it using WWDG_Enable() function.\r
- * When the WWDG is enabled the counter value should be configured to \r
- * a value greater than 0x40 to prevent generating an immediate reset. \r
- * \r
- * 5. Optionally you can enable the Early wakeup interrupt which is \r
- * generated when the counter reach 0x40.\r
- * Once enabled this interrupt cannot be disabled except by a system reset.\r
- * \r
- * 6. Then the application program must refresh the WWDG counter at regular\r
- * intervals during normal operation to prevent an MCU reset, using\r
- * WWDG_SetCounter() function. This operation must occur only when\r
- * the counter value is lower than the refresh window value, \r
- * programmed using WWDG_SetWindowValue(). \r
- *\r
- * @endverbatim \r
- * \r
- ******************************************************************************\r
- * @attention\r
- *\r
- * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS\r
- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE\r
- * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY\r
- * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING\r
- * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE\r
- * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.\r
- *\r
- * <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>\r
- ****************************************************************************** \r
- */ \r
-\r
-/* Includes ------------------------------------------------------------------*/\r
-#include "stm32l1xx_wwdg.h"\r
-#include "stm32l1xx_rcc.h"\r
-\r
-/** @addtogroup STM32L1xx_StdPeriph_Driver\r
- * @{\r
- */\r
-\r
-/** @defgroup WWDG \r
- * @brief WWDG driver modules\r
- * @{\r
- */\r
-\r
-/* Private typedef -----------------------------------------------------------*/\r
-/* Private define ------------------------------------------------------------*/\r
-\r
-/* ----------- WWDG registers bit address in the alias region ----------- */\r
-#define WWDG_OFFSET (WWDG_BASE - PERIPH_BASE)\r
-\r
-/* Alias word address of EWI bit */\r
-#define CFR_OFFSET (WWDG_OFFSET + 0x04)\r
-#define EWI_BitNumber 0x09\r
-#define CFR_EWI_BB (PERIPH_BB_BASE + (CFR_OFFSET * 32) + (EWI_BitNumber * 4))\r
-\r
-/* --------------------- WWDG registers bit mask ------------------------ */\r
-\r
-/* CFR register bit mask */\r
-#define CFR_WDGTB_MASK ((uint32_t)0xFFFFFE7F)\r
-#define CFR_W_MASK ((uint32_t)0xFFFFFF80)\r
-#define BIT_MASK ((uint8_t)0x7F)\r
-\r
-/* Private macro -------------------------------------------------------------*/\r
-/* Private variables ---------------------------------------------------------*/\r
-/* Private function prototypes -----------------------------------------------*/\r
-/* Private functions ---------------------------------------------------------*/\r
-\r
-/** @defgroup WWDG_Private_Functions\r
- * @{\r
- */\r
-\r
-/** @defgroup WWDG_Group1 Prescaler, Refresh window and Counter configuration functions\r
- * @brief Prescaler, Refresh window and Counter configuration functions \r
- *\r
-@verbatim \r
- ===============================================================================\r
- Prescaler, Refresh window and Counter configuration functions\r
- =============================================================================== \r
-\r
-@endverbatim\r
- * @{\r
- */\r
-\r
-/**\r
- * @brief Deinitializes the WWDG peripheral registers to their default reset values.\r
- * @param None\r
- * @retval None\r
- */\r
-void WWDG_DeInit(void)\r
-{\r
- RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE);\r
- RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE);\r
-}\r
-\r
-/**\r
- * @brief Sets the WWDG Prescaler.\r
- * @param WWDG_Prescaler: specifies the WWDG Prescaler.\r
- * This parameter can be one of the following values:\r
- * @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1\r
- * @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2\r
- * @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4\r
- * @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8\r
- * @retval None\r
- */\r
-void WWDG_SetPrescaler(uint32_t WWDG_Prescaler)\r
-{\r
- uint32_t tmpreg = 0;\r
- /* Check the parameters */\r
- assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler));\r
- /* Clear WDGTB[1:0] bits */\r
- tmpreg = WWDG->CFR & CFR_WDGTB_MASK;\r
- /* Set WDGTB[1:0] bits according to WWDG_Prescaler value */\r
- tmpreg |= WWDG_Prescaler;\r
- /* Store the new value */\r
- WWDG->CFR = tmpreg;\r
-}\r
-\r
-/**\r
- * @brief Sets the WWDG window value.\r
- * @param WindowValue: specifies the window value to be compared to the downcounter.\r
- * This parameter value must be lower than 0x80.\r
- * @retval None\r
- */\r
-void WWDG_SetWindowValue(uint8_t WindowValue)\r
-{\r
- __IO uint32_t tmpreg = 0;\r
-\r
- /* Check the parameters */\r
- assert_param(IS_WWDG_WINDOW_VALUE(WindowValue));\r
- /* Clear W[6:0] bits */\r
-\r
- tmpreg = WWDG->CFR & CFR_W_MASK;\r
-\r
- /* Set W[6:0] bits according to WindowValue value */\r
- tmpreg |= WindowValue & (uint32_t) BIT_MASK;\r
-\r
- /* Store the new value */\r
- WWDG->CFR = tmpreg;\r
-}\r
-\r
-/**\r
- * @brief Enables the WWDG Early Wakeup interrupt(EWI).\r
- * @note Once enabled this interrupt cannot be disabled except by a system reset. \r
- * @param None\r
- * @retval None\r
- */\r
-void WWDG_EnableIT(void)\r
-{\r
- *(__IO uint32_t *) CFR_EWI_BB = (uint32_t)ENABLE;\r
-}\r
-\r
-/**\r
- * @brief Sets the WWDG counter value.\r
- * @param Counter: specifies the watchdog counter value.\r
- * This parameter must be a number between 0x40 and 0x7F (to prevent generating\r
- * an immediate reset) \r
- * @retval None\r
- */\r
-void WWDG_SetCounter(uint8_t Counter)\r
-{\r
- /* Check the parameters */\r
- assert_param(IS_WWDG_COUNTER(Counter));\r
- /* Write to T[6:0] bits to configure the counter value, no need to do\r
- a read-modify-write; writing a 0 to WDGA bit does nothing */\r
- WWDG->CR = Counter & BIT_MASK;\r
-}\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-/** @defgroup WWDG_Group2 WWDG activation functions\r
- * @brief WWDG activation functions \r
- *\r
-@verbatim \r
- ===============================================================================\r
- WWDG activation functions\r
- =============================================================================== \r
-\r
-@endverbatim\r
- * @{\r
- */\r
-\r
-/**\r
- * @brief Enables WWDG and load the counter value. \r
- * @param Counter: specifies the watchdog counter value.\r
- * This parameter must be a number between 0x40 and 0x7F (to prevent generating\r
- * an immediate reset)\r
- * @retval None\r
- */\r
-void WWDG_Enable(uint8_t Counter)\r
-{\r
- /* Check the parameters */\r
- assert_param(IS_WWDG_COUNTER(Counter));\r
- WWDG->CR = WWDG_CR_WDGA | Counter;\r
-}\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-/** @defgroup WWDG_Group3 Interrupts and flags management functions\r
- * @brief Interrupts and flags management functions \r
- *\r
-@verbatim \r
- ===============================================================================\r
- Interrupts and flags management functions\r
- =============================================================================== \r
-\r
-@endverbatim\r
- * @{\r
- */\r
-\r
-/**\r
- * @brief Checks whether the Early Wakeup interrupt flag is set or not.\r
- * @param None\r
- * @retval The new state of the Early Wakeup interrupt flag (SET or RESET)\r
- */\r
-FlagStatus WWDG_GetFlagStatus(void)\r
-{\r
- FlagStatus bitstatus = RESET;\r
- \r
- if ((WWDG->SR) != (uint32_t)RESET)\r
- {\r
- bitstatus = SET;\r
- }\r
- else\r
- {\r
- bitstatus = RESET;\r
- }\r
- return bitstatus;\r
-}\r
-\r
-/**\r
- * @brief Clears Early Wakeup interrupt flag.\r
- * @param None\r
- * @retval None\r
- */\r
-void WWDG_ClearFlag(void)\r
-{\r
- WWDG->SR = (uint32_t)RESET;\r
-}\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/\r
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