+++ /dev/null
-/**\r
- ******************************************************************************\r
- * @file stm32l1xx_dma.h\r
- * @author MCD Application Team\r
- * @version V1.0.0\r
- * @date 31-December-2010\r
- * @brief This file contains all the functions prototypes for the DMA firmware \r
- * library.\r
- ******************************************************************************\r
- * @attention\r
- *\r
- * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS\r
- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE\r
- * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY\r
- * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING\r
- * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE\r
- * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.\r
- *\r
- * <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>\r
- ****************************************************************************** \r
- */ \r
-\r
-/* Define to prevent recursive inclusion -------------------------------------*/\r
-#ifndef __STM32L1xx_DMA_H\r
-#define __STM32L1xx_DMA_H\r
-\r
-#ifdef __cplusplus\r
- extern "C" {\r
-#endif\r
-\r
-/* Includes ------------------------------------------------------------------*/\r
-#include "stm32l1xx.h"\r
-\r
-/** @addtogroup STM32L1xx_StdPeriph_Driver\r
- * @{\r
- */\r
-\r
-/** @addtogroup DMA\r
- * @{\r
- */\r
-\r
-/* Exported types ------------------------------------------------------------*/\r
-\r
-/** \r
- * @brief DMA Init structure definition\r
- */\r
-\r
-typedef struct\r
-{\r
- uint32_t DMA_PeripheralBaseAddr; /*!< Specifies the peripheral base address for DMAy Channelx. */\r
-\r
- uint32_t DMA_MemoryBaseAddr; /*!< Specifies the memory base address for DMAy Channelx. */\r
-\r
- uint32_t DMA_DIR; /*!< Specifies if the peripheral is the source or destination.\r
- This parameter can be a value of @ref DMA_data_transfer_direction */\r
-\r
- uint32_t DMA_BufferSize; /*!< Specifies the buffer size, in data unit, of the specified Channel. \r
- The data unit is equal to the configuration set in DMA_PeripheralDataSize\r
- or DMA_MemoryDataSize members depending in the transfer direction. */\r
-\r
- uint32_t DMA_PeripheralInc; /*!< Specifies whether the Peripheral address register is incremented or not.\r
- This parameter can be a value of @ref DMA_peripheral_incremented_mode */\r
-\r
- uint32_t DMA_MemoryInc; /*!< Specifies whether the memory address register is incremented or not.\r
- This parameter can be a value of @ref DMA_memory_incremented_mode */\r
-\r
- uint32_t DMA_PeripheralDataSize; /*!< Specifies the Peripheral data width.\r
- This parameter can be a value of @ref DMA_peripheral_data_size */\r
-\r
- uint32_t DMA_MemoryDataSize; /*!< Specifies the Memory data width.\r
- This parameter can be a value of @ref DMA_memory_data_size */\r
-\r
- uint32_t DMA_Mode; /*!< Specifies the operation mode of the DMAy Channelx.\r
- This parameter can be a value of @ref DMA_circular_normal_mode.\r
- @note: The circular buffer mode cannot be used if the memory-to-memory\r
- data transfer is configured on the selected Channel */\r
-\r
- uint32_t DMA_Priority; /*!< Specifies the software priority for the DMAy Channelx.\r
- This parameter can be a value of @ref DMA_priority_level */\r
-\r
- uint32_t DMA_M2M; /*!< Specifies if the DMAy Channelx will be used in memory-to-memory transfer.\r
- This parameter can be a value of @ref DMA_memory_to_memory */\r
-}DMA_InitTypeDef;\r
-\r
-/* Exported constants --------------------------------------------------------*/\r
-\r
-/** @defgroup DMA_Exported_Constants\r
- * @{\r
- */\r
-\r
-#define IS_DMA_ALL_PERIPH(PERIPH) (((PERIPH) == DMA1_Channel1) || \\r
- ((PERIPH) == DMA1_Channel2) || \\r
- ((PERIPH) == DMA1_Channel3) || \\r
- ((PERIPH) == DMA1_Channel4) || \\r
- ((PERIPH) == DMA1_Channel5) || \\r
- ((PERIPH) == DMA1_Channel6) || \\r
- ((PERIPH) == DMA1_Channel7))\r
-\r
-/** @defgroup DMA_data_transfer_direction \r
- * @{\r
- */\r
-\r
-#define DMA_DIR_PeripheralDST ((uint32_t)0x00000010)\r
-#define DMA_DIR_PeripheralSRC ((uint32_t)0x00000000)\r
-#define IS_DMA_DIR(DIR) (((DIR) == DMA_DIR_PeripheralDST) || \\r
- ((DIR) == DMA_DIR_PeripheralSRC))\r
-/**\r
- * @}\r
- */\r
-\r
-/** @defgroup DMA_peripheral_incremented_mode \r
- * @{\r
- */\r
-\r
-#define DMA_PeripheralInc_Enable ((uint32_t)0x00000040)\r
-#define DMA_PeripheralInc_Disable ((uint32_t)0x00000000)\r
-#define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PeripheralInc_Enable) || \\r
- ((STATE) == DMA_PeripheralInc_Disable))\r
-/**\r
- * @}\r
- */\r
-\r
-/** @defgroup DMA_memory_incremented_mode \r
- * @{\r
- */\r
-\r
-#define DMA_MemoryInc_Enable ((uint32_t)0x00000080)\r
-#define DMA_MemoryInc_Disable ((uint32_t)0x00000000)\r
-#define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MemoryInc_Enable) || \\r
- ((STATE) == DMA_MemoryInc_Disable))\r
-/**\r
- * @}\r
- */\r
-\r
-/** @defgroup DMA_peripheral_data_size \r
- * @{\r
- */\r
-\r
-#define DMA_PeripheralDataSize_Byte ((uint32_t)0x00000000)\r
-#define DMA_PeripheralDataSize_HalfWord ((uint32_t)0x00000100)\r
-#define DMA_PeripheralDataSize_Word ((uint32_t)0x00000200)\r
-#define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PeripheralDataSize_Byte) || \\r
- ((SIZE) == DMA_PeripheralDataSize_HalfWord) || \\r
- ((SIZE) == DMA_PeripheralDataSize_Word))\r
-/**\r
- * @}\r
- */\r
-\r
-/** @defgroup DMA_memory_data_size \r
- * @{\r
- */\r
-\r
-#define DMA_MemoryDataSize_Byte ((uint32_t)0x00000000)\r
-#define DMA_MemoryDataSize_HalfWord ((uint32_t)0x00000400)\r
-#define DMA_MemoryDataSize_Word ((uint32_t)0x00000800)\r
-#define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MemoryDataSize_Byte) || \\r
- ((SIZE) == DMA_MemoryDataSize_HalfWord) || \\r
- ((SIZE) == DMA_MemoryDataSize_Word))\r
-/**\r
- * @}\r
- */\r
-\r
-/** @defgroup DMA_circular_normal_mode \r
- * @{\r
- */\r
-\r
-#define DMA_Mode_Circular ((uint32_t)0x00000020)\r
-#define DMA_Mode_Normal ((uint32_t)0x00000000)\r
-#define IS_DMA_MODE(MODE) (((MODE) == DMA_Mode_Circular) || ((MODE) == DMA_Mode_Normal))\r
-/**\r
- * @}\r
- */\r
-\r
-/** @defgroup DMA_priority_level \r
- * @{\r
- */\r
-\r
-#define DMA_Priority_VeryHigh ((uint32_t)0x00003000)\r
-#define DMA_Priority_High ((uint32_t)0x00002000)\r
-#define DMA_Priority_Medium ((uint32_t)0x00001000)\r
-#define DMA_Priority_Low ((uint32_t)0x00000000)\r
-#define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_Priority_VeryHigh) || \\r
- ((PRIORITY) == DMA_Priority_High) || \\r
- ((PRIORITY) == DMA_Priority_Medium) || \\r
- ((PRIORITY) == DMA_Priority_Low))\r
-/**\r
- * @}\r
- */\r
-\r
-/** @defgroup DMA_memory_to_memory \r
- * @{\r
- */\r
-\r
-#define DMA_M2M_Enable ((uint32_t)0x00004000)\r
-#define DMA_M2M_Disable ((uint32_t)0x00000000)\r
-#define IS_DMA_M2M_STATE(STATE) (((STATE) == DMA_M2M_Enable) || ((STATE) == DMA_M2M_Disable))\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-/** @defgroup DMA_interrupts_definition \r
- * @{\r
- */\r
-\r
-#define DMA_IT_TC ((uint32_t)0x00000002)\r
-#define DMA_IT_HT ((uint32_t)0x00000004)\r
-#define DMA_IT_TE ((uint32_t)0x00000008)\r
-#define IS_DMA_CONFIG_IT(IT) ((((IT) & 0xFFFFFFF1) == 0x00) && ((IT) != 0x00))\r
-\r
-#define DMA1_IT_GL1 ((uint32_t)0x00000001)\r
-#define DMA1_IT_TC1 ((uint32_t)0x00000002)\r
-#define DMA1_IT_HT1 ((uint32_t)0x00000004)\r
-#define DMA1_IT_TE1 ((uint32_t)0x00000008)\r
-#define DMA1_IT_GL2 ((uint32_t)0x00000010)\r
-#define DMA1_IT_TC2 ((uint32_t)0x00000020)\r
-#define DMA1_IT_HT2 ((uint32_t)0x00000040)\r
-#define DMA1_IT_TE2 ((uint32_t)0x00000080)\r
-#define DMA1_IT_GL3 ((uint32_t)0x00000100)\r
-#define DMA1_IT_TC3 ((uint32_t)0x00000200)\r
-#define DMA1_IT_HT3 ((uint32_t)0x00000400)\r
-#define DMA1_IT_TE3 ((uint32_t)0x00000800)\r
-#define DMA1_IT_GL4 ((uint32_t)0x00001000)\r
-#define DMA1_IT_TC4 ((uint32_t)0x00002000)\r
-#define DMA1_IT_HT4 ((uint32_t)0x00004000)\r
-#define DMA1_IT_TE4 ((uint32_t)0x00008000)\r
-#define DMA1_IT_GL5 ((uint32_t)0x00010000)\r
-#define DMA1_IT_TC5 ((uint32_t)0x00020000)\r
-#define DMA1_IT_HT5 ((uint32_t)0x00040000)\r
-#define DMA1_IT_TE5 ((uint32_t)0x00080000)\r
-#define DMA1_IT_GL6 ((uint32_t)0x00100000)\r
-#define DMA1_IT_TC6 ((uint32_t)0x00200000)\r
-#define DMA1_IT_HT6 ((uint32_t)0x00400000)\r
-#define DMA1_IT_TE6 ((uint32_t)0x00800000)\r
-#define DMA1_IT_GL7 ((uint32_t)0x01000000)\r
-#define DMA1_IT_TC7 ((uint32_t)0x02000000)\r
-#define DMA1_IT_HT7 ((uint32_t)0x04000000)\r
-#define DMA1_IT_TE7 ((uint32_t)0x08000000)\r
-\r
-#define IS_DMA_CLEAR_IT(IT) ((((IT) & 0xF0000000) == 0x00) && ((IT) != 0x00))\r
-\r
-#define IS_DMA_GET_IT(IT) (((IT) == DMA1_IT_GL1) || ((IT) == DMA1_IT_TC1) || \\r
- ((IT) == DMA1_IT_HT1) || ((IT) == DMA1_IT_TE1) || \\r
- ((IT) == DMA1_IT_GL2) || ((IT) == DMA1_IT_TC2) || \\r
- ((IT) == DMA1_IT_HT2) || ((IT) == DMA1_IT_TE2) || \\r
- ((IT) == DMA1_IT_GL3) || ((IT) == DMA1_IT_TC3) || \\r
- ((IT) == DMA1_IT_HT3) || ((IT) == DMA1_IT_TE3) || \\r
- ((IT) == DMA1_IT_GL4) || ((IT) == DMA1_IT_TC4) || \\r
- ((IT) == DMA1_IT_HT4) || ((IT) == DMA1_IT_TE4) || \\r
- ((IT) == DMA1_IT_GL5) || ((IT) == DMA1_IT_TC5) || \\r
- ((IT) == DMA1_IT_HT5) || ((IT) == DMA1_IT_TE5) || \\r
- ((IT) == DMA1_IT_GL6) || ((IT) == DMA1_IT_TC6) || \\r
- ((IT) == DMA1_IT_HT6) || ((IT) == DMA1_IT_TE6) || \\r
- ((IT) == DMA1_IT_GL7) || ((IT) == DMA1_IT_TC7) || \\r
- ((IT) == DMA1_IT_HT7) || ((IT) == DMA1_IT_TE7))\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-/** @defgroup DMA_flags_definition \r
- * @{\r
- */\r
-#define DMA1_FLAG_GL1 ((uint32_t)0x00000001)\r
-#define DMA1_FLAG_TC1 ((uint32_t)0x00000002)\r
-#define DMA1_FLAG_HT1 ((uint32_t)0x00000004)\r
-#define DMA1_FLAG_TE1 ((uint32_t)0x00000008)\r
-#define DMA1_FLAG_GL2 ((uint32_t)0x00000010)\r
-#define DMA1_FLAG_TC2 ((uint32_t)0x00000020)\r
-#define DMA1_FLAG_HT2 ((uint32_t)0x00000040)\r
-#define DMA1_FLAG_TE2 ((uint32_t)0x00000080)\r
-#define DMA1_FLAG_GL3 ((uint32_t)0x00000100)\r
-#define DMA1_FLAG_TC3 ((uint32_t)0x00000200)\r
-#define DMA1_FLAG_HT3 ((uint32_t)0x00000400)\r
-#define DMA1_FLAG_TE3 ((uint32_t)0x00000800)\r
-#define DMA1_FLAG_GL4 ((uint32_t)0x00001000)\r
-#define DMA1_FLAG_TC4 ((uint32_t)0x00002000)\r
-#define DMA1_FLAG_HT4 ((uint32_t)0x00004000)\r
-#define DMA1_FLAG_TE4 ((uint32_t)0x00008000)\r
-#define DMA1_FLAG_GL5 ((uint32_t)0x00010000)\r
-#define DMA1_FLAG_TC5 ((uint32_t)0x00020000)\r
-#define DMA1_FLAG_HT5 ((uint32_t)0x00040000)\r
-#define DMA1_FLAG_TE5 ((uint32_t)0x00080000)\r
-#define DMA1_FLAG_GL6 ((uint32_t)0x00100000)\r
-#define DMA1_FLAG_TC6 ((uint32_t)0x00200000)\r
-#define DMA1_FLAG_HT6 ((uint32_t)0x00400000)\r
-#define DMA1_FLAG_TE6 ((uint32_t)0x00800000)\r
-#define DMA1_FLAG_GL7 ((uint32_t)0x01000000)\r
-#define DMA1_FLAG_TC7 ((uint32_t)0x02000000)\r
-#define DMA1_FLAG_HT7 ((uint32_t)0x04000000)\r
-#define DMA1_FLAG_TE7 ((uint32_t)0x08000000)\r
-\r
-#define IS_DMA_CLEAR_FLAG(FLAG) ((((FLAG) & 0xF0000000) == 0x00) && ((FLAG) != 0x00))\r
-\r
-#define IS_DMA_GET_FLAG(FLAG) (((FLAG) == DMA1_FLAG_GL1) || ((FLAG) == DMA1_FLAG_TC1) || \\r
- ((FLAG) == DMA1_FLAG_HT1) || ((FLAG) == DMA1_FLAG_TE1) || \\r
- ((FLAG) == DMA1_FLAG_GL2) || ((FLAG) == DMA1_FLAG_TC2) || \\r
- ((FLAG) == DMA1_FLAG_HT2) || ((FLAG) == DMA1_FLAG_TE2) || \\r
- ((FLAG) == DMA1_FLAG_GL3) || ((FLAG) == DMA1_FLAG_TC3) || \\r
- ((FLAG) == DMA1_FLAG_HT3) || ((FLAG) == DMA1_FLAG_TE3) || \\r
- ((FLAG) == DMA1_FLAG_GL4) || ((FLAG) == DMA1_FLAG_TC4) || \\r
- ((FLAG) == DMA1_FLAG_HT4) || ((FLAG) == DMA1_FLAG_TE4) || \\r
- ((FLAG) == DMA1_FLAG_GL5) || ((FLAG) == DMA1_FLAG_TC5) || \\r
- ((FLAG) == DMA1_FLAG_HT5) || ((FLAG) == DMA1_FLAG_TE5) || \\r
- ((FLAG) == DMA1_FLAG_GL6) || ((FLAG) == DMA1_FLAG_TC6) || \\r
- ((FLAG) == DMA1_FLAG_HT6) || ((FLAG) == DMA1_FLAG_TE6) || \\r
- ((FLAG) == DMA1_FLAG_GL7) || ((FLAG) == DMA1_FLAG_TC7) || \\r
- ((FLAG) == DMA1_FLAG_HT7) || ((FLAG) == DMA1_FLAG_TE7))\r
-/**\r
- * @}\r
- */\r
-\r
-/** @defgroup DMA_Buffer_Size \r
- * @{\r
- */\r
-\r
-#define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000))\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-/* Exported macro ------------------------------------------------------------*/\r
-/* Exported functions ------------------------------------------------------- */\r
-\r
-/* Function used to set the DMA configuration to the default reset state *****/ \r
-void DMA_DeInit(DMA_Channel_TypeDef* DMAy_Channelx);\r
-\r
-/* Initialization and Configuration functions *********************************/\r
-void DMA_Init(DMA_Channel_TypeDef* DMAy_Channelx, DMA_InitTypeDef* DMA_InitStruct);\r
-void DMA_StructInit(DMA_InitTypeDef* DMA_InitStruct);\r
-void DMA_Cmd(DMA_Channel_TypeDef* DMAy_Channelx, FunctionalState NewState);\r
-\r
-/* Data Counter functions *****************************************************/\r
-void DMA_SetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx, uint16_t DataNumber);\r
-uint16_t DMA_GetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx);\r
-\r
-/* Interrupts and flags management functions **********************************/\r
-void DMA_ITConfig(DMA_Channel_TypeDef* DMAy_Channelx, uint32_t DMA_IT, FunctionalState NewState);\r
-FlagStatus DMA_GetFlagStatus(uint32_t DMA_FLAG);\r
-void DMA_ClearFlag(uint32_t DMA_FLAG);\r
-ITStatus DMA_GetITStatus(uint32_t DMA_IT);\r
-void DMA_ClearITPendingBit(uint32_t DMA_IT);\r
-\r
-#ifdef __cplusplus\r
-}\r
-#endif\r
-\r
-#endif /*__STM32L1xx_DMA_H */\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/\r
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