+++ /dev/null
-/**************************************************************************//**\r
- * @file core_cm3.c\r
- * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Source File\r
- * @version V1.30\r
- * @date 30. October 2009\r
- *\r
- * @note\r
- * Copyright (C) 2009 ARM Limited. All rights reserved.\r
- *\r
- * @par\r
- * ARM Limited (ARM) is supplying this software for use with Cortex-M \r
- * processor based microcontrollers. This file can be freely distributed \r
- * within development tools that are supporting such ARM based processors. \r
- *\r
- * @par\r
- * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
- * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
- * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
- * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
- *\r
- ******************************************************************************/\r
-\r
-#include <stdint.h>\r
-\r
-/* define compiler specific symbols */\r
-#if defined ( __CC_ARM )\r
- #define __ASM __asm /*!< asm keyword for ARM Compiler */\r
- #define __INLINE __inline /*!< inline keyword for ARM Compiler */\r
-\r
-#elif defined ( __ICCARM__ )\r
- #define __ASM __asm /*!< asm keyword for IAR Compiler */\r
- #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */\r
-\r
-#elif defined ( __GNUC__ )\r
- #define __ASM __asm /*!< asm keyword for GNU Compiler */\r
- #define __INLINE inline /*!< inline keyword for GNU Compiler */\r
-\r
-#elif defined ( __TASKING__ )\r
- #define __ASM __asm /*!< asm keyword for TASKING Compiler */\r
- #define __INLINE inline /*!< inline keyword for TASKING Compiler */\r
-\r
-#endif\r
-\r
-\r
-/* ################### Compiler specific Intrinsics ########################### */\r
-\r
-#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/\r
-/* ARM armcc specific functions */\r
-\r
-/**\r
- * @brief Return the Process Stack Pointer\r
- *\r
- * @return ProcessStackPointer\r
- *\r
- * Return the actual process stack pointer\r
- */\r
-__ASM uint32_t __get_PSP(void)\r
-{\r
- mrs r0, psp\r
- bx lr\r
-}\r
-\r
-/**\r
- * @brief Set the Process Stack Pointer\r
- *\r
- * @param topOfProcStack Process Stack Pointer\r
- *\r
- * Assign the value ProcessStackPointer to the MSP \r
- * (process stack pointer) Cortex processor register\r
- */\r
-__ASM void __set_PSP(uint32_t topOfProcStack)\r
-{\r
- msr psp, r0\r
- bx lr\r
-}\r
-\r
-/**\r
- * @brief Return the Main Stack Pointer\r
- *\r
- * @return Main Stack Pointer\r
- *\r
- * Return the current value of the MSP (main stack pointer)\r
- * Cortex processor register\r
- */\r
-__ASM uint32_t __get_MSP(void)\r
-{\r
- mrs r0, msp\r
- bx lr\r
-}\r
-\r
-/**\r
- * @brief Set the Main Stack Pointer\r
- *\r
- * @param topOfMainStack Main Stack Pointer\r
- *\r
- * Assign the value mainStackPointer to the MSP \r
- * (main stack pointer) Cortex processor register\r
- */\r
-__ASM void __set_MSP(uint32_t mainStackPointer)\r
-{\r
- msr msp, r0\r
- bx lr\r
-}\r
-\r
-/**\r
- * @brief Reverse byte order in unsigned short value\r
- *\r
- * @param value value to reverse\r
- * @return reversed value\r
- *\r
- * Reverse byte order in unsigned short value\r
- */\r
-__ASM uint32_t __REV16(uint16_t value)\r
-{\r
- rev16 r0, r0\r
- bx lr\r
-}\r
-\r
-/**\r
- * @brief Reverse byte order in signed short value with sign extension to integer\r
- *\r
- * @param value value to reverse\r
- * @return reversed value\r
- *\r
- * Reverse byte order in signed short value with sign extension to integer\r
- */\r
-__ASM int32_t __REVSH(int16_t value)\r
-{\r
- revsh r0, r0\r
- bx lr\r
-}\r
-\r
-\r
-#if (__ARMCC_VERSION < 400000)\r
-\r
-/**\r
- * @brief Remove the exclusive lock created by ldrex\r
- *\r
- * Removes the exclusive lock which is created by ldrex.\r
- */\r
-__ASM void __CLREX(void)\r
-{\r
- clrex\r
-}\r
-\r
-/**\r
- * @brief Return the Base Priority value\r
- *\r
- * @return BasePriority\r
- *\r
- * Return the content of the base priority register\r
- */\r
-__ASM uint32_t __get_BASEPRI(void)\r
-{\r
- mrs r0, basepri\r
- bx lr\r
-}\r
-\r
-/**\r
- * @brief Set the Base Priority value\r
- *\r
- * @param basePri BasePriority\r
- *\r
- * Set the base priority register\r
- */\r
-__ASM void __set_BASEPRI(uint32_t basePri)\r
-{\r
- msr basepri, r0\r
- bx lr\r
-}\r
-\r
-/**\r
- * @brief Return the Priority Mask value\r
- *\r
- * @return PriMask\r
- *\r
- * Return state of the priority mask bit from the priority mask register\r
- */\r
-__ASM uint32_t __get_PRIMASK(void)\r
-{\r
- mrs r0, primask\r
- bx lr\r
-}\r
-\r
-/**\r
- * @brief Set the Priority Mask value\r
- *\r
- * @param priMask PriMask\r
- *\r
- * Set the priority mask bit in the priority mask register\r
- */\r
-__ASM void __set_PRIMASK(uint32_t priMask)\r
-{\r
- msr primask, r0\r
- bx lr\r
-}\r
-\r
-/**\r
- * @brief Return the Fault Mask value\r
- *\r
- * @return FaultMask\r
- *\r
- * Return the content of the fault mask register\r
- */\r
-__ASM uint32_t __get_FAULTMASK(void)\r
-{\r
- mrs r0, faultmask\r
- bx lr\r
-}\r
-\r
-/**\r
- * @brief Set the Fault Mask value\r
- *\r
- * @param faultMask faultMask value\r
- *\r
- * Set the fault mask register\r
- */\r
-__ASM void __set_FAULTMASK(uint32_t faultMask)\r
-{\r
- msr faultmask, r0\r
- bx lr\r
-}\r
-\r
-/**\r
- * @brief Return the Control Register value\r
- * \r
- * @return Control value\r
- *\r
- * Return the content of the control register\r
- */\r
-__ASM uint32_t __get_CONTROL(void)\r
-{\r
- mrs r0, control\r
- bx lr\r
-}\r
-\r
-/**\r
- * @brief Set the Control Register value\r
- *\r
- * @param control Control value\r
- *\r
- * Set the control register\r
- */\r
-__ASM void __set_CONTROL(uint32_t control)\r
-{\r
- msr control, r0\r
- bx lr\r
-}\r
-\r
-#endif /* __ARMCC_VERSION */ \r
-\r
-\r
-\r
-#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/\r
-/* IAR iccarm specific functions */\r
-#pragma diag_suppress=Pe940\r
-\r
-/**\r
- * @brief Return the Process Stack Pointer\r
- *\r
- * @return ProcessStackPointer\r
- *\r
- * Return the actual process stack pointer\r
- */\r
-uint32_t __get_PSP(void)\r
-{\r
- __ASM("mrs r0, psp");\r
- __ASM("bx lr");\r
-}\r
-\r
-/**\r
- * @brief Set the Process Stack Pointer\r
- *\r
- * @param topOfProcStack Process Stack Pointer\r
- *\r
- * Assign the value ProcessStackPointer to the MSP \r
- * (process stack pointer) Cortex processor register\r
- */\r
-void __set_PSP(uint32_t topOfProcStack)\r
-{\r
- __ASM("msr psp, r0");\r
- __ASM("bx lr");\r
-}\r
-\r
-/**\r
- * @brief Return the Main Stack Pointer\r
- *\r
- * @return Main Stack Pointer\r
- *\r
- * Return the current value of the MSP (main stack pointer)\r
- * Cortex processor register\r
- */\r
-uint32_t __get_MSP(void)\r
-{\r
- __ASM("mrs r0, msp");\r
- __ASM("bx lr");\r
-}\r
-\r
-/**\r
- * @brief Set the Main Stack Pointer\r
- *\r
- * @param topOfMainStack Main Stack Pointer\r
- *\r
- * Assign the value mainStackPointer to the MSP \r
- * (main stack pointer) Cortex processor register\r
- */\r
-void __set_MSP(uint32_t topOfMainStack)\r
-{\r
- __ASM("msr msp, r0");\r
- __ASM("bx lr");\r
-}\r
-\r
-/**\r
- * @brief Reverse byte order in unsigned short value\r
- *\r
- * @param value value to reverse\r
- * @return reversed value\r
- *\r
- * Reverse byte order in unsigned short value\r
- */\r
-uint32_t __REV16(uint16_t value)\r
-{\r
- __ASM("rev16 r0, r0");\r
- __ASM("bx lr");\r
-}\r
-\r
-/**\r
- * @brief Reverse bit order of value\r
- *\r
- * @param value value to reverse\r
- * @return reversed value\r
- *\r
- * Reverse bit order of value\r
- */\r
-uint32_t __RBIT(uint32_t value)\r
-{\r
- __ASM("rbit r0, r0");\r
- __ASM("bx lr");\r
-}\r
-\r
-/**\r
- * @brief LDR Exclusive (8 bit)\r
- *\r
- * @param *addr address pointer\r
- * @return value of (*address)\r
- *\r
- * Exclusive LDR command for 8 bit values)\r
- */\r
-uint8_t __LDREXB(uint8_t *addr)\r
-{\r
- __ASM("ldrexb r0, [r0]");\r
- __ASM("bx lr"); \r
-}\r
-\r
-/**\r
- * @brief LDR Exclusive (16 bit)\r
- *\r
- * @param *addr address pointer\r
- * @return value of (*address)\r
- *\r
- * Exclusive LDR command for 16 bit values\r
- */\r
-uint16_t __LDREXH(uint16_t *addr)\r
-{\r
- __ASM("ldrexh r0, [r0]");\r
- __ASM("bx lr");\r
-}\r
-\r
-/**\r
- * @brief LDR Exclusive (32 bit)\r
- *\r
- * @param *addr address pointer\r
- * @return value of (*address)\r
- *\r
- * Exclusive LDR command for 32 bit values\r
- */\r
-uint32_t __LDREXW(uint32_t *addr)\r
-{\r
- __ASM("ldrex r0, [r0]");\r
- __ASM("bx lr");\r
-}\r
-\r
-/**\r
- * @brief STR Exclusive (8 bit)\r
- *\r
- * @param value value to store\r
- * @param *addr address pointer\r
- * @return successful / failed\r
- *\r
- * Exclusive STR command for 8 bit values\r
- */\r
-uint32_t __STREXB(uint8_t value, uint8_t *addr)\r
-{\r
- __ASM("strexb r0, r0, [r1]");\r
- __ASM("bx lr");\r
-}\r
-\r
-/**\r
- * @brief STR Exclusive (16 bit)\r
- *\r
- * @param value value to store\r
- * @param *addr address pointer\r
- * @return successful / failed\r
- *\r
- * Exclusive STR command for 16 bit values\r
- */\r
-uint32_t __STREXH(uint16_t value, uint16_t *addr)\r
-{\r
- __ASM("strexh r0, r0, [r1]");\r
- __ASM("bx lr");\r
-}\r
-\r
-/**\r
- * @brief STR Exclusive (32 bit)\r
- *\r
- * @param value value to store\r
- * @param *addr address pointer\r
- * @return successful / failed\r
- *\r
- * Exclusive STR command for 32 bit values\r
- */\r
-uint32_t __STREXW(uint32_t value, uint32_t *addr)\r
-{\r
- __ASM("strex r0, r0, [r1]");\r
- __ASM("bx lr");\r
-}\r
-\r
-#pragma diag_default=Pe940\r
-\r
-\r
-#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/\r
-/* GNU gcc specific functions */\r
-\r
-/**\r
- * @brief Return the Process Stack Pointer\r
- *\r
- * @return ProcessStackPointer\r
- *\r
- * Return the actual process stack pointer\r
- */\r
-uint32_t __get_PSP(void) __attribute__( ( naked ) );\r
-uint32_t __get_PSP(void)\r
-{\r
- uint32_t result=0;\r
-\r
- __ASM volatile ("MRS %0, psp\n\t" \r
- "MOV r0, %0 \n\t"\r
- "BX lr \n\t" : "=r" (result) );\r
- return(result);\r
-}\r
-\r
-/**\r
- * @brief Set the Process Stack Pointer\r
- *\r
- * @param topOfProcStack Process Stack Pointer\r
- *\r
- * Assign the value ProcessStackPointer to the MSP \r
- * (process stack pointer) Cortex processor register\r
- */\r
-void __set_PSP(uint32_t topOfProcStack) __attribute__( ( naked ) );\r
-void __set_PSP(uint32_t topOfProcStack)\r
-{\r
- __ASM volatile ("MSR psp, %0\n\t"\r
- "BX lr \n\t" : : "r" (topOfProcStack) );\r
-}\r
-\r
-/**\r
- * @brief Return the Main Stack Pointer\r
- *\r
- * @return Main Stack Pointer\r
- *\r
- * Return the current value of the MSP (main stack pointer)\r
- * Cortex processor register\r
- */\r
-uint32_t __get_MSP(void) __attribute__( ( naked ) );\r
-uint32_t __get_MSP(void)\r
-{\r
- uint32_t result=0;\r
-\r
- __ASM volatile ("MRS %0, msp\n\t" \r
- "MOV r0, %0 \n\t"\r
- "BX lr \n\t" : "=r" (result) );\r
- return(result);\r
-}\r
-\r
-/**\r
- * @brief Set the Main Stack Pointer\r
- *\r
- * @param topOfMainStack Main Stack Pointer\r
- *\r
- * Assign the value mainStackPointer to the MSP \r
- * (main stack pointer) Cortex processor register\r
- */\r
-void __set_MSP(uint32_t topOfMainStack) __attribute__( ( naked ) );\r
-void __set_MSP(uint32_t topOfMainStack)\r
-{\r
- __ASM volatile ("MSR msp, %0\n\t"\r
- "BX lr \n\t" : : "r" (topOfMainStack) );\r
-}\r
-\r
-/**\r
- * @brief Return the Base Priority value\r
- *\r
- * @return BasePriority\r
- *\r
- * Return the content of the base priority register\r
- */\r
-uint32_t __get_BASEPRI(void)\r
-{\r
- uint32_t result=0;\r
- \r
- __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );\r
- return(result);\r
-}\r
-\r
-/**\r
- * @brief Set the Base Priority value\r
- *\r
- * @param basePri BasePriority\r
- *\r
- * Set the base priority register\r
- */\r
-void __set_BASEPRI(uint32_t value)\r
-{\r
- __ASM volatile ("MSR basepri, %0" : : "r" (value) );\r
-}\r
-\r
-/**\r
- * @brief Return the Priority Mask value\r
- *\r
- * @return PriMask\r
- *\r
- * Return state of the priority mask bit from the priority mask register\r
- */\r
-uint32_t __get_PRIMASK(void)\r
-{\r
- uint32_t result=0;\r
-\r
- __ASM volatile ("MRS %0, primask" : "=r" (result) );\r
- return(result);\r
-}\r
-\r
-/**\r
- * @brief Set the Priority Mask value\r
- *\r
- * @param priMask PriMask\r
- *\r
- * Set the priority mask bit in the priority mask register\r
- */\r
-void __set_PRIMASK(uint32_t priMask)\r
-{\r
- __ASM volatile ("MSR primask, %0" : : "r" (priMask) );\r
-}\r
-\r
-/**\r
- * @brief Return the Fault Mask value\r
- *\r
- * @return FaultMask\r
- *\r
- * Return the content of the fault mask register\r
- */\r
-uint32_t __get_FAULTMASK(void)\r
-{\r
- uint32_t result=0;\r
- \r
- __ASM volatile ("MRS %0, faultmask" : "=r" (result) );\r
- return(result);\r
-}\r
-\r
-/**\r
- * @brief Set the Fault Mask value\r
- *\r
- * @param faultMask faultMask value\r
- *\r
- * Set the fault mask register\r
- */\r
-void __set_FAULTMASK(uint32_t faultMask)\r
-{\r
- __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );\r
-}\r
-\r
-/**\r
- * @brief Return the Control Register value\r
-* \r
-* @return Control value\r
- *\r
- * Return the content of the control register\r
- */\r
-uint32_t __get_CONTROL(void)\r
-{\r
- uint32_t result=0;\r
-\r
- __ASM volatile ("MRS %0, control" : "=r" (result) );\r
- return(result);\r
-}\r
-\r
-/**\r
- * @brief Set the Control Register value\r
- *\r
- * @param control Control value\r
- *\r
- * Set the control register\r
- */\r
-void __set_CONTROL(uint32_t control)\r
-{\r
- __ASM volatile ("MSR control, %0" : : "r" (control) );\r
-}\r
-\r
-\r
-/**\r
- * @brief Reverse byte order in integer value\r
- *\r
- * @param value value to reverse\r
- * @return reversed value\r
- *\r
- * Reverse byte order in integer value\r
- */\r
-uint32_t __REV(uint32_t value)\r
-{\r
- uint32_t result=0;\r
- \r
- __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );\r
- return(result);\r
-}\r
-\r
-/**\r
- * @brief Reverse byte order in unsigned short value\r
- *\r
- * @param value value to reverse\r
- * @return reversed value\r
- *\r
- * Reverse byte order in unsigned short value\r
- */\r
-uint32_t __REV16(uint16_t value)\r
-{\r
- uint32_t result=0;\r
- \r
- __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );\r
- return(result);\r
-}\r
-\r
-/**\r
- * @brief Reverse byte order in signed short value with sign extension to integer\r
- *\r
- * @param value value to reverse\r
- * @return reversed value\r
- *\r
- * Reverse byte order in signed short value with sign extension to integer\r
- */\r
-int32_t __REVSH(int16_t value)\r
-{\r
- uint32_t result=0;\r
- \r
- __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );\r
- return(result);\r
-}\r
-\r
-/**\r
- * @brief Reverse bit order of value\r
- *\r
- * @param value value to reverse\r
- * @return reversed value\r
- *\r
- * Reverse bit order of value\r
- */\r
-uint32_t __RBIT(uint32_t value)\r
-{\r
- uint32_t result=0;\r
- \r
- __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );\r
- return(result);\r
-}\r
-\r
-/**\r
- * @brief LDR Exclusive (8 bit)\r
- *\r
- * @param *addr address pointer\r
- * @return value of (*address)\r
- *\r
- * Exclusive LDR command for 8 bit value\r
- */\r
-uint8_t __LDREXB(uint8_t *addr)\r
-{\r
- uint8_t result=0;\r
- \r
- __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );\r
- return(result);\r
-}\r
-\r
-/**\r
- * @brief LDR Exclusive (16 bit)\r
- *\r
- * @param *addr address pointer\r
- * @return value of (*address)\r
- *\r
- * Exclusive LDR command for 16 bit values\r
- */\r
-uint16_t __LDREXH(uint16_t *addr)\r
-{\r
- uint16_t result=0;\r
- \r
- __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );\r
- return(result);\r
-}\r
-\r
-/**\r
- * @brief LDR Exclusive (32 bit)\r
- *\r
- * @param *addr address pointer\r
- * @return value of (*address)\r
- *\r
- * Exclusive LDR command for 32 bit values\r
- */\r
-uint32_t __LDREXW(uint32_t *addr)\r
-{\r
- uint32_t result=0;\r
- \r
- __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );\r
- return(result);\r
-}\r
-\r
-/**\r
- * @brief STR Exclusive (8 bit)\r
- *\r
- * @param value value to store\r
- * @param *addr address pointer\r
- * @return successful / failed\r
- *\r
- * Exclusive STR command for 8 bit values\r
- */\r
-uint32_t __STREXB(uint8_t value, uint8_t *addr)\r
-{\r
- uint32_t result=0;\r
- \r
- __ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );\r
- return(result);\r
-}\r
-\r
-/**\r
- * @brief STR Exclusive (16 bit)\r
- *\r
- * @param value value to store\r
- * @param *addr address pointer\r
- * @return successful / failed\r
- *\r
- * Exclusive STR command for 16 bit values\r
- */\r
-uint32_t __STREXH(uint16_t value, uint16_t *addr)\r
-{\r
- uint32_t result=0;\r
- \r
- __ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );\r
- return(result);\r
-}\r
-\r
-/**\r
- * @brief STR Exclusive (32 bit)\r
- *\r
- * @param value value to store\r
- * @param *addr address pointer\r
- * @return successful / failed\r
- *\r
- * Exclusive STR command for 32 bit values\r
- */\r
-uint32_t __STREXW(uint32_t value, uint32_t *addr)\r
-{\r
- uint32_t result=0;\r
- \r
- __ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );\r
- return(result);\r
-}\r
-\r
-\r
-#elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/\r
-/* TASKING carm specific functions */\r
-\r
-/*\r
- * The CMSIS functions have been implemented as intrinsics in the compiler.\r
- * Please use "carm -?i" to get an up to date list of all instrinsics,\r
- * Including the CMSIS ones.\r
- */\r
-\r
-#endif\r
projects / fw / stlink / blobdiff