--- /dev/null
+/**\r
+ ******************************************************************************\r
+ * @file stm32l1xx_syscfg.c\r
+ * @author MCD Application Team\r
+ * @version V1.0.0\r
+ * @date 31-December-2010\r
+ * @brief This file provides firmware functions to manage the following \r
+ * functionalities of the SYSCFG and RI peripherals: \r
+ * - SYSCFG Initialization and Configuration\r
+ * - RI Initialization and Configuration\r
+ *\r
+ * @verbatim\r
+ * \r
+ * ===================================================================\r
+ * How to use this driver\r
+ * ===================================================================\r
+ * \r
+ * This driver provides functions for:\r
+ * \r
+ * 1. Remapping the memory accessible in the code area using\r
+ * SYSCFG_MemoryRemapConfig() \r
+ * 2. Manage the EXTI lines connection to the GPIOs using\r
+ * SYSCFG_EXTILineConfig().\r
+ * 3. Routing of I/Os toward the input captures of timers (TIM2, TIM3 and TIM4).\r
+ * 4. Input routing of COMP1 and COMP2\r
+ * 5. Routing of internal reference voltage VREFINT to PB0 and PB1.\r
+ *\r
+ * 6. The RI registers can be accessed only when the comparator \r
+ * APB interface clock is enabled.\r
+ * To enable comparator clock use:\r
+ * RCC_APB1PeriphClockCmd(RCC_APB1Periph_COMP, ENABLE);\r
+ *\r
+ * Following functions uses RI registers:\r
+ * - SYSCFG_RIDeInit()\r
+ * - SYSCFG_RITIMSelect()\r
+ * - SYSCFG_RITIMInputCaptureConfig()\r
+ * - SYSCFG_RIResistorConfig()\r
+ * - SYSCFG_RIIOSwitchConfig()\r
+ * - SYSCFG_RISwitchControlModeCmd()\r
+ * - SYSCFG_RIHysteresisConfig()\r
+ *\r
+ * 7- The SYSCFG registers can be accessed only when the SYSCFG \r
+ * interface APB clock is enabled.\r
+ * To enable SYSCFG APB clock use:\r
+ * RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);\r
+ *\r
+ * Following functions uses SYSCFG registers:\r
+ * - SYSCFG_MemoryRemapConfig()\r
+ * - SYSCFG_USBPuCmd()\r
+ * - SYSCFG_EXTILineConfig()\r
+ * \r
+ * @endverbatim\r
+ * \r
+ ******************************************************************************\r
+ * @attention\r
+ *\r
+ * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS\r
+ * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE\r
+ * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY\r
+ * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING\r
+ * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE\r
+ * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.\r
+ *\r
+ * <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>\r
+ ****************************************************************************** \r
+ */ \r
+\r
+/* Includes ------------------------------------------------------------------*/\r
+#include "stm32l1xx_syscfg.h"\r
+#include "stm32l1xx_rcc.h"\r
+\r
+/** @addtogroup STM32L1xx_StdPeriph_Driver\r
+ * @{\r
+ */\r
+\r
+/** @defgroup SYSCFG \r
+ * @brief SYSCFG driver modules\r
+ * @{\r
+ */ \r
+\r
+/* Private typedef -----------------------------------------------------------*/\r
+/* Private define ------------------------------------------------------------*/\r
+#define TIM_SELECT_MASK ((uint32_t)0xFFFCFFFF) /*!< TIM select mask */\r
+#define IC_ROUTING_MASK ((uint32_t)0x0000000F) /*!< Input Capture routing mask */\r
+\r
+/* Private macro -------------------------------------------------------------*/\r
+/* Private variables ---------------------------------------------------------*/\r
+/* Private function prototypes -----------------------------------------------*/\r
+/* Private functions ---------------------------------------------------------*/\r
+\r
+/** @defgroup SYSCFG_Private_Functions\r
+ * @{\r
+ */ \r
+\r
+/** @defgroup SYSCFG_Group1 SYSCFG Initialization and Configuration functions\r
+ * @brief SYSCFG Initialization and Configuration functions \r
+ *\r
+@verbatim \r
+ ===============================================================================\r
+ SYSCFG Initialization and Configuration functions\r
+ =============================================================================== \r
+\r
+@endverbatim\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * @brief Deinitializes the SYSCFG registers to their default reset values.\r
+ * @param None\r
+ * @retval None\r
+ * @ Note: MEMRMP bits are not reset by APB2 reset.\r
+ */\r
+void SYSCFG_DeInit(void)\r
+{\r
+ RCC_APB2PeriphResetCmd(RCC_APB2Periph_SYSCFG, ENABLE);\r
+ RCC_APB2PeriphResetCmd(RCC_APB2Periph_SYSCFG, DISABLE);\r
+}\r
+\r
+/**\r
+ * @brief Deinitializes the RI registers to their default reset values.\r
+ * @param None\r
+ * @retval None\r
+ */\r
+void SYSCFG_RIDeInit(void)\r
+{\r
+ RI->ICR = ((uint32_t)0x00000000); /*!< Set RI->ICR to reset value */\r
+ RI->ASCR1 = ((uint32_t)0x00000000); /*!< Set RI->ASCR1 to reset value */ \r
+ RI->ASCR2 = ((uint32_t)0x00000000); /*!< Set RI->ASCR2 to reset value */ \r
+ RI->HYSCR1 = ((uint32_t)0x00000000); /*!< Set RI->HYSCR1 to reset value */\r
+ RI->HYSCR2 = ((uint32_t)0x00000000); /*!< Set RI->HYSCR2 to reset value */\r
+ RI->HYSCR3 = ((uint32_t)0x00000000); /*!< Set RI->HYSCR3 to reset value */\r
+}\r
+\r
+/**\r
+ * @brief Changes the mapping of the specified memory.\r
+ * @param SYSCFG_Memory: selects the memory remapping.\r
+ * This parameter can be one of the following values:\r
+ * @arg SYSCFG_MemoryRemap_Flash: Main Flash memory mapped at 0x00000000 \r
+ * @arg SYSCFG_MemoryRemap_SystemFlash: System Flash memory mapped at 0x00000000\r
+ * @arg SYSCFG_MemoryRemap_SRAM: Embedded SRAM mapped at 0x00000000 \r
+ * @retval None\r
+ */\r
+void SYSCFG_MemoryRemapConfig(uint8_t SYSCFG_MemoryRemap)\r
+{\r
+ /* Check the parameters */\r
+ assert_param(IS_SYSCFG_MEMORY_REMAP_CONFING(SYSCFG_MemoryRemap));\r
+ SYSCFG->MEMRMP = SYSCFG_MemoryRemap;\r
+}\r
+\r
+/**\r
+ * @brief Control the internal pull-up on USB DP line.\r
+ * @param NewState: New state of the internal pull-up on USB DP line. \r
+ * This parameter can be ENABLE: Connect internal pull-up on USB DP line.\r
+ * or DISABLE: Disconnect internal pull-up on USB DP line.\r
+ * @retval None\r
+ */\r
+void SYSCFG_USBPuCmd(FunctionalState NewState)\r
+{\r
+ /* Check the parameters */\r
+ assert_param(IS_FUNCTIONAL_STATE(NewState));\r
+\r
+ if (NewState != DISABLE)\r
+ { \r
+ /* Connect internal pull-up on USB DP line */\r
+ SYSCFG->PMC |= (uint32_t) SYSCFG_PMC_USB_PU;\r
+ }\r
+ else\r
+ {\r
+ /* Disconnect internal pull-up on USB DP line */\r
+ SYSCFG->PMC &= (uint32_t)(~SYSCFG_PMC_USB_PU);\r
+ }\r
+}\r
+\r
+/**\r
+ * @brief Selects the GPIO pin used as EXTI Line.\r
+ * @param EXTI_PortSourceGPIOx : selects the GPIO port to be used as source \r
+ * for EXTI lines where x can be (A, B, C, D, E or H).\r
+ * @param EXTI_PinSourcex: specifies the EXTI line to be configured.\r
+ * This parameter can be EXTI_PinSourcex where x can be (0..15)\r
+ * @retval None\r
+ */\r
+void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex)\r
+{\r
+ uint32_t tmp = 0x00;\r
+\r
+ /* Check the parameters */\r
+ assert_param(IS_EXTI_PORT_SOURCE(EXTI_PortSourceGPIOx));\r
+ assert_param(IS_EXTI_PIN_SOURCE(EXTI_PinSourcex));\r
+ \r
+ tmp = ((uint32_t)0x0F) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03));\r
+ SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] &= ~tmp;\r
+ SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] |= (((uint32_t)EXTI_PortSourceGPIOx) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03)));\r
+}\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SYSCFG_Group2 RI Initialization and Configuration functions\r
+ * @brief RI Initialization and Configuration functions\r
+ *\r
+@verbatim \r
+ ===============================================================================\r
+ RI Initialization and Configuration functions\r
+ =============================================================================== \r
+\r
+@endverbatim\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * @brief Configures the routing interface to select which Timer to be routed.\r
+ * @note Routing capability can be applied only on one of the three timers\r
+ * (TIM2, TIM3 or TIM4) at a time.\r
+ * @param TIM_Select: Timer select.\r
+ * This parameter can be one of the following values:\r
+ * @arg TIM_Select_None: No timer selected and default Timer mapping is enabled.\r
+ * @arg TIM_Select_TIM2: Timer 2 Input Captures to be routed.\r
+ * @arg TIM_Select_TIM3: Timer 3 Input Captures to be routed.\r
+ * @arg TIM_Select_TIM4: Timer 4 Input Captures to be routed.\r
+ * @retval None.\r
+ */\r
+void SYSCFG_RITIMSelect(uint32_t TIM_Select)\r
+{\r
+ uint32_t tmpreg = 0;\r
+\r
+ /* Check the parameters */\r
+ assert_param(IS_RI_TIM(TIM_Select));\r
+\r
+ /* Get the old register value */\r
+ tmpreg = RI->ICR;\r
+\r
+ /* Clear the TIMx select bits */\r
+ tmpreg &= TIM_SELECT_MASK;\r
+\r
+ /* Select the Timer */\r
+ tmpreg |= (TIM_Select);\r
+\r
+ /* Write to RI->ICR register */\r
+ RI->ICR = tmpreg;\r
+}\r
+\r
+/**\r
+ * @brief Configures the routing interface to map Input Capture 1, 2, 3 or 4\r
+ * to a selected I/O pin.\r
+ * @param RI_InputCapture selects which input capture to be routed.\r
+ * This parameter can be one (or combination) of the following parameters:\r
+ * @arg RI_InputCapture_IC1: Input capture 1 is selected.\r
+ * @arg RI_InputCapture_IC2: Input capture 2 is selected.\r
+ * @arg RI_InputCapture_IC3: Input capture 3 is selected.\r
+ * @arg RI_InputCapture_IC4: Input capture 4 is selected.\r
+ * @param RI_InputCaptureRouting: selects which pin to be routed to Input Capture.\r
+ * This parameter can be one of the following values:\r
+ * @arg RI_InputCaptureRouting_0 to RI_InputCaptureRouting_15\r
+ * e.g.\r
+ * SYSCFG_RITIMSelect(TIM_Select_TIM2)\r
+ * SYSCFG_RITIMInputCaptureConfig(RI_InputCapture_IC1, RI_InputCaptureRouting_1)\r
+ * allows routing of Input capture IC1 of TIM2 to PA4.\r
+ * For details about correspondence between RI_InputCaptureRouting_x \r
+ * and I/O pins refer to the parameters' description in the header file\r
+ * or refer to the product reference manual.\r
+ * @note Input capture selection bits are not reset by this function.\r
+ * To reset input capture selection bits, use SYSCFG_RIDeInit() function.\r
+ * @note The I/O should be configured in alternate function mode (AF14) using\r
+ * GPIO_PinAFConfig() function.\r
+ * @retval None.\r
+ */\r
+void SYSCFG_RITIMInputCaptureConfig(uint32_t RI_InputCapture, uint32_t RI_InputCaptureRouting)\r
+{\r
+ uint32_t tmpreg = 0;\r
+\r
+ /* Check the parameters */\r
+ assert_param(IS_RI_INPUTCAPTURE(RI_InputCapture));\r
+ assert_param(IS_RI_INPUTCAPTURE_ROUTING(RI_InputCaptureRouting));\r
+\r
+ /* Get the old register value */\r
+ tmpreg = RI->ICR;\r
+\r
+ /* Select input captures to be routed */\r
+ tmpreg |= (RI_InputCapture);\r
+\r
+ if((RI_InputCapture & RI_InputCapture_IC1) == RI_InputCapture_IC1)\r
+ {\r
+ /* Clear the input capture select bits */\r
+ tmpreg &= (uint32_t)(~IC_ROUTING_MASK);\r
+\r
+ /* Set RI_InputCaptureRouting bits */\r
+ tmpreg |= (uint32_t)( RI_InputCaptureRouting);\r
+ }\r
+\r
+ if((RI_InputCapture & RI_InputCapture_IC2) == RI_InputCapture_IC2)\r
+ {\r
+ /* Clear the input capture select bits */\r
+ tmpreg &= (uint32_t)(~(IC_ROUTING_MASK << 4));\r
+\r
+ /* Set RI_InputCaptureRouting bits */\r
+ tmpreg |= (uint32_t)( (RI_InputCaptureRouting << 4)); \r
+ }\r
+\r
+ if((RI_InputCapture & RI_InputCapture_IC3) == RI_InputCapture_IC3)\r
+ {\r
+ /* Clear the input capture select bits */\r
+ tmpreg &= (uint32_t)(~(IC_ROUTING_MASK << 8));\r
+\r
+ /* Set RI_InputCaptureRouting bits */\r
+ tmpreg |= (uint32_t)( (RI_InputCaptureRouting << 8)); \r
+ }\r
+\r
+ if((RI_InputCapture & RI_InputCapture_IC4) == RI_InputCapture_IC4)\r
+ {\r
+ /* Clear the input capture select bits */\r
+ tmpreg &= (uint32_t)(~(IC_ROUTING_MASK << 12));\r
+\r
+ /* Set RI_InputCaptureRouting bits */\r
+ tmpreg |= (uint32_t)( (RI_InputCaptureRouting << 12)); \r
+ }\r
+\r
+ /* Write to RI->ICR register */\r
+ RI->ICR = tmpreg;\r
+}\r
+/**\r
+ * @brief Configures the Pull-up and Pull-down Resistors \r
+ * @param RI_Resistor selects the resistor to connect. \r
+ * This parameter can be one of the following values:\r
+ * @arg RI_Resistor_10KPU: 10K pull-up resistor\r
+ * @arg RI_Resistor_400KPU: 400K pull-up resistor \r
+ * @arg RI_Resistor_10KPD: 10K pull-down resistor \r
+ * @arg RI_Resistor_400KPD: 400K pull-down resistor\r
+ * @param NewState: New state of the analog switch associated to the selected \r
+ * resistor.\r
+ * This parameter can be:\r
+ * ENABLE so the selected resistor is connected\r
+ * or DISABLE so the selected resistor is disconnected\r
+ * @note To avoid extra power consumption, only one resistor should be enabled\r
+ * at a time. \r
+ * @retval None\r
+ */\r
+void SYSCFG_RIResistorConfig(uint32_t RI_Resistor, FunctionalState NewState)\r
+{\r
+ /* Check the parameters */\r
+ assert_param(IS_RI_RESISTOR(RI_Resistor));\r
+ assert_param(IS_FUNCTIONAL_STATE(NewState));\r
+ \r
+ if (NewState != DISABLE)\r
+ {\r
+ /* Enable the resistor */\r
+ COMP->CSR |= (uint32_t) RI_Resistor;\r
+ }\r
+ else\r
+ {\r
+ /* Disable the Resistor */\r
+ COMP->CSR &= (uint32_t) (~RI_Resistor);\r
+ }\r
+}\r
+\r
+/**\r
+ * @brief Close or Open the routing interface Input Output switches.\r
+ * @param RI_IOSwitch: selects the I/O analog switch number.\r
+ * This parameter can be one of the following values:\r
+ * @arg RI_IOSwitch_CH0 --> RI_IOSwitch_CH15\r
+ * @arg RI_IOSwitch_CH18 --> RI_IOSwitch_CH25\r
+ * @arg RI_IOSwitch_GR10_1 --> RI_IOSwitch_GR10_4\r
+ * @arg RI_IOSwitch_GR6_1 --> RI_IOSwitch_GR6_2\r
+ * @arg RI_IOSwitch_GR5_1 --> RI_IOSwitch_GR5_3\r
+ * @arg RI_IOSwitch_GR4_1 --> RI_IOSwitch_GR4_3\r
+ * @arg RI_IOSwitch_VCOMP\r
+ * @param NewState: New state of the analog switch. \r
+ * This parameter can be \r
+ * ENABLE so the Input Output switch is closed\r
+ * or DISABLE so the Input Output switch is open\r
+ * @retval None\r
+ */\r
+void SYSCFG_RIIOSwitchConfig(uint32_t RI_IOSwitch, FunctionalState NewState)\r
+{\r
+ uint32_t ioswitchmask = 0;\r
+ \r
+ /* Check the parameters */\r
+ assert_param(IS_RI_IOSWITCH(RI_IOSwitch));\r
+ \r
+ /* Read Analog switch register index */\r
+ ioswitchmask = RI_IOSwitch >> 31;\r
+ \r
+ /* Get Bits[30:0] of the IO switch */\r
+ RI_IOSwitch &= 0x7FFFFFFF;\r
+ \r
+ \r
+ if (NewState != DISABLE)\r
+ { \r
+ if (ioswitchmask != 0)\r
+ {\r
+ /* Close the analog switches */\r
+ RI->ASCR1 |= RI_IOSwitch;\r
+ }\r
+ else\r
+ {\r
+ /* Open the analog switches */\r
+ RI->ASCR2 |= RI_IOSwitch;\r
+ }\r
+ }\r
+ else\r
+ {\r
+ if (ioswitchmask != 0)\r
+ {\r
+ /* Close the analog switches */\r
+ RI->ASCR1 &= (~ (uint32_t)RI_IOSwitch);\r
+ }\r
+ else\r
+ {\r
+ /* Open the analog switches */\r
+ RI->ASCR2 &= (~ (uint32_t)RI_IOSwitch);\r
+ }\r
+ }\r
+}\r
+\r
+/**\r
+ * @brief Enable or disable the switch control mode.\r
+ * @param NewState: New state of the switch control mode. This parameter can\r
+ * be ENABLE: ADC analog switches closed if the corresponding \r
+ * I/O switch is also closed.\r
+ * When using COMP1 switch control mode must be enabled.\r
+ * or DISABLE: ADC analog switches open or controlled by the ADC interface.\r
+ * When using the ADC for acquisition switch control mode \r
+ * must be disabled.\r
+ * @note COMP1 comparator and ADC cannot be used at the same time since \r
+ * they share the ADC switch matrix.\r
+ * @retval None\r
+ */\r
+void SYSCFG_RISwitchControlModeCmd(FunctionalState NewState)\r
+{\r
+ /* Check the parameters */\r
+ assert_param(IS_FUNCTIONAL_STATE(NewState)); \r
+ \r
+ if (NewState != DISABLE)\r
+ { \r
+ /* Enable the Switch control mode */ \r
+ RI->ASCR1 |= (uint32_t) RI_ASCR1_SCM;\r
+ }\r
+ else\r
+ {\r
+ /* Disable the Switch control mode */ \r
+ RI->ASCR1 &= (uint32_t)(~RI_ASCR1_SCM);\r
+ }\r
+}\r
+\r
+/**\r
+ * @brief Enable or disable Hysteresis of the input schmitt triger of Ports A..E\r
+ * When the I/Os are programmed in input mode by standard I/O port \r
+ * registers, the Schmitt trigger and the hysteresis are enabled by default. \r
+ * When hysteresis is disabled, it is possible to read the \r
+ * corresponding port with a trigger level of VDDIO/2. \r
+ * @param RI_Port: selects the GPIO Port.\r
+ * This parameter can be one of the following values:\r
+ * @arg RI_PortA : Port A is selected\r
+ * @arg RI_PortB : Port B is selected\r
+ * @arg RI_PortC : Port C is selected\r
+ * @arg RI_PortD : Port D is selected\r
+ * @arg RI_PortE : Port E is selected\r
+ * @param RI_Pin : Selects the pin(s) on which to enable or disable hysteresis.\r
+ * This parameter can any value from RI_Pin_x where x can be (0..15) or RI_Pin_All.\r
+ * @param NewState new state of the Hysteresis.\r
+ * This parameter can be:\r
+ * ENABLE so the Hysteresis is on\r
+ * or DISABLE so the Hysteresis is off\r
+ * @retval None\r
+ */\r
+void SYSCFG_RIHysteresisConfig(uint8_t RI_Port, uint16_t RI_Pin,\r
+ FunctionalState NewState)\r
+{\r
+ /* Check the parameters */\r
+ assert_param(IS_RI_PORT(RI_Port));\r
+ assert_param(IS_RI_PIN(RI_Pin));\r
+ assert_param(IS_FUNCTIONAL_STATE(NewState));\r
+ \r
+ if(RI_Port == RI_PortA)\r
+ { \r
+ if (NewState != DISABLE)\r
+ {\r
+ /* Hysteresis on */\r
+ RI->HYSCR1 &= (uint32_t)~((uint32_t)RI_Pin);\r
+ }\r
+ else\r
+ {\r
+ /* Hysteresis off */\r
+ RI->HYSCR1 |= (uint32_t) RI_Pin;\r
+ }\r
+ }\r
+ \r
+ else if(RI_Port == RI_PortB)\r
+ {\r
+ \r
+ if (NewState != DISABLE)\r
+ {\r
+ /* Hysteresis on */\r
+ RI->HYSCR1 &= (uint32_t) (~((uint32_t)RI_Pin) << 16);\r
+ }\r
+ else\r
+ {\r
+ /* Hysteresis off */\r
+ RI->HYSCR1 |= (uint32_t) ((uint32_t)(RI_Pin) << 16);\r
+ }\r
+ } \r
+ \r
+ else if(RI_Port == RI_PortC)\r
+ {\r
+ \r
+ if (NewState != DISABLE)\r
+ {\r
+ /* Hysteresis on */\r
+ RI->HYSCR2 &= (uint32_t) (~((uint32_t)RI_Pin));\r
+ }\r
+ else\r
+ {\r
+ /* Hysteresis off */\r
+ RI->HYSCR2 |= (uint32_t) (RI_Pin );\r
+ }\r
+ } \r
+ else if(RI_Port == RI_PortD)\r
+ {\r
+ if (NewState != DISABLE)\r
+ {\r
+ /* Hysteresis on */\r
+ RI->HYSCR2 &= (uint32_t) (~((uint32_t)RI_Pin) << 16);\r
+ }\r
+ else\r
+ {\r
+ /* Hysteresis off */\r
+ RI->HYSCR2 |= (uint32_t) ((uint32_t)(RI_Pin) << 16);\r
+\r
+ }\r
+ } \r
+ else /* RI_Port == RI_PortE */\r
+ {\r
+ if (NewState != DISABLE)\r
+ {\r
+ /* Hysteresis on */\r
+ RI->HYSCR3 &= (uint32_t) (~((uint32_t)RI_Pin));\r
+ }\r
+ else\r
+ {\r
+ /* Hysteresis off */\r
+ RI->HYSCR3 |= (uint32_t) (RI_Pin );\r
+ }\r
+ } \r
+}\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */ \r
+\r
+/**\r
+ * @}\r
+ */ \r
+\r
+/**\r
+ * @}\r
+ */ \r
+/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/ \r
projects / fw / stlink / blobdiff