--- /dev/null
+/**\r
+ ******************************************************************************\r
+ * @file stm32l1xx_lcd.c\r
+ * @author MCD Application Team\r
+ * @version V1.0.0\r
+ * @date 31-December-2010\r
+ * @brief This file provides firmware functions to manage the following \r
+ * functionalities of the LCD controller (LCD) peripheral: \r
+ * - Initialization and configuration\r
+ * - LCD RAM memory write\r
+ * - Interrupts and flags management \r
+ * \r
+ * @verbatim\r
+ * \r
+ * =================================================================== \r
+ * LCD Clock\r
+ * =================================================================== \r
+ * LCDCLK is the same as RTCCLK. \r
+ * To configure the RTCCLK/LCDCLK, proceed as follows:\r
+ * - Enable the Power Controller (PWR) APB1 interface clock using the\r
+ * RCC_APB1PeriphClockCmd() function.\r
+ * - Enable access to RTC domain using the PWR_RTCAccessCmd() function.\r
+ * - Select the RTC clock source using the RCC_RTCCLKConfig() function. \r
+ * \r
+ * The frequency generator allows you to achieve various LCD frame rates \r
+ * starting from an LCD input clock frequency (LCDCLK) which can vary \r
+ * from 32 kHz up to 1 MHz.\r
+ * \r
+ * =================================================================== \r
+ * LCD and low power modes\r
+ * =================================================================== \r
+ * The LCD still active during STOP mode.\r
+ * \r
+ * ===================================================================\r
+ * How to use this driver\r
+ * =================================================================== \r
+ * 1. Enable LCD clock using RCC_APB1PeriphClockCmd(RCC_APB1Periph_LCD, ENABLE) function\r
+ * \r
+ * 2. Configure the LCD prescaler, divider, duty, bias and voltage source\r
+ * using LCD_Init() function \r
+ * \r
+ * 3. Optionally you can enable/configure:\r
+ * - LCD High Drive using the LCD_HighDriveCmd() function\r
+ * - LCD High Drive using the LCD_MuxSegmentCmd() function \r
+ * - LCD Pulse ON Duration using the LCD_PulseOnDurationConfig() function\r
+ * - LCD Dead Time using the LCD_DeadTimeConfig() function \r
+ * - The LCD Blink mode and frequency using the LCD_BlinkConfig() function\r
+ * - The LCD Contrast using the LCD_ContrastConfig() function \r
+ *\r
+ * 4. Call the LCD_WaitForSynchro() function to wait for LCD_FCR register\r
+ * synchronization.\r
+ * \r
+ * 5. Call the LCD_Cmd() to enable the LCD controller\r
+ * \r
+ * 6. Wait until the LCD Controller status is enabled and the step-up\r
+ * converter is ready using the LCD_GetFlagStatus() and\r
+ * LCD_FLAG_ENS and LCD_FLAG_RDY flags. \r
+ * \r
+ * 7. Write to the LCD RAM memory using the LCD_Write() function.\r
+ * \r
+ * 8. Request an update display using the LCD_UpdateDisplayRequest()\r
+ * function.\r
+ * \r
+ * 9. Wait until the update display is finished by checking the UDD\r
+ * flag status using the LCD_GetFlagStatus(LCD_FLAG_UDD)\r
+ * \r
+ * \r
+ * @endverbatim\r
+ * \r
+ ******************************************************************************\r
+ * @attention\r
+ *\r
+ * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS\r
+ * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE\r
+ * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY\r
+ * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING\r
+ * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE\r
+ * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.\r
+ *\r
+ * <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>\r
+ ****************************************************************************** \r
+ */ \r
+\r
+/* Includes ------------------------------------------------------------------*/\r
+#include "stm32l1xx_lcd.h"\r
+#include "stm32l1xx_rcc.h"\r
+\r
+/** @addtogroup STM32L1xx_StdPeriph_Driver\r
+ * @{\r
+ */\r
+\r
+/** @defgroup LCD \r
+ * @brief LCD driver modules\r
+ * @{\r
+ */\r
+\r
+/* Private typedef -----------------------------------------------------------*/\r
+/* Private define ------------------------------------------------------------*/\r
+/* ------------ LCD registers bit address in the alias region --------------- */\r
+#define LCD_OFFSET (LCD_BASE - PERIPH_BASE)\r
+\r
+/* --- CR Register ---*/\r
+\r
+/* Alias word address of LCDEN bit */\r
+#define CR_OFFSET (LCD_OFFSET + 0x00)\r
+#define LCDEN_BitNumber 0x00\r
+#define CR_LCDEN_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (LCDEN_BitNumber * 4))\r
+\r
+/* Alias word address of MUX_SEG bit */\r
+#define MUX_SEG_BitNumber 0x07\r
+#define CR_MUX_SEG_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (MUX_SEG_BitNumber * 4))\r
+\r
+\r
+/* --- FCR Register ---*/\r
+\r
+/* Alias word address of HD bit */\r
+#define FCR_OFFSET (LCD_OFFSET + 0x04)\r
+#define HD_BitNumber 0x00\r
+#define FCR_HD_BB (PERIPH_BB_BASE + (FCR_OFFSET * 32) + (HD_BitNumber * 4))\r
+\r
+/* --- SR Register ---*/\r
+\r
+/* Alias word address of UDR bit */\r
+#define SR_OFFSET (LCD_OFFSET + 0x08)\r
+#define UDR_BitNumber 0x02\r
+#define SR_UDR_BB (PERIPH_BB_BASE + (SR_OFFSET * 32) + (UDR_BitNumber * 4))\r
+\r
+#define FCR_MASK ((uint32_t)0xFC03FFFF) /* LCD FCR Mask */\r
+#define CR_MASK ((uint32_t)0xFFFFFF81) /* LCD CR Mask */\r
+#define PON_MASK ((uint32_t)0xFFFFFF8F) /* LCD PON Mask */\r
+#define DEAD_MASK ((uint32_t)0xFFFFFC7F) /* LCD DEAD Mask */\r
+#define BLINK_MASK ((uint32_t)0xFFFC1FFF) /* LCD BLINK Mask */\r
+#define CONTRAST_MASK ((uint32_t)0xFFFFE3FF) /* LCD CONTRAST Mask */\r
+\r
+/* Private macro -------------------------------------------------------------*/\r
+/* Private variables ---------------------------------------------------------*/\r
+/* Private function prototypes -----------------------------------------------*/\r
+/* Private functions ---------------------------------------------------------*/\r
+\r
+/** @defgroup LCD_Private_Functions\r
+ * @{\r
+ */\r
+\r
+/** @defgroup LCD_Group1 Initialization and Configuration functions\r
+ * @brief Initialization and Configuration functions \r
+ *\r
+@verbatim \r
+ ===============================================================================\r
+ Initialization and Configuration functions\r
+ =============================================================================== \r
+\r
+@endverbatim\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * @brief Deinitializes the LCD peripheral registers to their default reset \r
+ * values.\r
+ * @param None\r
+ * @retval None\r
+ */\r
+void LCD_DeInit(void)\r
+{\r
+ /* Enable LCD reset state */\r
+ RCC_APB1PeriphResetCmd(RCC_APB1Periph_LCD, ENABLE);\r
+ /* Release LCD from reset state */\r
+ RCC_APB1PeriphResetCmd(RCC_APB1Periph_LCD, DISABLE);\r
+}\r
+\r
+/**\r
+ * @brief Initializes the LCD peripheral according to the specified parameters \r
+ * in the LCD_InitStruct.\r
+ * @note This function can be used only when the LCD is disabled. \r
+ * @param LCD_InitStruct: pointer to a LCD_InitTypeDef structure that contains \r
+ * the configuration information for the specified LCD peripheral.\r
+ * @retval None\r
+ */\r
+void LCD_Init(LCD_InitTypeDef* LCD_InitStruct)\r
+{\r
+ /* Check function parameters */\r
+ assert_param(IS_LCD_PRESCALER(LCD_InitStruct->LCD_Prescaler));\r
+ assert_param(IS_LCD_DIVIDER(LCD_InitStruct->LCD_Divider));\r
+ assert_param(IS_LCD_DUTY(LCD_InitStruct->LCD_Duty));\r
+ assert_param(IS_LCD_BIAS(LCD_InitStruct->LCD_Bias)); \r
+ assert_param(IS_LCD_VOLTAGE_SOURCE(LCD_InitStruct->LCD_VoltageSource));\r
+\r
+ LCD->FCR &= (uint32_t)FCR_MASK;\r
+ LCD->FCR |= (uint32_t)(LCD_InitStruct->LCD_Prescaler | LCD_InitStruct->LCD_Divider);\r
+\r
+ LCD_WaitForSynchro();\r
+\r
+ LCD->CR &= (uint32_t)CR_MASK;\r
+ LCD->CR |= (uint32_t)(LCD_InitStruct->LCD_Duty | LCD_InitStruct->LCD_Bias | \\r
+ LCD_InitStruct->LCD_VoltageSource);\r
+\r
+}\r
+\r
+/**\r
+ * @brief Fills each LCD_InitStruct member with its default value.\r
+ * @param LCD_InitStruct: pointer to a LCD_InitTypeDef structure which will \r
+ * be initialized.\r
+ * @retval None\r
+ */\r
+void LCD_StructInit(LCD_InitTypeDef* LCD_InitStruct)\r
+{\r
+/*--------------- Reset LCD init structure parameters values -----------------*/\r
+ LCD_InitStruct->LCD_Prescaler = LCD_Prescaler_1; /*!< Initialize the LCD_Prescaler member */\r
+ \r
+ LCD_InitStruct->LCD_Divider = LCD_Divider_16; /*!< Initialize the LCD_Divider member */\r
+ \r
+ LCD_InitStruct->LCD_Duty = LCD_Duty_Static; /*!< Initialize the LCD_Duty member */\r
+ \r
+ LCD_InitStruct->LCD_Bias = LCD_Bias_1_4; /*!< Initialize the LCD_Bias member */\r
+ \r
+ LCD_InitStruct->LCD_VoltageSource = LCD_VoltageSource_Internal; /*!< Initialize the LCD_VoltageSource member */\r
+}\r
+\r
+/**\r
+ * @brief Enables or disables the LCD Controller.\r
+ * @param NewState: new state of the LCD peripheral.\r
+ * This parameter can be: ENABLE or DISABLE.\r
+ * @retval None\r
+ */\r
+void LCD_Cmd(FunctionalState NewState)\r
+{\r
+ assert_param(IS_FUNCTIONAL_STATE(NewState));\r
+\r
+ /* Check the parameters */\r
+ assert_param(IS_FUNCTIONAL_STATE(NewState));\r
+\r
+ *(__IO uint32_t *) CR_LCDEN_BB = (uint32_t)NewState;\r
+}\r
+\r
+/**\r
+ * @brief Waits until the LCD FCR register is synchronized in the LCDCLK domain.\r
+ * This function must be called after any write operation to LCD_FCR register.\r
+ * @param None\r
+ * @retval None\r
+ */\r
+void LCD_WaitForSynchro(void)\r
+{\r
+ /* Loop until FCRSF flag is set */\r
+ while ((LCD->SR & LCD_FLAG_FCRSF) == (uint32_t)RESET)\r
+ {\r
+ }\r
+}\r
+\r
+/**\r
+ * @brief Enables or disables the low resistance divider. Displays with high \r
+ * internal resistance may need a longer drive time to achieve \r
+ * satisfactory contrast. This function is useful in this case if some \r
+ * additional power consumption can be tolerated.\r
+ * @note When this mode is enabled, the PulseOn Duration (PON) have to be \r
+ * programmed to 1/CK_PS (LCD_PulseOnDuration_1). \r
+ * @param NewState: new state of the low resistance divider.\r
+ * This parameter can be: ENABLE or DISABLE.\r
+ * @retval None\r
+ */\r
+void LCD_HighDriveCmd(FunctionalState NewState)\r
+{\r
+ /* Check the parameters */\r
+ assert_param(IS_FUNCTIONAL_STATE(NewState));\r
+\r
+ *(__IO uint32_t *) FCR_HD_BB = (uint32_t)NewState;\r
+}\r
+\r
+/**\r
+ * @brief Enables or disables the Mux Segment.\r
+ * @note This function can be used only when the LCD is disabled. \r
+ * @param NewState: new state of the Mux Segment.\r
+ * This parameter can be: ENABLE or DISABLE.\r
+ * @retval None\r
+ */\r
+void LCD_MuxSegmentCmd(FunctionalState NewState)\r
+{\r
+ /* Check the parameters */\r
+ assert_param(IS_FUNCTIONAL_STATE(NewState));\r
+\r
+ *(__IO uint32_t *) CR_MUX_SEG_BB = (uint32_t)NewState;\r
+}\r
+\r
+/**\r
+ * @brief Configures the LCD pulses on duration.\r
+ * @param LCD_PulseOnDuration: specifies the LCD pulse on duration in terms of \r
+ * CK_PS (prescaled LCD clock period) pulses.\r
+ * This parameter can be one of the following values:\r
+ * @arg LCD_PulseOnDuration_0: 0 pulse\r
+ * @arg LCD_PulseOnDuration_1: Pulse ON duration = 1/CK_PS\r
+ * @arg LCD_PulseOnDuration_2: Pulse ON duration = 2/CK_PS\r
+ * @arg LCD_PulseOnDuration_3: Pulse ON duration = 3/CK_PS\r
+ * @arg LCD_PulseOnDuration_4: Pulse ON duration = 4/CK_PS\r
+ * @arg LCD_PulseOnDuration_5: Pulse ON duration = 5/CK_PS\r
+ * @arg LCD_PulseOnDuration_6: Pulse ON duration = 6/CK_PS\r
+ * @arg LCD_PulseOnDuration_7: Pulse ON duration = 7/CK_PS\r
+ * @retval None\r
+ */\r
+void LCD_PulseOnDurationConfig(uint32_t LCD_PulseOnDuration)\r
+{\r
+ /* Check the parameters */\r
+ assert_param(IS_LCD_PULSE_ON_DURATION(LCD_PulseOnDuration));\r
+\r
+ LCD->FCR &= (uint32_t)PON_MASK;\r
+ LCD->FCR |= (uint32_t)(LCD_PulseOnDuration);\r
+}\r
+\r
+/**\r
+ * @brief Configures the LCD dead time.\r
+ * @param LCD_DeadTime: specifies the LCD dead time.\r
+ * This parameter can be one of the following values:\r
+ * @arg LCD_DeadTime_0: No dead Time\r
+ * @arg LCD_DeadTime_1: One Phase between different couple of Frame\r
+ * @arg LCD_DeadTime_2: Two Phase between different couple of Frame\r
+ * @arg LCD_DeadTime_3: Three Phase between different couple of Frame\r
+ * @arg LCD_DeadTime_4: Four Phase between different couple of Frame\r
+ * @arg LCD_DeadTime_5: Five Phase between different couple of Frame\r
+ * @arg LCD_DeadTime_6: Six Phase between different couple of Frame \r
+ * @arg LCD_DeadTime_7: Seven Phase between different couple of Frame\r
+ * @retval None\r
+ */\r
+void LCD_DeadTimeConfig(uint32_t LCD_DeadTime)\r
+{\r
+ /* Check the parameters */\r
+ assert_param(IS_LCD_DEAD_TIME(LCD_DeadTime));\r
+\r
+ LCD->FCR &= (uint32_t)DEAD_MASK;\r
+ LCD->FCR |= (uint32_t)(LCD_DeadTime);\r
+}\r
+\r
+/**\r
+ * @brief Configures the LCD Blink mode and Blink frequency.\r
+ * @param LCD_BlinkMode: specifies the LCD blink mode.\r
+ * This parameter can be one of the following values:\r
+ * @arg LCD_BlinkMode_Off: Blink disabled\r
+ * @arg LCD_BlinkMode_SEG0_COM0: Blink enabled on SEG[0], COM[0] (1 pixel)\r
+ * @arg LCD_BlinkMode_SEG0_AllCOM: Blink enabled on SEG[0], all COM (up to 8 \r
+ * pixels according to the programmed duty)\r
+ * @arg LCD_BlinkMode_AllSEG_AllCOM: Blink enabled on all SEG and all COM \r
+ * (all pixels)\r
+ * @param LCD_BlinkFrequency: specifies the LCD blink frequency.\r
+ * This parameter can be one of the following values:\r
+ * @arg LCD_BlinkFrequency_Div8: The Blink frequency = fLcd/8\r
+ * @arg LCD_BlinkFrequency_Div16: The Blink frequency = fLcd/16\r
+ * @arg LCD_BlinkFrequency_Div32: The Blink frequency = fLcd/32\r
+ * @arg LCD_BlinkFrequency_Div64: The Blink frequency = fLcd/64 \r
+ * @arg LCD_BlinkFrequency_Div128: The Blink frequency = fLcd/128\r
+ * @arg LCD_BlinkFrequency_Div256: The Blink frequency = fLcd/256\r
+ * @arg LCD_BlinkFrequency_Div512: The Blink frequency = fLcd/512\r
+ * @arg LCD_BlinkFrequency_Div1024: The Blink frequency = fLcd/1024\r
+ * @retval None\r
+ */\r
+void LCD_BlinkConfig(uint32_t LCD_BlinkMode, uint32_t LCD_BlinkFrequency)\r
+{\r
+ /* Check the parameters */\r
+ assert_param(IS_LCD_BLINK_MODE(LCD_BlinkMode));\r
+ assert_param(IS_LCD_BLINK_FREQUENCY(LCD_BlinkFrequency));\r
+ \r
+ LCD->FCR &= (uint32_t)BLINK_MASK;\r
+ LCD->FCR |= (uint32_t)(LCD_BlinkMode | LCD_BlinkFrequency);\r
+}\r
+\r
+/**\r
+ * @brief Configures the LCD Contrast.\r
+ * @param LCD_Contrast: specifies the LCD Contrast.\r
+ * This parameter can be one of the following values:\r
+ * @arg LCD_Contrast_Level_0: Maximum Voltage = 2.60V\r
+ * @arg LCD_Contrast_Level_1: Maximum Voltage = 2.73V\r
+ * @arg LCD_Contrast_Level_2: Maximum Voltage = 2.86V\r
+ * @arg LCD_Contrast_Level_3: Maximum Voltage = 2.99V\r
+ * @arg LCD_Contrast_Level_4: Maximum Voltage = 3.12V\r
+ * @arg LCD_Contrast_Level_5: Maximum Voltage = 3.25V\r
+ * @arg LCD_Contrast_Level_6: Maximum Voltage = 3.38V\r
+ * @arg LCD_Contrast_Level_7: Maximum Voltage = 3.51V\r
+ * @retval None\r
+ */\r
+void LCD_ContrastConfig(uint32_t LCD_Contrast)\r
+{\r
+ /* Check the parameters */\r
+ assert_param(IS_LCD_CONTRAST(LCD_Contrast));\r
+\r
+ LCD->FCR &= (uint32_t)CONTRAST_MASK;\r
+ LCD->FCR |= (uint32_t)(LCD_Contrast);\r
+}\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup LCD_Group2 LCD RAM memory write functions\r
+ * @brief LCD RAM memory write functions \r
+ *\r
+@verbatim \r
+ ===============================================================================\r
+ LCD RAM memory write functions\r
+ =============================================================================== \r
+\r
+ Using its double buffer memory the LCD controller ensures the coherency of the \r
+ displayed information without having to use interrupts to control LCD_RAM \r
+ modification.\r
+ The application software can access the first buffer level (LCD_RAM) through \r
+ the APB interface. Once it has modified the LCD_RAM, it sets the UDR flag in \r
+ the LCD_SR register using the LCD_UpdateDisplayRequest() function.\r
+ This UDR flag (update display request) requests the updated information to be \r
+ moved into the second buffer level (LCD_DISPLAY).\r
+ This operation is done synchronously with the frame (at the beginning of the \r
+ next frame), until the update is completed, the LCD_RAM is write protected and \r
+ the UDR flag stays high.\r
+ Once the update is completed another flag (UDD - Update Display Done) is set and\r
+ generates an interrupt if the UDDIE bit in the LCD_FCR register is set.\r
+ The time it takes to update LCD_DISPLAY is, in the worst case, one odd and one \r
+ even frame.\r
+ The update will not occur (UDR = 1 and UDD = 0) until the display is \r
+ enabled (LCDEN = 1).\r
+\r
+@endverbatim\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * @brief Writes a word in the specific LCD RAM.\r
+ * @param LCD_RAMRegister: specifies the LCD Contrast.\r
+ * This parameter can be one of the following values:\r
+ * @arg LCD_RAMRegister_0: LCD RAM Register 0\r
+ * @arg LCD_RAMRegister_1: LCD RAM Register 1\r
+ * @arg LCD_RAMRegister_2: LCD RAM Register 2\r
+ * @arg LCD_RAMRegister_3: LCD RAM Register 3\r
+ * @arg LCD_RAMRegister_4: LCD RAM Register 4\r
+ * @arg LCD_RAMRegister_5: LCD RAM Register 5\r
+ * @arg LCD_RAMRegister_6: LCD RAM Register 6 \r
+ * @arg LCD_RAMRegister_7: LCD RAM Register 7 \r
+ * @arg LCD_RAMRegister_8: LCD RAM Register 8\r
+ * @arg LCD_RAMRegister_9: LCD RAM Register 9\r
+ * @arg LCD_RAMRegister_10: LCD RAM Register 10\r
+ * @arg LCD_RAMRegister_11: LCD RAM Register 11\r
+ * @arg LCD_RAMRegister_12: LCD RAM Register 12 \r
+ * @arg LCD_RAMRegister_13: LCD RAM Register 13 \r
+ * @arg LCD_RAMRegister_14: LCD RAM Register 14 \r
+ * @arg LCD_RAMRegister_15: LCD RAM Register 15 \r
+ * @param LCD_Data: specifies LCD Data Value to be written.\r
+ * @retval None\r
+ */\r
+void LCD_Write(uint32_t LCD_RAMRegister, uint32_t LCD_Data)\r
+{\r
+ /* Check the parameters */\r
+ assert_param(IS_LCD_RAM_REGISTER(LCD_RAMRegister));\r
+\r
+ /* Copy data bytes to RAM register */\r
+ LCD->RAM[LCD_RAMRegister] = (uint32_t)LCD_Data;\r
+}\r
+\r
+/**\r
+ * @brief Enables the Update Display Request.\r
+ * @note Each time software modifies the LCD_RAM it must set the UDR bit to \r
+ * transfer the updated data to the second level buffer. \r
+ * The UDR bit stays set until the end of the update and during this \r
+ * time the LCD_RAM is write protected. \r
+ * @note When the display is disabled, the update is performed for all \r
+ * LCD_DISPLAY locations.\r
+ * When the display is enabled, the update is performed only for locations \r
+ * for which commons are active (depending on DUTY). For example if \r
+ * DUTY = 1/2, only the LCD_DISPLAY of COM0 and COM1 will be updated. \r
+ * @param None\r
+ * @retval None\r
+ */\r
+void LCD_UpdateDisplayRequest(void)\r
+{\r
+ *(__IO uint32_t *) SR_UDR_BB = (uint32_t)0x01;\r
+}\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup LCD_Group3 Interrupts and flags management functions\r
+ * @brief Interrupts and flags management functions \r
+ *\r
+@verbatim \r
+ ===============================================================================\r
+ Interrupts and flags management functions\r
+ =============================================================================== \r
+\r
+@endverbatim\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * @brief Enables or disables the specified LCD interrupts.\r
+ * @param LCD_IT: specifies the LCD interrupts sources to be enabled or disabled.\r
+ * This parameter can be any combination of the following values:\r
+ * @arg LCD_IT_SOF: Start of Frame Interrupt\r
+ * @arg LCD_IT_UDD: Update Display Done Interrupt\r
+ * @param NewState: new state of the specified LCD interrupts.\r
+ * This parameter can be: ENABLE or DISABLE.\r
+ * @retval None\r
+ */\r
+void LCD_ITConfig(uint32_t LCD_IT, FunctionalState NewState)\r
+{\r
+ /* Check the parameters */\r
+ assert_param(IS_LCD_IT(LCD_IT)); \r
+ assert_param(IS_FUNCTIONAL_STATE(NewState));\r
+ \r
+ if (NewState != DISABLE)\r
+ {\r
+ LCD->FCR |= LCD_IT;\r
+ }\r
+ else\r
+ {\r
+ LCD->FCR &= (uint32_t)~LCD_IT;\r
+ }\r
+}\r
+\r
+/**\r
+ * @brief Checks whether the specified LCD flag is set or not.\r
+ * @param LCD_FLAG: specifies the flag to check.\r
+ * This parameter can be one of the following values:\r
+ * @arg LCD_FLAG_ENS: LCD Enabled flag. It indicates the LCD controller status.\r
+ * @note The ENS bit is set immediately when the LCDEN bit in the LCD_CR \r
+ * goes from 0 to 1. On deactivation it reflects the real status of \r
+ * LCD so it becomes 0 at the end of the last displayed frame. \r
+ * @arg LCD_FLAG_SOF: Start of Frame flag. This flag is set by hardware at \r
+ * the beginning of a new frame, at the same time as the display data is \r
+ * updated.\r
+ * @arg LCD_FLAG_UDR: Update Display Request flag.\r
+ * @arg LCD_FLAG_UDD: Update Display Done flag. \r
+ * @arg LCD_FLAG_RDY: Step_up converter Ready flag. It indicates the status \r
+ * of the step-up converter.\r
+ * @arg LCD_FLAG_FCRSF: LCD Frame Control Register Synchronization Flag. \r
+ * This flag is set by hardware each time the LCD_FCR register is updated \r
+ * in the LCDCLK domain. \r
+ * @retval The new state of LCD_FLAG (SET or RESET).\r
+ */\r
+FlagStatus LCD_GetFlagStatus(uint32_t LCD_FLAG)\r
+{\r
+ FlagStatus bitstatus = RESET;\r
+ \r
+ /* Check the parameters */\r
+ assert_param(IS_LCD_GET_FLAG(LCD_FLAG));\r
+ \r
+ if ((LCD->SR & LCD_FLAG) != (uint32_t)RESET)\r
+ {\r
+ bitstatus = SET;\r
+ }\r
+ else\r
+ {\r
+ bitstatus = RESET;\r
+ }\r
+ return bitstatus;\r
+}\r
+\r
+/**\r
+ * @brief Clears the LCD's pending flags.\r
+ * @param LCD_FLAG: specifies the flag to clear.\r
+ * This parameter can be any combination of the following values:\r
+ * @arg LCD_FLAG_SOF: Start of Frame Interrupt\r
+ * @arg LCD_FLAG_UDD: Update Display Done Interrupt\r
+ * @retval None\r
+ */\r
+void LCD_ClearFlag(uint32_t LCD_FLAG)\r
+{\r
+ /* Check the parameters */\r
+ assert_param(IS_LCD_CLEAR_FLAG(LCD_FLAG));\r
+ \r
+ /* Clear the corresponding LCD flag */\r
+ LCD->CLR = (uint32_t)LCD_FLAG;\r
+}\r
+\r
+/**\r
+ * @brief Checks whether the specified RTC interrupt has occurred or not.\r
+ * @param RTC_IT: specifies the RTC interrupts sources to check.\r
+ * This parameter can be one of the following values:\r
+ * @arg LCD_IT_SOF: Start of Frame Interrupt\r
+ * @arg LCD_IT_UDD: Update Display Done Interrupt.\r
+ * @note If the device is in STOP mode (PCLK not provided) UDD will not \r
+ * generate an interrupt even if UDDIE = 1. \r
+ * If the display is not enabled the UDD interrupt will never occur. \r
+ * @retval The new state of the LCD_IT (SET or RESET).\r
+ */\r
+ITStatus LCD_GetITStatus(uint32_t LCD_IT)\r
+{\r
+ ITStatus bitstatus = RESET;\r
+ \r
+ /* Check the parameters */\r
+ assert_param(IS_LCD_GET_IT(LCD_IT));\r
+ \r
+ if ((LCD->SR & LCD_IT) != (uint16_t)RESET) \r
+ {\r
+ bitstatus = SET;\r
+ }\r
+ else\r
+ {\r
+ bitstatus = RESET;\r
+ }\r
+ \r
+ if (((LCD->FCR & LCD_IT) != (uint16_t)RESET) && (bitstatus != (uint32_t)RESET))\r
+ {\r
+ bitstatus = SET;\r
+ }\r
+ else\r
+ {\r
+ bitstatus = RESET;\r
+ }\r
+ return bitstatus;\r
+}\r
+\r
+/**\r
+ * @brief Clears the LCD's interrupt pending bits.\r
+ * @param LCD_IT: specifies the interrupt pending bit to clear.\r
+ * This parameter can be any combination of the following values:\r
+ * @arg LCD_IT_SOF: Start of Frame Interrupt\r
+ * @arg LCD_IT_UDD: Update Display Done Interrupt\r
+ * @retval None\r
+ */\r
+void LCD_ClearITPendingBit(uint32_t LCD_IT)\r
+{\r
+ /* Check the parameters */\r
+ assert_param(IS_LCD_IT(LCD_IT));\r
+ \r
+ /* Clear the corresponding LCD pending bit */\r
+ LCD->CLR = (uint32_t)LCD_IT;\r
+}\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/\r
projects / fw / stlink / blobdiff