--- /dev/null
+/**\r
+ ******************************************************************************\r
+ * @file stm32l1xx_iwdg.c\r
+ * @author MCD Application Team\r
+ * @version V1.0.0\r
+ * @date 31-December-2010\r
+ * @brief This file provides firmware functions to manage the following \r
+ * functionalities of the Independent watchdog (IWDG) peripheral: \r
+ * - Prescaler and Counter configuration\r
+ * - IWDG activation\r
+ * - Flag management\r
+ *\r
+ * @verbatim \r
+ * \r
+ * ===================================================================\r
+ * IWDG features\r
+ * ===================================================================\r
+ * \r
+ * The IWDG can be started by either software or hardware (configurable\r
+ * through option byte).\r
+ * \r
+ * The IWDG is clocked by its own dedicated low-speed clock (LSI) and\r
+ * thus stays active even if the main clock fails.\r
+ * Once the IWDG is started, the LSI is forced ON and cannot be disabled\r
+ * (LSI cannot be disabled too), and the counter starts counting down from \r
+ * the reset value of 0xFFF. When it reaches the end of count value (0x000)\r
+ * a system reset is generated.\r
+ * The IWDG counter should be reloaded at regular intervals to prevent\r
+ * an MCU reset.\r
+ * \r
+ * The IWDG is implemented in the VDD voltage domain that is still functional\r
+ * in STOP and STANDBY mode (IWDG reset can wake-up from STANDBY) \r
+ * \r
+ * IWDGRST flag in RCC_CSR register can be used to inform when a IWDG\r
+ * reset occurs\r
+ * \r
+ * Min-max timeout value @37KHz (LSI): ~108us / ~28.3s\r
+ * The IWDG timeout may vary due to LSI frequency dispersion. STM32L1xx\r
+ * devices provide the capability to measure the LSI frequency (LSI clock\r
+ * connected internally to TIM10 CH1 input capture). The measured value\r
+ * can be used to have an IWDG timeout with an acceptable accuracy. \r
+ * For more information, please refer to the STM32L1xx Reference manual\r
+ * \r
+ * \r
+ * ===================================================================\r
+ * How to use this driver\r
+ * ===================================================================\r
+ * 1. Enable write access to IWDG_PR and IWDG_RLR registers using\r
+ * IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable) function\r
+ * \r
+ * 2. Configure the IWDG prescaler using IWDG_SetPrescaler() function\r
+ * \r
+ * 3. Configure the IWDG counter value using IWDG_SetReload() function.\r
+ * This value will be loaded in the IWDG counter each time the counter\r
+ * is reloaded, then the IWDG will start counting down from this value.\r
+ * \r
+ * 4. Start the IWDG using IWDG_Enable() function, when the IWDG is used\r
+ * in software mode (no need to enable the LSI, it will be enabled\r
+ * by hardware)\r
+ * \r
+ * 5. Then the application program must reload the IWDG counter at regular\r
+ * intervals during normal operation to prevent an MCU reset, using\r
+ * IWDG_ReloadCounter() function. \r
+ * \r
+ * @endverbatim\r
+ * \r
+ ******************************************************************************\r
+ * @attention\r
+ *\r
+ * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS\r
+ * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE\r
+ * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY\r
+ * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING\r
+ * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE\r
+ * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.\r
+ *\r
+ * <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>\r
+ ****************************************************************************** \r
+ */ \r
+\r
+/* Includes ------------------------------------------------------------------*/\r
+#include "stm32l1xx_iwdg.h"\r
+\r
+/** @addtogroup STM32L1xx_StdPeriph_Driver\r
+ * @{\r
+ */\r
+\r
+/** @defgroup IWDG \r
+ * @brief IWDG driver modules\r
+ * @{\r
+ */ \r
+\r
+/* Private typedef -----------------------------------------------------------*/\r
+/* Private define ------------------------------------------------------------*/\r
+/* ---------------------- IWDG registers bit mask ----------------------------*/\r
+/* KR register bit mask */\r
+#define KR_KEY_RELOAD ((uint16_t)0xAAAA)\r
+#define KR_KEY_ENABLE ((uint16_t)0xCCCC)\r
+\r
+/* Private macro -------------------------------------------------------------*/\r
+/* Private variables ---------------------------------------------------------*/\r
+/* Private function prototypes -----------------------------------------------*/\r
+/* Private functions ---------------------------------------------------------*/\r
+\r
+/** @defgroup IWDG_Private_Functions\r
+ * @{\r
+ */\r
+\r
+/** @defgroup IWDG_Group1 Prescaler and Counter configuration functions\r
+ * @brief Prescaler and Counter configuration functions\r
+ *\r
+@verbatim \r
+ ===============================================================================\r
+ Prescaler and Counter configuration functions\r
+ =============================================================================== \r
+\r
+@endverbatim\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * @brief Enables or disables write access to IWDG_PR and IWDG_RLR registers.\r
+ * @param IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers.\r
+ * This parameter can be one of the following values:\r
+ * @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers\r
+ * @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers\r
+ * @retval None\r
+ */\r
+void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess)\r
+{\r
+ /* Check the parameters */\r
+ assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess));\r
+ IWDG->KR = IWDG_WriteAccess;\r
+}\r
+\r
+/**\r
+ * @brief Sets IWDG Prescaler value.\r
+ * @param IWDG_Prescaler: specifies the IWDG Prescaler value.\r
+ * This parameter can be one of the following values:\r
+ * @arg IWDG_Prescaler_4: IWDG prescaler set to 4\r
+ * @arg IWDG_Prescaler_8: IWDG prescaler set to 8\r
+ * @arg IWDG_Prescaler_16: IWDG prescaler set to 16\r
+ * @arg IWDG_Prescaler_32: IWDG prescaler set to 32\r
+ * @arg IWDG_Prescaler_64: IWDG prescaler set to 64\r
+ * @arg IWDG_Prescaler_128: IWDG prescaler set to 128\r
+ * @arg IWDG_Prescaler_256: IWDG prescaler set to 256\r
+ * @retval None\r
+ */\r
+void IWDG_SetPrescaler(uint8_t IWDG_Prescaler)\r
+{\r
+ /* Check the parameters */\r
+ assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler));\r
+ IWDG->PR = IWDG_Prescaler;\r
+}\r
+\r
+/**\r
+ * @brief Sets IWDG Reload value.\r
+ * @param Reload: specifies the IWDG Reload value.\r
+ * This parameter must be a number between 0 and 0x0FFF.\r
+ * @retval None\r
+ */\r
+void IWDG_SetReload(uint16_t Reload)\r
+{\r
+ /* Check the parameters */\r
+ assert_param(IS_IWDG_RELOAD(Reload));\r
+ IWDG->RLR = Reload;\r
+}\r
+\r
+/**\r
+ * @brief Reloads IWDG counter with value defined in the reload register\r
+ * (write access to IWDG_PR and IWDG_RLR registers disabled).\r
+ * @param None\r
+ * @retval None\r
+ */\r
+void IWDG_ReloadCounter(void)\r
+{\r
+ IWDG->KR = KR_KEY_RELOAD;\r
+}\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup IWDG_Group2 IWDG activation function\r
+ * @brief IWDG activation function \r
+ *\r
+@verbatim \r
+ ===============================================================================\r
+ IWDG activation function\r
+ =============================================================================== \r
+\r
+@endverbatim\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * @brief Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled).\r
+ * @param None\r
+ * @retval None\r
+ */\r
+void IWDG_Enable(void)\r
+{\r
+ IWDG->KR = KR_KEY_ENABLE;\r
+}\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup IWDG_Group3 Flag management function \r
+ * @brief Flag management function \r
+ *\r
+@verbatim \r
+ ===============================================================================\r
+ Flag management function \r
+ =============================================================================== \r
+\r
+@endverbatim\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * @brief Checks whether the specified IWDG flag is set or not.\r
+ * @param IWDG_FLAG: specifies the flag to check.\r
+ * This parameter can be one of the following values:\r
+ * @arg IWDG_FLAG_PVU: Prescaler Value Update on going\r
+ * @arg IWDG_FLAG_RVU: Reload Value Update on going\r
+ * @retval The new state of IWDG_FLAG (SET or RESET).\r
+ */\r
+FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG)\r
+{\r
+ FlagStatus bitstatus = RESET;\r
+ /* Check the parameters */\r
+ assert_param(IS_IWDG_FLAG(IWDG_FLAG));\r
+ if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET)\r
+ {\r
+ bitstatus = SET;\r
+ }\r
+ else\r
+ {\r
+ bitstatus = RESET;\r
+ }\r
+ /* Return the flag status */\r
+ return bitstatus;\r
+}\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/\r
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