--- /dev/null
+/**\r
+ ******************************************************************************\r
+ * @file stm32f10x_wwdg.c\r
+ * @author MCD Application Team\r
+ * @version V3.3.0\r
+ * @date 04/16/2010\r
+ * @brief This file provides all the WWDG firmware functions.\r
+ ******************************************************************************\r
+ * @copy\r
+ *\r
+ * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS\r
+ * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE\r
+ * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY\r
+ * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING\r
+ * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE\r
+ * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.\r
+ *\r
+ * <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>\r
+ */ \r
+\r
+/* Includes ------------------------------------------------------------------*/\r
+#include "stm32f10x_wwdg.h"\r
+#include "stm32f10x_rcc.h"\r
+\r
+/** @addtogroup STM32F10x_StdPeriph_Driver\r
+ * @{\r
+ */\r
+\r
+/** @defgroup WWDG \r
+ * @brief WWDG driver modules\r
+ * @{\r
+ */\r
+\r
+/** @defgroup WWDG_Private_TypesDefinitions\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup WWDG_Private_Defines\r
+ * @{\r
+ */\r
+\r
+/* ----------- WWDG registers bit address in the alias region ----------- */\r
+#define WWDG_OFFSET (WWDG_BASE - PERIPH_BASE)\r
+\r
+/* Alias word address of EWI bit */\r
+#define CFR_OFFSET (WWDG_OFFSET + 0x04)\r
+#define EWI_BitNumber 0x09\r
+#define CFR_EWI_BB (PERIPH_BB_BASE + (CFR_OFFSET * 32) + (EWI_BitNumber * 4))\r
+\r
+/* --------------------- WWDG registers bit mask ------------------------ */\r
+\r
+/* CR register bit mask */\r
+#define CR_WDGA_Set ((uint32_t)0x00000080)\r
+\r
+/* CFR register bit mask */\r
+#define CFR_WDGTB_Mask ((uint32_t)0xFFFFFE7F)\r
+#define CFR_W_Mask ((uint32_t)0xFFFFFF80)\r
+#define BIT_Mask ((uint8_t)0x7F)\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup WWDG_Private_Macros\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup WWDG_Private_Variables\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup WWDG_Private_FunctionPrototypes\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup WWDG_Private_Functions\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * @brief Deinitializes the WWDG peripheral registers to their default reset values.\r
+ * @param None\r
+ * @retval None\r
+ */\r
+void WWDG_DeInit(void)\r
+{\r
+ RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE);\r
+ RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE);\r
+}\r
+\r
+/**\r
+ * @brief Sets the WWDG Prescaler.\r
+ * @param WWDG_Prescaler: specifies the WWDG Prescaler.\r
+ * This parameter can be one of the following values:\r
+ * @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1\r
+ * @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2\r
+ * @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4\r
+ * @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8\r
+ * @retval None\r
+ */\r
+void WWDG_SetPrescaler(uint32_t WWDG_Prescaler)\r
+{\r
+ uint32_t tmpreg = 0;\r
+ /* Check the parameters */\r
+ assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler));\r
+ /* Clear WDGTB[1:0] bits */\r
+ tmpreg = WWDG->CFR & CFR_WDGTB_Mask;\r
+ /* Set WDGTB[1:0] bits according to WWDG_Prescaler value */\r
+ tmpreg |= WWDG_Prescaler;\r
+ /* Store the new value */\r
+ WWDG->CFR = tmpreg;\r
+}\r
+\r
+/**\r
+ * @brief Sets the WWDG window value.\r
+ * @param WindowValue: specifies the window value to be compared to the downcounter.\r
+ * This parameter value must be lower than 0x80.\r
+ * @retval None\r
+ */\r
+void WWDG_SetWindowValue(uint8_t WindowValue)\r
+{\r
+ __IO uint32_t tmpreg = 0;\r
+\r
+ /* Check the parameters */\r
+ assert_param(IS_WWDG_WINDOW_VALUE(WindowValue));\r
+ /* Clear W[6:0] bits */\r
+\r
+ tmpreg = WWDG->CFR & CFR_W_Mask;\r
+\r
+ /* Set W[6:0] bits according to WindowValue value */\r
+ tmpreg |= WindowValue & (uint32_t) BIT_Mask;\r
+\r
+ /* Store the new value */\r
+ WWDG->CFR = tmpreg;\r
+}\r
+\r
+/**\r
+ * @brief Enables the WWDG Early Wakeup interrupt(EWI).\r
+ * @param None\r
+ * @retval None\r
+ */\r
+void WWDG_EnableIT(void)\r
+{\r
+ *(__IO uint32_t *) CFR_EWI_BB = (uint32_t)ENABLE;\r
+}\r
+\r
+/**\r
+ * @brief Sets the WWDG counter value.\r
+ * @param Counter: specifies the watchdog counter value.\r
+ * This parameter must be a number between 0x40 and 0x7F.\r
+ * @retval None\r
+ */\r
+void WWDG_SetCounter(uint8_t Counter)\r
+{\r
+ /* Check the parameters */\r
+ assert_param(IS_WWDG_COUNTER(Counter));\r
+ /* Write to T[6:0] bits to configure the counter value, no need to do\r
+ a read-modify-write; writing a 0 to WDGA bit does nothing */\r
+ WWDG->CR = Counter & BIT_Mask;\r
+}\r
+\r
+/**\r
+ * @brief Enables WWDG and load the counter value. \r
+ * @param Counter: specifies the watchdog counter value.\r
+ * This parameter must be a number between 0x40 and 0x7F.\r
+ * @retval None\r
+ */\r
+void WWDG_Enable(uint8_t Counter)\r
+{\r
+ /* Check the parameters */\r
+ assert_param(IS_WWDG_COUNTER(Counter));\r
+ WWDG->CR = CR_WDGA_Set | Counter;\r
+}\r
+\r
+/**\r
+ * @brief Checks whether the Early Wakeup interrupt flag is set or not.\r
+ * @param None\r
+ * @retval The new state of the Early Wakeup interrupt flag (SET or RESET)\r
+ */\r
+FlagStatus WWDG_GetFlagStatus(void)\r
+{\r
+ return (FlagStatus)(WWDG->SR);\r
+}\r
+\r
+/**\r
+ * @brief Clears Early Wakeup interrupt flag.\r
+ * @param None\r
+ * @retval None\r
+ */\r
+void WWDG_ClearFlag(void)\r
+{\r
+ WWDG->SR = (uint32_t)RESET;\r
+}\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/\r
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