Build libraries for stm32l1xx and stm32f10x

[fw/stlink] / example / libs_stm / src / stm32f10x / stm32f10x_iwdg.c

diff --git a/example/libs_stm/src/stm32f10x/stm32f10x_iwdg.c b/example/libs_stm/src/stm32f10x/stm32f10x_iwdg.c
new file mode 100644 (file)
index 0000000..58ab061
--- /dev/null
+++ b/example/libs_stm/src/stm32f10x/stm32f10x_iwdg.c
@@ -0,0 +1,189 @@
+/**\r
+  ******************************************************************************\r
+  * @file    stm32f10x_iwdg.c\r
+  * @author  MCD Application Team\r
+  * @version V3.3.0\r
+  * @date    04/16/2010\r
+  * @brief   This file provides all the IWDG firmware functions.\r
+  ******************************************************************************\r
+  * @copy\r
+  *\r
+  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS\r
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE\r
+  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY\r
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING\r
+  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE\r
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.\r
+  *\r
+  * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>\r
+  */ \r
+\r
+/* Includes ------------------------------------------------------------------*/\r
+#include "stm32f10x_iwdg.h"\r
+\r
+/** @addtogroup STM32F10x_StdPeriph_Driver\r
+  * @{\r
+  */\r
+\r
+/** @defgroup IWDG \r
+  * @brief IWDG driver modules\r
+  * @{\r
+  */ \r
+\r
+/** @defgroup IWDG_Private_TypesDefinitions\r
+  * @{\r
+  */\r
+\r
+/**\r
+  * @}\r
+  */\r
+\r
+/** @defgroup IWDG_Private_Defines\r
+  * @{\r
+  */ \r
+\r
+/* ---------------------- IWDG registers bit mask ----------------------------*/\r
+\r
+/* KR register bit mask */\r
+#define KR_KEY_Reload    ((uint16_t)0xAAAA)\r
+#define KR_KEY_Enable    ((uint16_t)0xCCCC)\r
+\r
+/**\r
+  * @}\r
+  */ \r
+\r
+/** @defgroup IWDG_Private_Macros\r
+  * @{\r
+  */\r
+\r
+/**\r
+  * @}\r
+  */\r
+\r
+/** @defgroup IWDG_Private_Variables\r
+  * @{\r
+  */\r
+\r
+/**\r
+  * @}\r
+  */\r
+\r
+/** @defgroup IWDG_Private_FunctionPrototypes\r
+  * @{\r
+  */\r
+\r
+/**\r
+  * @}\r
+  */\r
+\r
+/** @defgroup IWDG_Private_Functions\r
+  * @{\r
+  */\r
+\r
+/**\r
+  * @brief  Enables or disables write access to IWDG_PR and IWDG_RLR registers.\r
+  * @param  IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers.\r
+  *   This parameter can be one of the following values:\r
+  *     @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers\r
+  *     @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers\r
+  * @retval None\r
+  */\r
+void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess)\r
+{\r
+  /* Check the parameters */\r
+  assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess));\r
+  IWDG->KR = IWDG_WriteAccess;\r
+}\r
+\r
+/**\r
+  * @brief  Sets IWDG Prescaler value.\r
+  * @param  IWDG_Prescaler: specifies the IWDG Prescaler value.\r
+  *   This parameter can be one of the following values:\r
+  *     @arg IWDG_Prescaler_4: IWDG prescaler set to 4\r
+  *     @arg IWDG_Prescaler_8: IWDG prescaler set to 8\r
+  *     @arg IWDG_Prescaler_16: IWDG prescaler set to 16\r
+  *     @arg IWDG_Prescaler_32: IWDG prescaler set to 32\r
+  *     @arg IWDG_Prescaler_64: IWDG prescaler set to 64\r
+  *     @arg IWDG_Prescaler_128: IWDG prescaler set to 128\r
+  *     @arg IWDG_Prescaler_256: IWDG prescaler set to 256\r
+  * @retval None\r
+  */\r
+void IWDG_SetPrescaler(uint8_t IWDG_Prescaler)\r
+{\r
+  /* Check the parameters */\r
+  assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler));\r
+  IWDG->PR = IWDG_Prescaler;\r
+}\r
+\r
+/**\r
+  * @brief  Sets IWDG Reload value.\r
+  * @param  Reload: specifies the IWDG Reload value.\r
+  *   This parameter must be a number between 0 and 0x0FFF.\r
+  * @retval None\r
+  */\r
+void IWDG_SetReload(uint16_t Reload)\r
+{\r
+  /* Check the parameters */\r
+  assert_param(IS_IWDG_RELOAD(Reload));\r
+  IWDG->RLR = Reload;\r
+}\r
+\r
+/**\r
+  * @brief  Reloads IWDG counter with value defined in the reload register\r
+  *   (write access to IWDG_PR and IWDG_RLR registers disabled).\r
+  * @param  None\r
+  * @retval None\r
+  */\r
+void IWDG_ReloadCounter(void)\r
+{\r
+  IWDG->KR = KR_KEY_Reload;\r
+}\r
+\r
+/**\r
+  * @brief  Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled).\r
+  * @param  None\r
+  * @retval None\r
+  */\r
+void IWDG_Enable(void)\r
+{\r
+  IWDG->KR = KR_KEY_Enable;\r
+}\r
+\r
+/**\r
+  * @brief  Checks whether the specified IWDG flag is set or not.\r
+  * @param  IWDG_FLAG: specifies the flag to check.\r
+  *   This parameter can be one of the following values:\r
+  *     @arg IWDG_FLAG_PVU: Prescaler Value Update on going\r
+  *     @arg IWDG_FLAG_RVU: Reload Value Update on going\r
+  * @retval The new state of IWDG_FLAG (SET or RESET).\r
+  */\r
+FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG)\r
+{\r
+  FlagStatus bitstatus = RESET;\r
+  /* Check the parameters */\r
+  assert_param(IS_IWDG_FLAG(IWDG_FLAG));\r
+  if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET)\r
+  {\r
+    bitstatus = SET;\r
+  }\r
+  else\r
+  {\r
+    bitstatus = RESET;\r
+  }\r
+  /* Return the flag status */\r
+  return bitstatus;\r
+}\r
+\r
+/**\r
+  * @}\r
+  */\r
+\r
+/**\r
+  * @}\r
+  */\r
+\r
+/**\r
+  * @}\r
+  */\r
+\r
+/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/\r