* as/link/lkar.h: sgetl and sputl are independent of endianness

[fw/sdcc] / device / lib / z80 / div.s

diff --git a/device/lib/z80/div.s b/device/lib/z80/div.s
index e20c31b257f185fac504dbe24dbc7bf293ffa120..e64aa07b9fe4e9d70ce36011fe97a184f9a190df 100644 (file)
--- a/device/lib/z80/div.s
+++ b/device/lib/z80/div.s
@@ -1,7 +1,9 @@
         ;; Originally from GBDK by Pascal Felber.
+
         .area   _CODE
 
-__divschar_rrx_s::
+        ;; Unsigned
+__divuchar_rrx_s::
         ld      hl,#2+1
         add     hl,sp
 
@@ -10,36 +12,16 @@ __divschar_rrx_s::
         ld      l,(hl)
 
         ;; Fall through
-__divschar_rrx_hds::
+__divuchar_rrx_hds::
         ld      c,l
-
-        call    .div8
+        call    __divu8
 
         ld      l,c
         ld      h,b
 
         ret
 
-__modschar_rrx_s::
-        ld      hl,#2+1
-        add     hl,sp
-
-        ld      e,(hl)
-        dec     hl
-        ld      l,(hl)
-
-        ;; Fall through
-__modschar_rrx_hds::
-        ld      c,l
-
-        call    .div8
-
-        ld      l,e
-        ld      h,d
-
-        ret
-
-__divsint_rrx_s::
+__divuint_rrx_s::
         ld      hl,#2+3
         add     hl,sp
 
@@ -53,140 +35,82 @@ __divsint_rrx_s::
         ld      h,a
 
         ;; Fall through
-__divsint_rrx_hds::
+__divuint_rrx_hds::
         ld      b,h
         ld      c,l
-
-        call    .div16
+        call    __divu16
 
         ld      l,c
         ld      h,b
 
         ret
 
-__modsint_rrx_s::
-        ld      hl,#2+3
-        add     hl,sp
-
-        ld      d,(hl)
-        dec     hl
-        ld      e,(hl)
-        dec     hl
-        ld      a,(hl)
-        dec     hl
-        ld      l,(hl)
-        ld      h,a
-
-        ;; Fall through
-__modsint_rrx_hds::
-        ld      b,h
-        ld      c,l
-
-        call    .div16
-
-        ld      l,e
-        ld      h,d
-
-        ret
-
-        ;; Unsigned
-__divuchar_rrx_s::
+__divsuchar_rrx_s::
         ld      hl,#2+1
         add     hl,sp
 
         ld      e,(hl)
         dec     hl
-        ld      l,(hl)
+        ld      c,(hl)
+        ld      b, #0
 
-        ;; Fall through
-__divuchar_rrx_hds::
-        ld      c,l
-        call    .divu8
+        call    signexte
 
         ld      l,c
         ld      h,b
 
         ret
 
-__moduchar_rrx_s::
+__modsuchar_rrx_s::
         ld      hl,#2+1
         add     hl,sp
 
         ld      e,(hl)
         dec     hl
-        ld      l,(hl)
+        ld      c,(hl)
+        ld      b, #0
 
-        ;; Fall through
-__moduchar_rrx_hds::
-        ld      c,l
-        call    .divu8
+        call    signexte
 
         ld      l,e
         ld      h,d
 
         ret
 
-__divuint_rrx_s::
-        ld      hl,#2+3
+__divuschar_rrx_s::
+        ld      hl,#2+1
         add     hl,sp
 
-        ld      d,(hl)
-        dec     hl
         ld      e,(hl)
+        ld      d, #0
         dec     hl
-        ld      a,(hl)
-        dec     hl
-        ld      l,(hl)
-        ld      h,a
+        ld      c,(hl)
 
-        ;; Fall through
-__divuint_rrx_hds::
-        ld      b,h
-        ld      c,l
-        call    .divu16
+        ld      a,c             ; Sign extend
+        rlca
+        sbc     a
+        ld      b,a
+
+        call    __div16
 
         ld      l,c
         ld      h,b
 
         ret
 
-__moduint_rrx_s::
-        ld      hl,#2+3
-        add     hl,sp
-
-        ld      d,(hl)
-        dec     hl
-        ld      e,(hl)
-        dec     hl
-        ld      a,(hl)
-        dec     hl
-        ld      l,(hl)
-        ld      h,a
-        ;; Fall through
-
-__moduint_rrx_hds::
-        ld      b,h
-        ld      c,l
-
-        call    .divu16
-
-        ld      l,e
-        ld      h,d
-
-        ret
-
-.div8::
+__div8::
 .mod8::
         ld      a,c             ; Sign extend
         rlca
         sbc     a
         ld      b,a
+signexte:
         ld      a,e             ; Sign extend
         rlca
         sbc     a
         ld      d,a
 
-        ; Fall through to .div16
+        ; Fall through to __div16
 
         ;; 16-bit division
         ;;
@@ -201,7 +125,7 @@ __moduint_rrx_hds::
         ;;   If divisor is 0, carry=1 and both quotient and remainder are 0
         ;;
         ;; Register used: AF,BC,DE,HL
-.div16::
+__div16::
 .mod16::
         ;; Determine sign of quotient by xor-ing high bytes of dividend
         ;;  and divisor. Quotient is positive if signs are the same, negative
@@ -233,7 +157,7 @@ __moduint_rrx_hds::
         ld      b,a
         ;; Divide absolute values
 .dodiv:
-        call    .divu16
+        call    __divu16
         jr      C,.exit         ; Exit if divide by zero
         ;; Negate quotient if it is negative
         pop     af              ; recover sign of quotient
@@ -262,13 +186,13 @@ __moduint_rrx_hds::
         pop     af
         ret
 
-.divu8::
+__divu8::
 .modu8::
         ld      b,#0x00
         ld      d,b
         ; Fall through to divu16
 
-.divu16::
+__divu16::
 .modu16::
         ;; Check for division by zero
         ld      a,e
@@ -333,3 +257,4 @@ __moduint_rrx_hds::
 ;       ld      b,h             ; B = high byte of quotient
         or      a               ; Clear carry, valid result
         ret
+