/* Register definitions for pic16f917.
* This file was automatically generated by:
- * inc2h.pl V1.6
+ * inc2h.pl V4585
* Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
*/
#include <pic16f917.h>
-data __at (INDF_ADDR) volatile char INDF;
-sfr __at (TMR0_ADDR) TMR0;
-data __at (PCL_ADDR) volatile char PCL;
-sfr __at (STATUS_ADDR) STATUS;
-sfr __at (FSR_ADDR) FSR;
-sfr __at (PORTA_ADDR) PORTA;
-sfr __at (PORTB_ADDR) PORTB;
-sfr __at (PORTC_ADDR) PORTC;
-sfr __at (PORTD_ADDR) PORTD;
-sfr __at (PORTE_ADDR) PORTE;
-sfr __at (PCLATH_ADDR) PCLATH;
-sfr __at (INTCON_ADDR) INTCON;
-sfr __at (PIR1_ADDR) PIR1;
-sfr __at (PIR2_ADDR) PIR2;
-sfr __at (TMR1L_ADDR) TMR1L;
-sfr __at (TMR1H_ADDR) TMR1H;
-sfr __at (T1CON_ADDR) T1CON;
-sfr __at (TMR2_ADDR) TMR2;
-sfr __at (T2CON_ADDR) T2CON;
-sfr __at (SSPBUF_ADDR) SSPBUF;
-sfr __at (SSPCON_ADDR) SSPCON;
-sfr __at (CCPR1L_ADDR) CCPR1L;
-sfr __at (CCPR1H_ADDR) CCPR1H;
-sfr __at (CCP1CON_ADDR) CCP1CON;
-sfr __at (RCSTA_ADDR) RCSTA;
-sfr __at (TXREG_ADDR) TXREG;
-sfr __at (RCREG_ADDR) RCREG;
-sfr __at (CCPR2L_ADDR) CCPR2L;
-sfr __at (CCPR2H_ADDR) CCPR2H;
-sfr __at (CCP2CON_ADDR) CCP2CON;
-sfr __at (ADRESH_ADDR) ADRESH;
-sfr __at (ADCON0_ADDR) ADCON0;
-sfr __at (OPTION_REG_ADDR) OPTION_REG;
-sfr __at (TRISA_ADDR) TRISA;
-sfr __at (TRISB_ADDR) TRISB;
-sfr __at (TRISC_ADDR) TRISC;
-sfr __at (TRISD_ADDR) TRISD;
-sfr __at (TRISE_ADDR) TRISE;
-sfr __at (PIE1_ADDR) PIE1;
-sfr __at (PIE2_ADDR) PIE2;
-sfr __at (PCON_ADDR) PCON;
-sfr __at (OSCCON_ADDR) OSCCON;
-sfr __at (OSCTUNE_ADDR) OSCTUNE;
-sfr __at (ANSEL_ADDR) ANSEL;
-sfr __at (PR2_ADDR) PR2;
-sfr __at (SSPADD_ADDR) SSPADD;
-sfr __at (SSPSTAT_ADDR) SSPSTAT;
-sfr __at (WPUB_ADDR) WPUB;
-sfr __at (WPU_ADDR) WPU;
-sfr __at (IOCB_ADDR) IOCB;
-sfr __at (IOC_ADDR) IOC;
-sfr __at (CMCON1_ADDR) CMCON1;
-sfr __at (TXSTA_ADDR) TXSTA;
-sfr __at (SPBRG_ADDR) SPBRG;
-sfr __at (CMCON0_ADDR) CMCON0;
-sfr __at (VRCON_ADDR) VRCON;
-sfr __at (ADRESL_ADDR) ADRESL;
-sfr __at (ADCON1_ADDR) ADCON1;
-sfr __at (WDTCON_ADDR) WDTCON;
-sfr __at (LCDCON_ADDR) LCDCON;
-sfr __at (LCDPS_ADDR) LCDPS;
-sfr __at (LVDCON_ADDR) LVDCON;
-sfr __at (EEDATL_ADDR) EEDATL;
-sfr __at (EEADRL_ADDR) EEADRL;
-sfr __at (EEDATH_ADDR) EEDATH;
-sfr __at (EEADRH_ADDR) EEADRH;
-sfr __at (LCDDATA0_ADDR) LCDDATA0;
-sfr __at (LCDDATA1_ADDR) LCDDATA1;
-sfr __at (LCDDATA2_ADDR) LCDDATA2;
-sfr __at (LCDDATA3_ADDR) LCDDATA3;
-sfr __at (LCDDATA4_ADDR) LCDDATA4;
-sfr __at (LCDDATA5_ADDR) LCDDATA5;
-sfr __at (LCDDATA6_ADDR) LCDDATA6;
-sfr __at (LCDDATA7_ADDR) LCDDATA7;
-sfr __at (LCDDATA8_ADDR) LCDDATA8;
-sfr __at (LCDDATA9_ADDR) LCDDATA9;
-sfr __at (LCDDATA10_ADDR) LCDDATA10;
-sfr __at (LCDDATA11_ADDR) LCDDATA11;
-sfr __at (LCDSE0_ADDR) LCDSE0;
-sfr __at (LCDSE1_ADDR) LCDSE1;
-sfr __at (LCDSE2_ADDR) LCDSE2;
-sfr __at (EECON1_ADDR) EECON1;
-sfr __at (EECON2_ADDR) EECON2;
+__sfr __at (INDF_ADDR) INDF;
+__sfr __at (TMR0_ADDR) TMR0;
+__sfr __at (PCL_ADDR) PCL;
+__sfr __at (STATUS_ADDR) STATUS;
+__sfr __at (FSR_ADDR) FSR;
+__sfr __at (PORTA_ADDR) PORTA;
+__sfr __at (PORTB_ADDR) PORTB;
+__sfr __at (PORTC_ADDR) PORTC;
+__sfr __at (PORTD_ADDR) PORTD;
+__sfr __at (PORTE_ADDR) PORTE;
+__sfr __at (PCLATH_ADDR) PCLATH;
+__sfr __at (INTCON_ADDR) INTCON;
+__sfr __at (PIR1_ADDR) PIR1;
+__sfr __at (PIR2_ADDR) PIR2;
+__sfr __at (TMR1L_ADDR) TMR1L;
+__sfr __at (TMR1H_ADDR) TMR1H;
+__sfr __at (T1CON_ADDR) T1CON;
+__sfr __at (TMR2_ADDR) TMR2;
+__sfr __at (T2CON_ADDR) T2CON;
+__sfr __at (SSPBUF_ADDR) SSPBUF;
+__sfr __at (SSPCON_ADDR) SSPCON;
+__sfr __at (CCPR1L_ADDR) CCPR1L;
+__sfr __at (CCPR1H_ADDR) CCPR1H;
+__sfr __at (CCP1CON_ADDR) CCP1CON;
+__sfr __at (RCSTA_ADDR) RCSTA;
+__sfr __at (TXREG_ADDR) TXREG;
+__sfr __at (RCREG_ADDR) RCREG;
+__sfr __at (CCPR2L_ADDR) CCPR2L;
+__sfr __at (CCPR2H_ADDR) CCPR2H;
+__sfr __at (CCP2CON_ADDR) CCP2CON;
+__sfr __at (ADRESH_ADDR) ADRESH;
+__sfr __at (ADCON0_ADDR) ADCON0;
+__sfr __at (OPTION_REG_ADDR) OPTION_REG;
+__sfr __at (TRISA_ADDR) TRISA;
+__sfr __at (TRISB_ADDR) TRISB;
+__sfr __at (TRISC_ADDR) TRISC;
+__sfr __at (TRISD_ADDR) TRISD;
+__sfr __at (TRISE_ADDR) TRISE;
+__sfr __at (PIE1_ADDR) PIE1;
+__sfr __at (PIE2_ADDR) PIE2;
+__sfr __at (PCON_ADDR) PCON;
+__sfr __at (OSCCON_ADDR) OSCCON;
+__sfr __at (OSCTUNE_ADDR) OSCTUNE;
+__sfr __at (ANSEL_ADDR) ANSEL;
+__sfr __at (PR2_ADDR) PR2;
+__sfr __at (SSPADD_ADDR) SSPADD;
+__sfr __at (SSPSTAT_ADDR) SSPSTAT;
+__sfr __at (WPUB_ADDR) WPUB;
+__sfr __at (WPU_ADDR) WPU;
+__sfr __at (IOCB_ADDR) IOCB;
+__sfr __at (IOC_ADDR) IOC;
+__sfr __at (CMCON1_ADDR) CMCON1;
+__sfr __at (TXSTA_ADDR) TXSTA;
+__sfr __at (SPBRG_ADDR) SPBRG;
+__sfr __at (CMCON0_ADDR) CMCON0;
+__sfr __at (VRCON_ADDR) VRCON;
+__sfr __at (ADRESL_ADDR) ADRESL;
+__sfr __at (ADCON1_ADDR) ADCON1;
+__sfr __at (WDTCON_ADDR) WDTCON;
+__sfr __at (LCDCON_ADDR) LCDCON;
+__sfr __at (LCDPS_ADDR) LCDPS;
+__sfr __at (LVDCON_ADDR) LVDCON;
+__sfr __at (EEDATL_ADDR) EEDATL;
+__sfr __at (EEADRL_ADDR) EEADRL;
+__sfr __at (EEDATH_ADDR) EEDATH;
+__sfr __at (EEADRH_ADDR) EEADRH;
+__sfr __at (LCDDATA0_ADDR) LCDDATA0;
+__sfr __at (LCDDATA1_ADDR) LCDDATA1;
+__sfr __at (LCDDATA2_ADDR) LCDDATA2;
+__sfr __at (LCDDATA3_ADDR) LCDDATA3;
+__sfr __at (LCDDATA4_ADDR) LCDDATA4;
+__sfr __at (LCDDATA5_ADDR) LCDDATA5;
+__sfr __at (LCDDATA6_ADDR) LCDDATA6;
+__sfr __at (LCDDATA7_ADDR) LCDDATA7;
+__sfr __at (LCDDATA8_ADDR) LCDDATA8;
+__sfr __at (LCDDATA9_ADDR) LCDDATA9;
+__sfr __at (LCDDATA10_ADDR) LCDDATA10;
+__sfr __at (LCDDATA11_ADDR) LCDDATA11;
+__sfr __at (LCDSE0_ADDR) LCDSE0;
+__sfr __at (LCDSE1_ADDR) LCDSE1;
+__sfr __at (LCDSE2_ADDR) LCDSE2;
+__sfr __at (EECON1_ADDR) EECON1;
+__sfr __at (EECON2_ADDR) EECON2;
//
// bitfield definitions
volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits;
volatile __CMCON0_bits_t __at(CMCON0_ADDR) CMCON0_bits;
volatile __CMCON1_bits_t __at(CMCON1_ADDR) CMCON1_bits;
+volatile __EEADRH_bits_t __at(EEADRH_ADDR) EEADRH_bits;
+volatile __EEADRL_bits_t __at(EEADRL_ADDR) EEADRL_bits;
volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits;
volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;
volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits;
volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits;
volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits;
+volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits;
+volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits;
+volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits;
+volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits;
+volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits;
volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits;
volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits;
volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits;
volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits;
volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits;
+volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits;
+volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits;
+volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits;
+volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits;
+volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits;
volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits;
volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits;
volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits;
projects / fw / sdcc / blobdiff