* device/lib/pic/libdev/Makefile.in: build device-specific

[fw/sdcc] / device / lib / pic / libdev / pic16f785.c

diff --git a/device/lib/pic/libdev/pic16f785.c b/device/lib/pic/libdev/pic16f785.c
index 1df2da5b872a4870d31bddfa9c35878d728b562c..35b2ba24056bd8940e8f69d7d414c03151e877f1 100644 (file)
--- a/device/lib/pic/libdev/pic16f785.c
+++ b/device/lib/pic/libdev/pic16f785.c
@@ -1,13 +1,13 @@
 /* Register definitions for pic16f785.
  * This file was automatically generated by:
- *   inc2h.pl V1.6
+ *   inc2h.pl V4585
  *   Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
  */
 #include <pic16f785.h>
 
-__data __at (INDF_ADDR) volatile char      INDF;
+__sfr  __at (INDF_ADDR)                    INDF;
 __sfr  __at (TMR0_ADDR)                    TMR0;
-__data __at (PCL_ADDR) volatile char       PCL;
+__sfr  __at (PCL_ADDR)                     PCL;
 __sfr  __at (STATUS_ADDR)                  STATUS;
 __sfr  __at (FSR_ADDR)                     FSR;
 __sfr  __at (PORTA_ADDR)                   PORTA;
@@ -67,17 +67,36 @@ __sfr  __at (OPA2CON_ADDR)                 OPA2CON;
 // bitfield definitions
 // 
 volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits;
+volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits;
+volatile __ANSEL1_bits_t __at(ANSEL1_ADDR) ANSEL1_bits;
 volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits;
+volatile __CM1CON0_bits_t __at(CM1CON0_ADDR) CM1CON0_bits;
+volatile __CM2CON0_bits_t __at(CM2CON0_ADDR) CM2CON0_bits;
+volatile __CM2CON1_bits_t __at(CM2CON1_ADDR) CM2CON1_bits;
+volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits;
 volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;
+volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits;
+volatile __IOCA_bits_t __at(IOCA_ADDR) IOCA_bits;
 volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;
 volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits;
 volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits;
 volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits;
 volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits;
 volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
+volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits;
+volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits;
+volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits;
+volatile __PWMCLK_bits_t __at(PWMCLK_ADDR) PWMCLK_bits;
+volatile __PWMCON0_bits_t __at(PWMCON0_ADDR) PWMCON0_bits;
+volatile __PWMCON1_bits_t __at(PWMCON1_ADDR) PWMCON1_bits;
+volatile __REFCON_bits_t __at(REFCON_ADDR) REFCON_bits;
 volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
 volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits;
 volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits;
+volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits;
+volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits;
+volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits;
 volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits;
 volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits;
+volatile __WPUA_bits_t __at(WPUA_ADDR) WPUA_bits;