/* Register definitions for pic16f630.
* This file was automatically generated by:
- * inc2h.pl V1.6
+ * inc2h.pl V4585
* Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
*/
#include <pic16f630.h>
-data __at (INDF_ADDR) volatile char INDF;
-sfr __at (TMR0_ADDR) TMR0;
-data __at (PCL_ADDR) volatile char PCL;
-sfr __at (STATUS_ADDR) STATUS;
-sfr __at (FSR_ADDR) FSR;
-sfr __at (PORTA_ADDR) PORTA;
-sfr __at (PORTC_ADDR) PORTC;
-sfr __at (PCLATH_ADDR) PCLATH;
-sfr __at (INTCON_ADDR) INTCON;
-sfr __at (PIR1_ADDR) PIR1;
-sfr __at (TMR1L_ADDR) TMR1L;
-sfr __at (TMR1H_ADDR) TMR1H;
-sfr __at (T1CON_ADDR) T1CON;
-sfr __at (CMCON_ADDR) CMCON;
-sfr __at (OPTION_REG_ADDR) OPTION_REG;
-sfr __at (TRISA_ADDR) TRISA;
-sfr __at (TRISC_ADDR) TRISC;
-sfr __at (PIE1_ADDR) PIE1;
-sfr __at (PCON_ADDR) PCON;
-sfr __at (OSCCAL_ADDR) OSCCAL;
-sfr __at (WPUA_ADDR) WPUA;
-sfr __at (WPU_ADDR) WPU;
-sfr __at (IOCA_ADDR) IOCA;
-sfr __at (IOC_ADDR) IOC;
-sfr __at (VRCON_ADDR) VRCON;
-sfr __at (EEDATA_ADDR) EEDATA;
-sfr __at (EEDAT_ADDR) EEDAT;
-sfr __at (EEADR_ADDR) EEADR;
-sfr __at (EECON1_ADDR) EECON1;
-sfr __at (EECON2_ADDR) EECON2;
+__sfr __at (INDF_ADDR) INDF;
+__sfr __at (TMR0_ADDR) TMR0;
+__sfr __at (PCL_ADDR) PCL;
+__sfr __at (STATUS_ADDR) STATUS;
+__sfr __at (FSR_ADDR) FSR;
+__sfr __at (PORTA_ADDR) PORTA;
+__sfr __at (PORTC_ADDR) PORTC;
+__sfr __at (PCLATH_ADDR) PCLATH;
+__sfr __at (INTCON_ADDR) INTCON;
+__sfr __at (PIR1_ADDR) PIR1;
+__sfr __at (TMR1L_ADDR) TMR1L;
+__sfr __at (TMR1H_ADDR) TMR1H;
+__sfr __at (T1CON_ADDR) T1CON;
+__sfr __at (CMCON_ADDR) CMCON;
+__sfr __at (OPTION_REG_ADDR) OPTION_REG;
+__sfr __at (TRISA_ADDR) TRISA;
+__sfr __at (TRISC_ADDR) TRISC;
+__sfr __at (PIE1_ADDR) PIE1;
+__sfr __at (PCON_ADDR) PCON;
+__sfr __at (OSCCAL_ADDR) OSCCAL;
+__sfr __at (WPUA_ADDR) WPUA;
+__sfr __at (WPU_ADDR) WPU;
+__sfr __at (IOCA_ADDR) IOCA;
+__sfr __at (IOC_ADDR) IOC;
+__sfr __at (VRCON_ADDR) VRCON;
+__sfr __at (EEDATA_ADDR) EEDATA;
+__sfr __at (EEDAT_ADDR) EEDAT;
+__sfr __at (EEADR_ADDR) EEADR;
+__sfr __at (EECON1_ADDR) EECON1;
+__sfr __at (EECON2_ADDR) EECON2;
//
// bitfield definitions
//
volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits;
+volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits;
volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;
volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;
volatile __OSCCAL_bits_t __at(OSCCAL_ADDR) OSCCAL_bits;
volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits;
volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits;
volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
+volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits;
+volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits;
volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits;
+volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits;
+volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits;
volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits;