* device/lib/pic/libdev/Makefile.in: build device-specific

[fw/sdcc] / device / lib / pic / libdev / pic16c771.c

diff --git a/device/lib/pic/libdev/pic16c771.c b/device/lib/pic/libdev/pic16c771.c
index 45120f93397f32222308ec9f2af4f88476ec2c06..2b22c4c0af2d097796b2a4c51a5a1e240c85ee1c 100644 (file)
--- a/device/lib/pic/libdev/pic16c771.c
+++ b/device/lib/pic/libdev/pic16c771.c
@@ -1,56 +1,56 @@
 /* Register definitions for pic16c771.
  * This file was automatically generated by:
- *   inc2h.pl V1.6
+ *   inc2h.pl V4585
  *   Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
  */
 #include <pic16c771.h>
 
-data __at (INDF_ADDR) volatile char      INDF;
-sfr  __at (TMR0_ADDR)                    TMR0;
-data __at (PCL_ADDR) volatile char       PCL;
-sfr  __at (STATUS_ADDR)                  STATUS;
-sfr  __at (FSR_ADDR)                     FSR;
-sfr  __at (PORTA_ADDR)                   PORTA;
-sfr  __at (PORTB_ADDR)                   PORTB;
-sfr  __at (PCLATH_ADDR)                  PCLATH;
-sfr  __at (INTCON_ADDR)                  INTCON;
-sfr  __at (PIR1_ADDR)                    PIR1;
-sfr  __at (PIR2_ADDR)                    PIR2;
-sfr  __at (TMR1L_ADDR)                   TMR1L;
-sfr  __at (TMR1H_ADDR)                   TMR1H;
-sfr  __at (T1CON_ADDR)                   T1CON;
-sfr  __at (TMR2_ADDR)                    TMR2;
-sfr  __at (T2CON_ADDR)                   T2CON;
-sfr  __at (SSPBUF_ADDR)                  SSPBUF;
-sfr  __at (SSPCON_ADDR)                  SSPCON;
-sfr  __at (CCPR1L_ADDR)                  CCPR1L;
-sfr  __at (CCPR1H_ADDR)                  CCPR1H;
-sfr  __at (CCP1CON_ADDR)                 CCP1CON;
-sfr  __at (ADRESH_ADDR)                  ADRESH;
-sfr  __at (ADCON0_ADDR)                  ADCON0;
-sfr  __at (OPTION_REG_ADDR)              OPTION_REG;
-sfr  __at (TRISA_ADDR)                   TRISA;
-sfr  __at (TRISB_ADDR)                   TRISB;
-sfr  __at (PIE1_ADDR)                    PIE1;
-sfr  __at (PIE2_ADDR)                    PIE2;
-sfr  __at (PCON_ADDR)                    PCON;
-sfr  __at (SSPCON2_ADDR)                 SSPCON2;
-sfr  __at (PR2_ADDR)                     PR2;
-sfr  __at (SSPADD_ADDR)                  SSPADD;
-sfr  __at (SSPSTAT_ADDR)                 SSPSTAT;
-sfr  __at (WPUB_ADDR)                    WPUB;
-sfr  __at (IOCB_ADDR)                    IOCB;
-sfr  __at (P1DEL_ADDR)                   P1DEL;
-sfr  __at (REFCON_ADDR)                  REFCON;
-sfr  __at (LVDCON_ADDR)                  LVDCON;
-sfr  __at (ANSEL_ADDR)                   ANSEL;
-sfr  __at (ADRESL_ADDR)                  ADRESL;
-sfr  __at (ADCON1_ADDR)                  ADCON1;
-sfr  __at (PMDATL_ADDR)                  PMDATL;
-sfr  __at (PMADRL_ADDR)                  PMADRL;
-sfr  __at (PMDATH_ADDR)                  PMDATH;
-sfr  __at (PMADRH_ADDR)                  PMADRH;
-sfr  __at (PMCON1_ADDR)                  PMCON1;
+__sfr  __at (INDF_ADDR)                    INDF;
+__sfr  __at (TMR0_ADDR)                    TMR0;
+__sfr  __at (PCL_ADDR)                     PCL;
+__sfr  __at (STATUS_ADDR)                  STATUS;
+__sfr  __at (FSR_ADDR)                     FSR;
+__sfr  __at (PORTA_ADDR)                   PORTA;
+__sfr  __at (PORTB_ADDR)                   PORTB;
+__sfr  __at (PCLATH_ADDR)                  PCLATH;
+__sfr  __at (INTCON_ADDR)                  INTCON;
+__sfr  __at (PIR1_ADDR)                    PIR1;
+__sfr  __at (PIR2_ADDR)                    PIR2;
+__sfr  __at (TMR1L_ADDR)                   TMR1L;
+__sfr  __at (TMR1H_ADDR)                   TMR1H;
+__sfr  __at (T1CON_ADDR)                   T1CON;
+__sfr  __at (TMR2_ADDR)                    TMR2;
+__sfr  __at (T2CON_ADDR)                   T2CON;
+__sfr  __at (SSPBUF_ADDR)                  SSPBUF;
+__sfr  __at (SSPCON_ADDR)                  SSPCON;
+__sfr  __at (CCPR1L_ADDR)                  CCPR1L;
+__sfr  __at (CCPR1H_ADDR)                  CCPR1H;
+__sfr  __at (CCP1CON_ADDR)                 CCP1CON;
+__sfr  __at (ADRESH_ADDR)                  ADRESH;
+__sfr  __at (ADCON0_ADDR)                  ADCON0;
+__sfr  __at (OPTION_REG_ADDR)              OPTION_REG;
+__sfr  __at (TRISA_ADDR)                   TRISA;
+__sfr  __at (TRISB_ADDR)                   TRISB;
+__sfr  __at (PIE1_ADDR)                    PIE1;
+__sfr  __at (PIE2_ADDR)                    PIE2;
+__sfr  __at (PCON_ADDR)                    PCON;
+__sfr  __at (SSPCON2_ADDR)                 SSPCON2;
+__sfr  __at (PR2_ADDR)                     PR2;
+__sfr  __at (SSPADD_ADDR)                  SSPADD;
+__sfr  __at (SSPSTAT_ADDR)                 SSPSTAT;
+__sfr  __at (WPUB_ADDR)                    WPUB;
+__sfr  __at (IOCB_ADDR)                    IOCB;
+__sfr  __at (P1DEL_ADDR)                   P1DEL;
+__sfr  __at (REFCON_ADDR)                  REFCON;
+__sfr  __at (LVDCON_ADDR)                  LVDCON;
+__sfr  __at (ANSEL_ADDR)                   ANSEL;
+__sfr  __at (ADRESL_ADDR)                  ADRESL;
+__sfr  __at (ADCON1_ADDR)                  ADCON1;
+__sfr  __at (PMDATL_ADDR)                  PMDATL;
+__sfr  __at (PMADRL_ADDR)                  PMADRL;
+__sfr  __at (PMDATH_ADDR)                  PMDATH;
+__sfr  __at (PMADRH_ADDR)                  PMADRH;
+__sfr  __at (PMCON1_ADDR)                  PMCON1;
 
 // 
 // bitfield definitions
@@ -67,6 +67,8 @@ volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits;
 volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
 volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits;
 volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits;
+volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits;
+volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits;
 volatile __REFCON_bits_t __at(REFCON_ADDR) REFCON_bits;
 volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits;
 volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits;
@@ -74,4 +76,6 @@ volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits;
 volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
 volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits;
 volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits;
+volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits;
+volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits;