* device/lib/pic/libdev/devices.txt: device list for mkall.sh

[fw/sdcc] / device / lib / pic / libdev / pic16c72.c

diff --git a/device/lib/pic/libdev/pic16c72.c b/device/lib/pic/libdev/pic16c72.c
index 0945cff27821aca9252fa847031192745f5f8e22..c1f4faf5dfb172bb5bd3cde60a06c63513baa70b 100644 (file)
--- a/device/lib/pic/libdev/pic16c72.c
+++ b/device/lib/pic/libdev/pic16c72.c
@@ -1,43 +1,43 @@
 /* Register definitions for pic16c72.
  * This file was automatically generated by:
- *   inc2h.pl V1.6
+ *   inc2h.pl V4514
  *   Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
  */
 #include <pic16c72.h>
 
-data __at (INDF_ADDR) volatile char      INDF;
-sfr  __at (TMR0_ADDR)                    TMR0;
-data __at (PCL_ADDR) volatile char       PCL;
-sfr  __at (STATUS_ADDR)                  STATUS;
-sfr  __at (FSR_ADDR)                     FSR;
-sfr  __at (PORTA_ADDR)                   PORTA;
-sfr  __at (PORTB_ADDR)                   PORTB;
-sfr  __at (PORTC_ADDR)                   PORTC;
-sfr  __at (PCLATH_ADDR)                  PCLATH;
-sfr  __at (INTCON_ADDR)                  INTCON;
-sfr  __at (PIR1_ADDR)                    PIR1;
-sfr  __at (TMR1L_ADDR)                   TMR1L;
-sfr  __at (TMR1H_ADDR)                   TMR1H;
-sfr  __at (T1CON_ADDR)                   T1CON;
-sfr  __at (TMR2_ADDR)                    TMR2;
-sfr  __at (T2CON_ADDR)                   T2CON;
-sfr  __at (SSPBUF_ADDR)                  SSPBUF;
-sfr  __at (SSPCON_ADDR)                  SSPCON;
-sfr  __at (CCPR1L_ADDR)                  CCPR1L;
-sfr  __at (CCPR1H_ADDR)                  CCPR1H;
-sfr  __at (CCP1CON_ADDR)                 CCP1CON;
-sfr  __at (ADRES_ADDR)                   ADRES;
-sfr  __at (ADCON0_ADDR)                  ADCON0;
-sfr  __at (OPTION_REG_ADDR)              OPTION_REG;
-sfr  __at (TRISA_ADDR)                   TRISA;
-sfr  __at (TRISB_ADDR)                   TRISB;
-sfr  __at (TRISC_ADDR)                   TRISC;
-sfr  __at (PIE1_ADDR)                    PIE1;
-sfr  __at (PCON_ADDR)                    PCON;
-sfr  __at (PR2_ADDR)                     PR2;
-sfr  __at (SSPADD_ADDR)                  SSPADD;
-sfr  __at (SSPSTAT_ADDR)                 SSPSTAT;
-sfr  __at (ADCON1_ADDR)                  ADCON1;
+__data __at (INDF_ADDR) volatile char      INDF;
+__sfr  __at (TMR0_ADDR)                    TMR0;
+__data __at (PCL_ADDR) volatile char       PCL;
+__sfr  __at (STATUS_ADDR)                  STATUS;
+__sfr  __at (FSR_ADDR)                     FSR;
+__sfr  __at (PORTA_ADDR)                   PORTA;
+__sfr  __at (PORTB_ADDR)                   PORTB;
+__sfr  __at (PORTC_ADDR)                   PORTC;
+__sfr  __at (PCLATH_ADDR)                  PCLATH;
+__sfr  __at (INTCON_ADDR)                  INTCON;
+__sfr  __at (PIR1_ADDR)                    PIR1;
+__sfr  __at (TMR1L_ADDR)                   TMR1L;
+__sfr  __at (TMR1H_ADDR)                   TMR1H;
+__sfr  __at (T1CON_ADDR)                   T1CON;
+__sfr  __at (TMR2_ADDR)                    TMR2;
+__sfr  __at (T2CON_ADDR)                   T2CON;
+__sfr  __at (SSPBUF_ADDR)                  SSPBUF;
+__sfr  __at (SSPCON_ADDR)                  SSPCON;
+__sfr  __at (CCPR1L_ADDR)                  CCPR1L;
+__sfr  __at (CCPR1H_ADDR)                  CCPR1H;
+__sfr  __at (CCP1CON_ADDR)                 CCP1CON;
+__sfr  __at (ADRES_ADDR)                   ADRES;
+__sfr  __at (ADCON0_ADDR)                  ADCON0;
+__sfr  __at (OPTION_REG_ADDR)              OPTION_REG;
+__sfr  __at (TRISA_ADDR)                   TRISA;
+__sfr  __at (TRISB_ADDR)                   TRISB;
+__sfr  __at (TRISC_ADDR)                   TRISC;
+__sfr  __at (PIE1_ADDR)                    PIE1;
+__sfr  __at (PCON_ADDR)                    PCON;
+__sfr  __at (PR2_ADDR)                     PR2;
+__sfr  __at (SSPADD_ADDR)                  SSPADD;
+__sfr  __at (SSPSTAT_ADDR)                 SSPSTAT;
+__sfr  __at (ADCON1_ADDR)                  ADCON1;
 
 // 
 // bitfield definitions
@@ -50,9 +50,15 @@ volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;
 volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits;
 volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits;
 volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
+volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits;
+volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits;
+volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits;
 volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits;
 volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits;
 volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
 volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits;
 volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits;
+volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits;
+volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits;
+volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits;