* device/lib/pic/libdev/Makefile.in: build device-specific

[fw/sdcc] / device / lib / pic / libdev / pic12f675.c

diff --git a/device/lib/pic/libdev/pic12f675.c b/device/lib/pic/libdev/pic12f675.c
index 6667848c7c0dfac3b732bbd4b1bd9554b9b9b532..5a14150496ed866147463caa8f05c7d9940baf19 100644 (file)
--- a/device/lib/pic/libdev/pic12f675.c
+++ b/device/lib/pic/libdev/pic12f675.c
@@ -1,13 +1,13 @@
 /* Register definitions for pic12f675.
  * This file was automatically generated by:
- *   inc2h.pl V1.7
+ *   inc2h.pl V4585
  *   Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
  */
 #include <pic12f675.h>
 
-__data __at (INDF_ADDR) volatile char      INDF;
+__sfr  __at (INDF_ADDR)                    INDF;
 __sfr  __at (TMR0_ADDR)                    TMR0;
-__data __at (PCL_ADDR) volatile char       PCL;
+__sfr  __at (PCL_ADDR)                     PCL;
 __sfr  __at (STATUS_ADDR)                  STATUS;
 __sfr  __at (FSR_ADDR)                     FSR;
 __sfr  __at (GPIO_ADDR)                    GPIO;
@@ -41,7 +41,9 @@ __sfr  __at (ANSEL_ADDR)                   ANSEL;
 // bitfield definitions
 // 
 volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits;
+volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits;
 volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits;
+volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits;
 volatile __GPIO_bits_t __at(GPIO_ADDR) GPIO_bits;
 volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;
 volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits;
@@ -53,5 +55,6 @@ volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits;
 volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
 volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
 volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits;
+volatile __TRISIO_bits_t __at(TRISIO_ADDR) TRISIO_bits;
 volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits;