* src/SDCCsymt.c (initCSupport): fix compile warning on Cygwin

[fw/sdcc] / device / lib / gbz80 / div.s

diff --git a/device/lib/gbz80/div.s b/device/lib/gbz80/div.s
index 9dd447f3ce6c648de3404c6a66798af8b6296f4b..2c5f4bdf5390d646d5d07362c35d655403679a44 100644 (file)
--- a/device/lib/gbz80/div.s
+++ b/device/lib/gbz80/div.s
@@ -1,126 +1,174 @@
        ;; Originally from GBDK by Pascal Felber.
        .area   _CODE
 
-__divschar::
-       push    bc
-       lda     hl,4(sp)
-       
-       ld      c,(hl)
-       inc     hl
-       ld      e,(hl)
-       call    .div8
+__divschar_rrx_s::       
+        ld      hl,#2+1
+        add     hl,sp
+        
+        ld      e,(hl)
+        dec     hl
+        ld      l,(hl)
+        
+        ;; Fall through
+__divschar_rrx_hds::
+        ld      c,l
+        
+        call    .div8
 
        ld      e,c
-       pop     bc
+        ld      d,b
+               
        ret
        
-__modschar::
-       push    bc
-       lda     hl,4(sp)
-       ld      c,(hl)
-       inc     hl
-       ld      e,(hl)
-       call    .div8
+__modschar_rrx_s::       
+        ld      hl,#2+1
+        add     hl,sp
+        
+        ld      e,(hl)
+        dec     hl
+        ld      l,(hl)
+        
+        ;; Fall through
+__modschar_rrx_hds::
+        ld      c,l
+
+               call    .div8
 
-       ;;  Result in e
-       pop     bc
+        ;; Already in DE
+        
        ret
 
-__divsint::
-       push    bc
-       lda     hl,4(sp)
-       ld      c,(hl)
-       inc     hl
-       ld      b,(hl)
-       inc     hl
-       ld      e,(hl)
-       inc     hl
-       ld      d,(hl)
+__divsint_rrx_s::        
+        ld      hl,#2+3
+        add     hl,sp
+        
+        ld      d,(hl)
+        dec     hl
+        ld      e,(hl)
+        dec     hl
+        ld      a,(hl)
+        dec     hl
+        ld      l,(hl)
+        ld      h,a
+        
+        ;; Fall through
+__divsint_rrx_hds::
+       ld      b,h
+       ld      c,l
+
        call    .div16
 
        ld      e,c
        ld      d,b
-
-       pop     bc
+       
        ret
        
-__modsint::
-       push    bc
-       lda     hl,4(sp)
+__modsint_rrx_s::
+        ld      hl,#2+3
+        add     hl,sp
+        
+        ld      d,(hl)
+        dec     hl
+        ld      e,(hl)
+        dec     hl
+        ld      a,(hl)
+        dec     hl
+        ld      l,(hl)
+        ld      h,a
+
+        ;; Fall through
+__modsint_rrx_hds::
+       ld      b,h
+       ld      c,l
 
-       ld      c,(hl)
-       inc     hl
-       ld      b,(hl)
-       inc     hl
-       ld      e,(hl)
-       inc     hl
-       ld      d,(hl)
        call    .div16
 
-       ;; Result in de
-       pop     bc
+        ;; Already in DE
+       
        ret
 
        ;; Unsigned
-__divuchar::   
-       push    bc
-       lda     hl,4(sp)
-       
-       ld      c,(hl)
-       inc     hl
-       ld      e,(hl)
+__divuchar_rrx_s::       
+        ld      hl,#2+1
+        add     hl,sp
+        
+        ld      e,(hl)
+        dec     hl
+        ld      l,(hl)
+        
+        ;; Fall through
+__divuchar_rrx_hds::
+        ld      c,l
        call    .divu8
 
        ld      e,c
-       
-       pop     bc
+        ld      d,b
+        
        ret
        
-__moduchar::
-       push    bc
-       lda     hl,4(sp)
-       
-       ld      c,(hl)
-       inc     hl
-       ld      e,(hl)
+__moduchar_rrx_s::       
+        ld      hl,#2+1
+        add     hl,sp
+        
+        ld      e,(hl)
+        dec     hl
+        ld      l,(hl)
+        
+        ;; Fall through
+__moduchar_rrx_hds::
+        ld      c,l
        call    .divu8
 
-       ;; Result in e
-       pop     bc
-       ret
+        ;; Already in DE
+
+        ret
 
-__divuint::
-       push    bc
-       lda     hl,4(sp)
-       ld      c,(hl)
-       inc     hl
-       ld      b,(hl)
-       inc     hl
-       ld      e,(hl)
-       inc     hl
-       ld      d,(hl)
+__divuint_rrx_s::                
+        ld      hl,#2+3
+        add     hl,sp
+        
+        ld      d,(hl)
+        dec     hl
+        ld      e,(hl)
+        dec     hl
+        ld      a,(hl)
+        dec     hl
+        ld      l,(hl)
+        ld      h,a
+
+        ;; Fall through
+__divuint_rrx_hds::
+       ld      b,h
+       ld      c,l
        call    .divu16
 
        ld      e,c
        ld      d,b
        
-       pop     bc
        ret
        
-__moduint::
-       push    bc
-       lda     hl,4(sp)
-       ld      c,(hl)
-       inc     hl
-       ld      b,(hl)
-       inc     hl
-       ld      e,(hl)
-       inc     hl
-       ld      d,(hl)
+__moduint_rrx_s::                
+        ld      hl,#2+3
+        add     hl,sp
+        
+        ld      d,(hl)
+        dec     hl
+        ld      e,(hl)
+        dec     hl
+        ld      a,(hl)
+        dec     hl
+        ld      l,(hl)
+        ld      h,a
+        ;; Fall through
+        
+__moduint_rrx_hds::
+       ld      b,h
+       ld      c,l
+
        call    .divu16
 
-       ;; Result in de
-       pop     bc
+        ;; Already in DE
+       
        ret
        
 .div8::