* src/z80/gen.c: Fixed up generator to pass the regresion tests, specifically fixing...
[fw/sdcc] / device / lib / gbz80 / div.s
index 5917c24acb81349e0d86686087b2bc3f257ae9c4..2c5f4bdf5390d646d5d07362c35d655403679a44 100644 (file)
        ;; Originally from GBDK by Pascal Felber.
        .area   _CODE
 
-__divschar::   
-       push    de
-       push    bc
-       push    ix
-       ld      ix,#0
-       add     ix,sp
+__divschar_rrx_s::       
+        ld      hl,#2+1
+        add     hl,sp
+        
+        ld      e,(hl)
+        dec     hl
+        ld      l,(hl)
+        
+        ;; Fall through
+__divschar_rrx_hds::
+        ld      c,l
+        
+        call    .div8
 
-       ld      c,8(ix)
-       ld      e,9(ix)
-       call    .div8
-
-       ld      l,c
-       
-       pop     ix
-       pop     bc
-       pop     de
+       ld      e,c
+        ld      d,b
+               
        ret
        
-__modschar::
-       push    de
-       push    bc
-       push    ix
-       ld      ix,#0
-       add     ix,sp
+__modschar_rrx_s::       
+        ld      hl,#2+1
+        add     hl,sp
+        
+        ld      e,(hl)
+        dec     hl
+        ld      l,(hl)
+        
+        ;; Fall through
+__modschar_rrx_hds::
+        ld      c,l
 
-       ld      c,8(ix)
-       ld      e,9(ix)
-       call    .div8
+               call    .div8
 
-       ld      l,e
-       
-       pop     ix
-       pop     bc
-       pop     de
+        ;; Already in DE
+        
        ret
 
-__divsint::
-       push    de
-       push    bc
-       push    ix
-       ld      ix,#0
-       add     ix,sp
+__divsint_rrx_s::        
+        ld      hl,#2+3
+        add     hl,sp
+        
+        ld      d,(hl)
+        dec     hl
+        ld      e,(hl)
+        dec     hl
+        ld      a,(hl)
+        dec     hl
+        ld      l,(hl)
+        ld      h,a
+        
+        ;; Fall through
+__divsint_rrx_hds::
+       ld      b,h
+       ld      c,l
 
-       ld      c,8(ix)
-       ld      b,9(ix)
-       ld      e,10(ix)
-       ld      d,11(ix)
        call    .div16
 
-       ld      l,c
-       ld      h,b
+       ld      e,c
+       ld      d,b
        
-       pop     ix
-       pop     bc
-       pop     de
        ret
        
-__modsint::
-       push    de
-       push    bc
-       push    ix
-       ld      ix,#0
-       add     ix,sp
+__modsint_rrx_s::
+        ld      hl,#2+3
+        add     hl,sp
+        
+        ld      d,(hl)
+        dec     hl
+        ld      e,(hl)
+        dec     hl
+        ld      a,(hl)
+        dec     hl
+        ld      l,(hl)
+        ld      h,a
+
+        ;; Fall through
+__modsint_rrx_hds::
+       ld      b,h
+       ld      c,l
 
-       ld      c,8(ix)
-       ld      b,9(ix)
-       ld      e,10(ix)
-       ld      d,11(ix)
        call    .div16
 
-       ld      l,e
-       ld      h,d
+        ;; Already in DE
        
-       pop     ix
-       pop     bc
-       pop     de
        ret
 
        ;; Unsigned
-__divuchar::   
-       push    de
-       push    bc
-       push    ix
-       ld      ix,#0
-       add     ix,sp
-
-       ld      c,8(ix)
-       ld      e,9(ix)
+__divuchar_rrx_s::       
+        ld      hl,#2+1
+        add     hl,sp
+        
+        ld      e,(hl)
+        dec     hl
+        ld      l,(hl)
+        
+        ;; Fall through
+__divuchar_rrx_hds::
+        ld      c,l
        call    .divu8
 
-       ld      l,c
-       
-       pop     ix
-       pop     bc
-       pop     de
+       ld      e,c
+        ld      d,b
+        
        ret
        
-__moduchar::
-       push    de
-       push    bc
-       push    ix
-       ld      ix,#0
-       add     ix,sp
-
-       ld      c,8(ix)
-       ld      e,9(ix)
+__moduchar_rrx_s::       
+        ld      hl,#2+1
+        add     hl,sp
+        
+        ld      e,(hl)
+        dec     hl
+        ld      l,(hl)
+        
+        ;; Fall through
+__moduchar_rrx_hds::
+        ld      c,l
        call    .divu8
 
-       ld      l,e
-       
-       pop     ix
-       pop     bc
-       pop     de
-       ret
+        ;; Already in DE
+
+        ret
 
-__divuint::
-       push    de
-       push    bc
-       push    ix
-       ld      ix,#0
-       add     ix,sp
+__divuint_rrx_s::                
+        ld      hl,#2+3
+        add     hl,sp
+        
+        ld      d,(hl)
+        dec     hl
+        ld      e,(hl)
+        dec     hl
+        ld      a,(hl)
+        dec     hl
+        ld      l,(hl)
+        ld      h,a
 
-       ld      c,8(ix)
-       ld      b,9(ix)
-       ld      e,10(ix)
-       ld      d,11(ix)
+        ;; Fall through
+__divuint_rrx_hds::
+       ld      b,h
+       ld      c,l
        call    .divu16
 
-       ld      l,c
-       ld      h,b
+       ld      e,c
+       ld      d,b
        
-       pop     ix
-       pop     bc
-       pop     de
        ret
        
-__moduint::
-       push    de
-       push    bc
-       push    ix
-       ld      ix,#0
-       add     ix,sp
+__moduint_rrx_s::                
+        ld      hl,#2+3
+        add     hl,sp
+        
+        ld      d,(hl)
+        dec     hl
+        ld      e,(hl)
+        dec     hl
+        ld      a,(hl)
+        dec     hl
+        ld      l,(hl)
+        ld      h,a
+        ;; Fall through
+        
+__moduint_rrx_hds::
+       ld      b,h
+       ld      c,l
 
-       ld      c,8(ix)
-       ld      b,9(ix)
-       ld      e,10(ix)
-       ld      d,11(ix)
        call    .divu16
 
-       ld      l,e
-       ld      h,d
+        ;; Already in DE
        
-       pop     ix
-       pop     bc
-       pop     de
        ret
        
 .div8::