// Memory organization.
//
-#pragma memmap INDF_ADDR INDF_ADDR SFR 0x000 // INDF
-#pragma memmap TMR0_ADDR TMR0_ADDR SFR 0x000 // TMR0
-#pragma memmap PCL_ADDR PCL_ADDR SFR 0x000 // PCL
-#pragma memmap STATUS_ADDR STATUS_ADDR SFR 0x000 // STATUS
-#pragma memmap FSR_ADDR FSR_ADDR SFR 0x000 // FSR
-#pragma memmap PORTA_ADDR PORTA_ADDR SFR 0x000 // PORTA
-#pragma memmap PORTC_ADDR PORTC_ADDR SFR 0x000 // PORTC
-#pragma memmap PCLATH_ADDR PCLATH_ADDR SFR 0x000 // PCLATH
-#pragma memmap INTCON_ADDR INTCON_ADDR SFR 0x000 // INTCON
-#pragma memmap PIR1_ADDR PIR1_ADDR SFR 0x000 // PIR1
-#pragma memmap TMR1L_ADDR TMR1L_ADDR SFR 0x000 // TMR1L
-#pragma memmap TMR1H_ADDR TMR1H_ADDR SFR 0x000 // TMR1H
-#pragma memmap T1CON_ADDR T1CON_ADDR SFR 0x000 // T1CON
-#pragma memmap WDTCON_ADDR WDTCON_ADDR SFR 0x000 // WDTCON
-#pragma memmap CMCON0_ADDR CMCON0_ADDR SFR 0x000 // CMCON0
-#pragma memmap CMCON1_ADDR CMCON1_ADDR SFR 0x000 // CMCON1
-#pragma memmap OPTION_REG_ADDR OPTION_REG_ADDR SFR 0x000 // OPTION_REG
-#pragma memmap TRISA_ADDR TRISA_ADDR SFR 0x000 // TRISA
-#pragma memmap TRISC_ADDR TRISC_ADDR SFR 0x000 // TRISC
-#pragma memmap PIE1_ADDR PIE1_ADDR SFR 0x000 // PIE1
-#pragma memmap PCON_ADDR PCON_ADDR SFR 0x000 // PCON
-#pragma memmap OSCCON_ADDR OSCCON_ADDR SFR 0x000 // OSCCON
-#pragma memmap OSCTUNE_ADDR OSCTUNE_ADDR SFR 0x000 // OSCTUNE
-#pragma memmap LVDCON_ADDR LVDCON_ADDR SFR 0x000 // LVDCON
-#pragma memmap WPUDA_ADDR WPUDA_ADDR SFR 0x000 // WPUDA
-#pragma memmap IOCA_ADDR IOCA_ADDR SFR 0x000 // IOCA
-#pragma memmap WDA_ADDR WDA_ADDR SFR 0x000 // WDA
-#pragma memmap VRCON_ADDR VRCON_ADDR SFR 0x000 // VRCON
-#pragma memmap EEDAT_ADDR EEDAT_ADDR SFR 0x000 // EEDAT
-#pragma memmap EEDATA_ADDR EEDATA_ADDR SFR 0x000 // EEDATA
-#pragma memmap EEADR_ADDR EEADR_ADDR SFR 0x000 // EEADR
-#pragma memmap EECON1_ADDR EECON1_ADDR SFR 0x000 // EECON1
-#pragma memmap EECON2_ADDR EECON2_ADDR SFR 0x000 // EECON2
-#pragma memmap CRCON_ADDR CRCON_ADDR SFR 0x000 // CRCON
-#pragma memmap CRDAT0_ADDR CRDAT0_ADDR SFR 0x000 // CRDAT0
-#pragma memmap CRDAT1_ADDR CRDAT1_ADDR SFR 0x000 // CRDAT1
-#pragma memmap CRDAT2_ADDR CRDAT2_ADDR SFR 0x000 // CRDAT2
-#pragma memmap CRDAT3_ADDR CRDAT3_ADDR SFR 0x000 // CRDAT3
// LIST
//----- Register Files------------------------------------------------------
//Bank 0
-extern data __at (INDF_ADDR) volatile char INDF;
-extern sfr __at (TMR0_ADDR) TMR0;
-extern data __at (PCL_ADDR) volatile char PCL;
-extern sfr __at (STATUS_ADDR) STATUS;
-extern sfr __at (FSR_ADDR) FSR;
-extern sfr __at (PORTA_ADDR) PORTA;
+extern __data __at (INDF_ADDR) volatile char INDF;
+extern __sfr __at (TMR0_ADDR) TMR0;
+extern __data __at (PCL_ADDR) volatile char PCL;
+extern __sfr __at (STATUS_ADDR) STATUS;
+extern __sfr __at (FSR_ADDR) FSR;
+extern __sfr __at (PORTA_ADDR) PORTA;
-extern sfr __at (PORTC_ADDR) PORTC;
+extern __sfr __at (PORTC_ADDR) PORTC;
-extern sfr __at (PCLATH_ADDR) PCLATH;
-extern sfr __at (INTCON_ADDR) INTCON;
-extern sfr __at (PIR1_ADDR) PIR1;
+extern __sfr __at (PCLATH_ADDR) PCLATH;
+extern __sfr __at (INTCON_ADDR) INTCON;
+extern __sfr __at (PIR1_ADDR) PIR1;
-extern sfr __at (TMR1L_ADDR) TMR1L;
-extern sfr __at (TMR1H_ADDR) TMR1H;
-extern sfr __at (T1CON_ADDR) T1CON;
+extern __sfr __at (TMR1L_ADDR) TMR1L;
+extern __sfr __at (TMR1H_ADDR) TMR1H;
+extern __sfr __at (T1CON_ADDR) T1CON;
-extern sfr __at (WDTCON_ADDR) WDTCON;
-extern sfr __at (CMCON0_ADDR) CMCON0;
-extern sfr __at (CMCON1_ADDR) CMCON1;
+extern __sfr __at (WDTCON_ADDR) WDTCON;
+extern __sfr __at (CMCON0_ADDR) CMCON0;
+extern __sfr __at (CMCON1_ADDR) CMCON1;
//Bank 1
-extern sfr __at (OPTION_REG_ADDR) OPTION_REG;
+extern __sfr __at (OPTION_REG_ADDR) OPTION_REG;
-extern sfr __at (TRISA_ADDR) TRISA;
-extern sfr __at (TRISC_ADDR) TRISC;
+extern __sfr __at (TRISA_ADDR) TRISA;
+extern __sfr __at (TRISC_ADDR) TRISC;
-extern sfr __at (PIE1_ADDR) PIE1;
+extern __sfr __at (PIE1_ADDR) PIE1;
-extern sfr __at (PCON_ADDR) PCON;
-extern sfr __at (OSCCON_ADDR) OSCCON;
-extern sfr __at (OSCTUNE_ADDR) OSCTUNE;
+extern __sfr __at (PCON_ADDR) PCON;
+extern __sfr __at (OSCCON_ADDR) OSCCON;
+extern __sfr __at (OSCTUNE_ADDR) OSCTUNE;
-extern sfr __at (LVDCON_ADDR) LVDCON;
-extern sfr __at (WPUDA_ADDR) WPUDA;
-extern sfr __at (IOCA_ADDR) IOCA;
-extern sfr __at (WDA_ADDR) WDA;
+extern __sfr __at (LVDCON_ADDR) LVDCON;
+extern __sfr __at (WPUDA_ADDR) WPUDA;
+extern __sfr __at (IOCA_ADDR) IOCA;
+extern __sfr __at (WDA_ADDR) WDA;
-extern sfr __at (VRCON_ADDR) VRCON;
-extern sfr __at (EEDAT_ADDR) EEDAT;
-extern sfr __at (EEDATA_ADDR) EEDATA;
-extern sfr __at (EEADR_ADDR) EEADR;
-extern sfr __at (EECON1_ADDR) EECON1;
-extern sfr __at (EECON2_ADDR) EECON2;
+extern __sfr __at (VRCON_ADDR) VRCON;
+extern __sfr __at (EEDAT_ADDR) EEDAT;
+extern __sfr __at (EEDATA_ADDR) EEDATA;
+extern __sfr __at (EEADR_ADDR) EEADR;
+extern __sfr __at (EECON1_ADDR) EECON1;
+extern __sfr __at (EECON2_ADDR) EECON2;
//Bank 2
-extern sfr __at (CRCON_ADDR) CRCON;
-extern sfr __at (CRDAT0_ADDR) CRDAT0;
-extern sfr __at (CRDAT1_ADDR) CRDAT1;
-extern sfr __at (CRDAT2_ADDR) CRDAT2;
-extern sfr __at (CRDAT3_ADDR) CRDAT3;
+extern __sfr __at (CRCON_ADDR) CRCON;
+extern __sfr __at (CRDAT0_ADDR) CRDAT0;
+extern __sfr __at (CRDAT1_ADDR) CRDAT1;
+extern __sfr __at (CRDAT2_ADDR) CRDAT2;
+extern __sfr __at (CRDAT3_ADDR) CRDAT3;
//----- STATUS Bits --------------------------------------------------------
projects / fw / sdcc / blobdiff