* as/mcs51/asmain.c (search_path_append, search_path_fopen): new, added,

[fw/sdcc] / device / include / mcs51 / msm8xc154s.h

diff --git a/device/include/mcs51/msm8xc154s.h b/device/include/mcs51/msm8xc154s.h
index d8623b70be8ae2c87baca5d71e0c91ce7824aca2..04ba1f25487308176996beab3c5101f7ec04bc57 100644 (file)
--- a/device/include/mcs51/msm8xc154s.h
+++ b/device/include/mcs51/msm8xc154s.h
@@ -43,4 +43,11 @@ __sbit __at (0xfc)   IZC;    /* 10kO pull-up resistor control */
 __sbit __at (0xfd)     SERR;   /* Serial port reception flag */
 __sbit __at (0xfe)     T32;    /* interconnect T0 and T1 to 32bit timer/counter */
 
+/* Bits in IP (0xb8) */
+__sbit __at (0xbf)     PCT;    /* Priority interrupt circuit control bit */
+
+/* Bits in PCON (0x87) */
+#define RPD 0x20            /* Bit used to specify cancellation of CPU power down mode */
+#define HPD 0x40            /* The hard power down setting mode is enabled when this bit is set to "1". */
+
 #endif