stm32l4x.c: Use explicit 64-bit flash access as reference manual implies.

[fw/openocd] / contrib / loaders / flash / stm32l4x.S

diff --git a/contrib/loaders/flash/stm32l4x.S b/contrib/loaders/flash/stm32l4x.S
index 587cc33a99abcde691956de3926628153ce80ec4..045f9d0d6b16c045ce495dbe7823e9c4cced8447 100644 (file)
--- a/contrib/loaders/flash/stm32l4x.S
+++ b/contrib/loaders/flash/stm32l4x.S
@@ -51,9 +51,9 @@
  * r4 = flash base
  *
  * Clobbered:
- * r5 - rp
- * r6 - temp
- * r8 - wp, tmp
+ * r5   - rp
+ * r6/7 - temp (64-bit)
+ * r8   - wp, tmp
  */
 
 #define STM32_FLASH_CR_OFFSET  0x14    /* offset of CR register in FLASH struct */
@@ -70,10 +70,8 @@ wait_fifo:
 
        ldr     r6, STM32_PROG
        str     r6, [r4, #STM32_FLASH_CR_OFFSET]
-       ldr     r6, [r5], #0x04 /* read one word from src, increment ptr */
-       str     r6, [r2], #0x04 /* write one word to dst, increment ptr */
-       ldr     r6, [r5], #0x04 /* read one word from src, increment ptr */
-       str     r6, [r2], #0x04 /* write one word to dst, increment ptr */
+       ldrd    r6, [r5], #0x08 /* read one word from src, increment ptr */
+       strd    r6, [r2], #0x08 /* write one word to dst, increment ptr */
        dsb
 busy:
        ldr     r6, [r4, #STM32_FLASH_SR_OFFSET]