cfg: ftdi icdi enable srst open drain config

[fw/openocd] / contrib / libdcc / dcc_stdio.c

diff --git a/contrib/libdcc/dcc_stdio.c b/contrib/libdcc/dcc_stdio.c
index a25e7dd169bc5aa4f3b5443a3d372f3cf2f9023c..356ddbdaf2667f3ee2b03c3d0a420db44b3991c9 100644 (file)
--- a/contrib/libdcc/dcc_stdio.c
+++ b/contrib/libdcc/dcc_stdio.c
@@ -29,9 +29,9 @@
 #define TARGET_REQ_DEBUGMSG_HEXMSG(size)       (0x01 | ((size & 0xff) << 8))
 #define TARGET_REQ_DEBUGCHAR                           0x02
 
-#if defined(__ARM_ARCH_7M__)
+#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_6SM__)
 
-/* we use the cortex_m3 DCRDR reg to simulate a arm7_9 dcc channel
+/* we use the System Control Block DCRDR reg to simulate a arm7_9 dcc channel
  * DCRDR[7:0] is used by target for status
  * DCRDR[15:8] is used by target for write buffer
  * DCRDR[23:16] is used for by host for status
@@ -99,7 +99,7 @@ void dbg_write_u16(const unsigned short *val, long len)
 
        while (len > 0)
        {
-               dcc_data = val[0] 
+               dcc_data = val[0]
                        | ((len > 1) ? val[1] << 16: 0x0000);
 
                dbg_write(dcc_data);
@@ -145,7 +145,7 @@ void dbg_write_str(const char *msg)
                        | ((len > 2) ? msg[2] << 16 : 0x00)
                        | ((len > 3) ? msg[3] << 24 : 0x00);
                dbg_write(dcc_data);
-               
+
                msg += 4;
                len -= 4;
        }